CN209709937U - DSP initialization protection circuit - Google Patents

DSP initialization protection circuit Download PDF

Info

Publication number
CN209709937U
CN209709937U CN201920901533.5U CN201920901533U CN209709937U CN 209709937 U CN209709937 U CN 209709937U CN 201920901533 U CN201920901533 U CN 201920901533U CN 209709937 U CN209709937 U CN 209709937U
Authority
CN
China
Prior art keywords
circuit
port
dsp
pwm signal
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201920901533.5U
Other languages
Chinese (zh)
Inventor
王桂宁
裴冯来
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Shinry Technologies Co Ltd
Original Assignee
Shanghai Jiening New Energy Technology Development Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Jiening New Energy Technology Development Co Ltd filed Critical Shanghai Jiening New Energy Technology Development Co Ltd
Priority to CN201920901533.5U priority Critical patent/CN209709937U/en
Application granted granted Critical
Publication of CN209709937U publication Critical patent/CN209709937U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The utility model discloses a kind of DSP to initialize protection circuit, including DSP circuit, protection circuit and external power circuit, DSP circuit and protection circuit connection, protection circuit and external power circuit connection；It is in initialization procedure in DSP circuit; DSP circuit is for exporting the first pwm signal; protection circuit is for receiving the first pwm signal and the first pwm signal being converted into low level second pwm signal; external power circuit is for receiving the second pwm signal, so that external power circuit avoids the pwm signal for receiving high level from being damaged；After the completion of DSP circuit is in initialization, DSP circuit is for exporting third pwm signal, and protection circuit is for receiving third pwm signal and exporting the 4th pwm signal, and external power circuit is for receiving the 4th pwm signal, so that external power circuit works normally.It can solve the problems, such as that be in initialization procedure external power circuit in DSP circuit is damaged because receiving the pwm signal of high level using the utility model embodiment.

Description

DSP initialization protection circuit
Technical field
The utility model relates to electronic circuit technology fields, and in particular to a kind of DSP initialization protection circuit.
Background technique
Currently, DSP circuit generates pwm signal, for pwm signal by external power circuit, external power circuit includes power Switching tube, pwm signal are used for driving power switching tube.Due to being in initialization procedure pwm signal by the external world in DSP circuit Interference will lead to pwm signal and high level be presented, and uses the pwm signal driving power switching tube of high level at this time, will lead to power Switching tube abnormal, so that external power circuit is damaged.
Utility model content
The utility model embodiment provides a kind of DSP initialization protection circuit, is in initialization in DSP circuit for solving The problem of external power circuit because receives the pwm signal of high level and is damaged in the process.
The utility model embodiment first aspect provides a kind of DSP initialization protection circuit, the DSP initialization protection electricity Road includes DSP circuit, protection circuit and external power circuit, in which:
The DSP circuit and the protection circuit connection, the protection circuit and the external power circuit connection；
It is in initialization procedure in the DSP circuit, the DSP circuit is for exporting the first pwm signal, the protection Circuit is described for receiving first pwm signal and first pwm signal being converted into low level second pwm signal External power circuit is for receiving second pwm signal, so that the external power circuit avoids receiving the PWM of high level Signal is damaged；
After the completion of the DSP circuit is in initialization, the DSP circuit is for exporting third pwm signal, the protection Circuit is for receiving the third pwm signal and exporting the 4th pwm signal, and the external power circuit is for receiving the described 4th Pwm signal, so that the external power circuit works normally.
In one embodiment, the DSP circuit includes first port PWM, second port PH, third port PL and total Line Bus, the first port PWM, the second port PH and the third port PL are connect with the bus B us.
In one embodiment, the protection circuit includes the 4th port PWM1, fifth port PH1, the 6th port PL1, the 7th port PWM2, the 8th port P1, capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, resistance R1, electricity Hinder R2, resistance R3, resistance R4, resistance R5, the first gate logic U1- A, the second gate logic U1- B and switching tube Q1；
The 4th port PWM1 respectively with the first gate logic U1The first input end of-A, the resistance R1's First end and the capacitor C1First end connection；
The first gate logic U1The second input terminal of-A respectively with the second gate logic U1The output of-B End, the capacitor C2First end and the resistance R2First end connection, the first gate logic U1The output end of-A It is connect with the 7th port PWM2, the first gate logic U1The control terminal of-A and the capacitor C3First end connection, The first gate logic U1With the first circuit GND1 is connect the ground terminal of-A；
The second gate logic U1The first input end of-B respectively with the capacitor C4First end, the resistance R3 First end and the switching tube Q1Drain electrode connection, the second gate logic U1The second input terminal of-B respectively with institute State resistance R4First end, the capacitor C5First end and the fifth port PH1 connection；
The switching tube Q1Grid respectively with the resistance R5First end, the capacitor C6First end and described 6th port PL1 connection, the switching tube Q1Source electrode, the resistance R1Second end, the capacitor C1Second end, described Capacitor C2Second end, the resistance R2Second end, the resistance R4Second end, the capacitor C5Second end, the electricity Hold C4Second end, the resistance R5Second end and the capacitor C6Second end with second circuit GND2 is connect；
The capacitor C3Second end with tertiary circuit GND3 is connect, the resistance R3Second end and the 8th end Mouth P1 connection.
In one embodiment, the external power circuit includes the 9th port PWM3, the tenth port P2, resistance R6, electricity Hinder R7With switching tube Q2；
The 9th port PWM3 and resistance R6First end connection, the resistance R6Second end respectively with it is described Switching tube Q2Grid and the resistance R7First end connection, the switching tube Q2Drain electrode and the tenth port P2Connection, The switching tube Q2Source electrode respectively with the resistance R7Second end with the 4th circuit GND4 is connected.
In one embodiment, the switching tube Q1With the switching tube Q2It is power switch tube.
In one embodiment, the first gate logic U1- A and the second gate logic U1- B be with Gate logic.
In one embodiment, it is in initialization procedure in the DSP circuit, the second port PH corresponds to low electricity Flat, the third port PL corresponds to high level；
After the completion of the DSP circuit is in initialization, the second port PH corresponds to high level, the third port PL Corresponding low level.
As can be seen that in the utility model embodiment, DSP initialization protection circuit include DSP circuit, protection circuit and External power circuit, DSP circuit and protection circuit connection, protection circuit and external power circuit connection；It is in just in DSP circuit During beginningization, DSP circuit is for exporting the first pwm signal, and protection circuit is for receiving the first pwm signal and by the first PWM Signal is converted into low level second pwm signal, and external power circuit is for receiving the second pwm signal, so that external power Circuit avoids the pwm signal for receiving high level from being damaged；After the completion of DSP circuit is in initialization, DSP circuit is for exporting Third pwm signal, protection circuit is for receiving third pwm signal and exporting the 4th pwm signal, and external power circuit is for receiving 4th pwm signal, so that external power circuit works normally.It is in initialization procedure compared in DSP circuit using height The power switch tube that the pwm signal driving external power circuit of level includes, the utility model embodiment are in just in DSP circuit External power circuit receives the low level pwm signal of protection circuit output during beginningization, and external power electricity can be achieved in this way Road avoids being damaged because of the pwm signal of reception high level.Meanwhile after the completion of DSP circuit is in initialization, external power Circuit receives the 4th pwm signal of protection circuit output, and the 4th pwm signal is determined according to third pwm signal, so that outside Portion's power circuit works normally.
Detailed description of the invention
It, below will be practical to this in order to illustrate more clearly of the technical solution in the utility model embodiment or background technique Involved attached drawing is briefly described in new embodiment or background technique.
Fig. 1 is a kind of circuit block diagram of DSP initialization protection circuit provided by the embodiment of the utility model；
Fig. 2 is a kind of structural schematic diagram of DSP initialization protection circuit provided by the embodiment of the utility model；
Fig. 3 is the structural schematic diagram of DSP circuit shown in Fig. 2；
Fig. 4 is the structural schematic diagram of protection circuit shown in Fig. 2；
Fig. 5 is the structural schematic diagram of external power circuit shown in Fig. 2.
Specific embodiment
In order to make those skilled in the art better understand the scheme of the utility model, below in conjunction with the utility model reality The attached drawing in example is applied, the technical scheme in the utility model embodiment is clearly and completely described, it is clear that described Embodiment is only a part of the embodiment of the utility model, instead of all the embodiments.Based on the reality in the utility model Example is applied, every other embodiment obtained by those of ordinary skill in the art without making creative efforts all belongs to In the range of the utility model protection.
The specification and claims of the utility model and term " first " in above-mentioned attached drawing, " second " etc. are to be used for Different objects are distinguished, are not use to describe a particular order.In addition, term " includes " and " having " and their any deformations, It is intended to cover and non-exclusive includes.Such as process, system, product or the equipment for containing a series of steps or units do not have It is defined in listed step or unit, but optionally further comprising the step of not listing or unit, or optionally further comprising For other intrinsic step or units of these processes, product or equipment.
Referenced herein " embodiment " is it is meant that a particular feature, structure, or characteristic described can wrap in conjunction with the embodiments It is contained at least one embodiment of the utility model., which there is the phrase, in each position in the description to be each meant Identical embodiment, nor the independent or alternative embodiment with other embodiments mutual exclusion.Those skilled in the art are explicit Ground and implicitly understand, embodiment described herein can be combined with other embodiments.
It describes in detail with reference to the accompanying drawing to the utility model embodiment.
Referring to Fig. 1, Fig. 1 is a kind of circuit block diagram of DSP initialization protection circuit provided by the embodiment of the utility model, DSP initialization protection circuit 100 includes DSP circuit 200, protection circuit 300 and external power circuit 400, in which:
DSP circuit 200 is connect with protection circuit 300, and protection circuit 300 is connect with external power circuit 400；
During DSP circuit 200 is in init state, DSP circuit 200 is for exporting the first pwm signal, protection electricity Road 300 is for receiving the first pwm signal and the first pwm signal being converted into low level second pwm signal, external power circuit 400 for receiving the second pwm signal, so that external power circuit 400 avoids the pwm signal for receiving high level from being damaged；
After the completion of DSP circuit 200 is in initialization, DSP circuit 200 protects circuit for exporting third pwm signal 300 for receiving third pwm signal and exporting the 4th pwm signal, and external power circuit 400 is used to receive the 4th pwm signal, with So that external power circuit 400 works normally.
As can be seen that in the utility model embodiment, DSP initialization protection circuit include DSP circuit, protection circuit and External power circuit, DSP circuit and protection circuit connection, protection circuit and external power circuit connection；It is in just in DSP circuit During beginningization, DSP circuit is for exporting the first pwm signal, and protection circuit is for receiving the first pwm signal and by the first PWM Signal is converted into low level second pwm signal, and external power circuit is for receiving the second pwm signal, so that external power Circuit avoids the pwm signal for receiving high level from being damaged；After the completion of DSP circuit is in initialization, DSP circuit is for exporting Third pwm signal, protection circuit is for receiving third pwm signal and exporting the 4th pwm signal, and external power circuit is for receiving 4th pwm signal, so that external power circuit works normally.It is in initialization procedure compared in DSP circuit using height The power switch tube that the pwm signal driving external power circuit of level includes, the utility model embodiment are in just in DSP circuit External power circuit receives the low level pwm signal of protection circuit output during beginningization, and external power electricity can be achieved in this way Road avoids being damaged because of the pwm signal of reception high level.Meanwhile after the completion of DSP circuit is in initialization, external power Circuit receives the 4th pwm signal of protection circuit output, and the 4th pwm signal is determined according to third pwm signal, so that outside Portion's power circuit works normally.
Referring to Fig. 2, Fig. 2 is a kind of structural representation of DSP initialization protection circuit provided by the embodiment of the utility model Figure, DSP initialization protection circuit 100 includes DSP circuit 200, protection circuit 300 and external power circuit 400, in which:
DSP circuit 200 is connect with protection circuit 300, and protection circuit 300 is connect with external power circuit 400；
It is in initialization procedure in DSP circuit 200, DSP circuit 200 protects circuit for exporting the first pwm signal 300 for receiving the first pwm signal and the first pwm signal being converted into low level second pwm signal, external power circuit 400 for receiving the second pwm signal, so that external power circuit 400 avoids the pwm signal for receiving high level from being damaged；
After the completion of DSP circuit 200 is in initialization, DSP circuit 200 protects circuit for exporting third pwm signal 300 are used to receive third pwm signal and third pwm signal are converted into the 4th pwm signal of high level, external power circuit 400 for receiving the 4th pwm signal, so that external power circuit 400 works normally.
Wherein, DSP circuit be in initialization procedure refer to DSP circuit be in power on or reset preliminary process.
As can be seen that in the utility model embodiment, DSP initialization protection circuit include DSP circuit, protection circuit and External power circuit, DSP circuit and protection circuit connection, protection circuit and external power circuit connection；It is in just in DSP circuit During beginningization, DSP circuit is for exporting the first pwm signal, and protection circuit is for receiving the first pwm signal and by the first PWM Signal is converted into low level second pwm signal, and external power circuit is for receiving the second pwm signal, so that external power Circuit avoids the pwm signal for receiving high level from being damaged；After the completion of DSP circuit is in initialization, DSP circuit is for exporting Third pwm signal, protection circuit is for receiving third pwm signal and exporting the 4th pwm signal, and external power circuit is for receiving 4th pwm signal, so that external power circuit works normally.It is in initialization procedure compared in DSP circuit using height The pwm signal of level determines that the power switch tube that external power circuit includes, the utility model embodiment are in just in DSP circuit External power circuit receives the low level pwm signal of protection circuit output during beginningization, and external power electricity can be achieved in this way Road avoids being damaged because of the pwm signal of reception high level.Meanwhile after the completion of DSP circuit is in initialization, external power Circuit receives the 4th pwm signal of protection circuit output, and the 4th pwm signal is determined according to third pwm signal, so that outside Portion's power circuit works normally.
In one embodiment, switching tube Q1With switching tube Q2It is power switch tube.
Wherein, power switch tube, which refers to, can bear larger current, and leakage current is smaller, have preferably saturation to lead under certain condition Logical and cut-off characteristics triode.
In one embodiment, the first gate logic U1- A and the second gate logic U1- B is and gate logic is electric Road.
In one embodiment, it being in initialization procedure in DSP circuit 200, second port PH corresponds to low level, the Three port PL correspond to high level；
After the completion of DSP circuit 200 is in initialization, second port PH corresponds to high level, and third port PL corresponds to low electricity It is flat.
Wherein, it is in initialization procedure in DSP circuit, the corresponding operation program of DSP circuit is inactive, DSP circuit Port may generate unusual waveforms, lead to first port PWM exception high level or abnormal low level；Abnormal low level will not be right External power circuit impacts, but abnormal high level can damage external power circuit.
Wherein, it is in initialization procedure in DSP circuit, all of the port of DSP circuit exports high level, third extremely Port PL corresponds to high level, and PL signal passes through switching tube Q1 at this time, is sent to the second gate logic U1The input signal of-B just becomes At low level, due to the first gate logic U1- A and the second gate logic U1- B is AND gate, therefore no matter First pwm signal is high level or low level, the first gate logic U1Second pwm signal of-A output is low level, outside Portion's power circuit receives low level second pwm signal, can solve to be in external power in initialization procedure in DSP circuit in this way The problem of circuit because receives the pwm signal of high level and is damaged.
After the completion of DSP circuit is in initialization, normal output is arranged by operation program in all of the port of DSP circuit, the Two-port netwerk PH corresponds to high level, and third port PL corresponds to low level, at this time the second gate logic U1- B output high level, the 4th Pwm signal is determined according to third pwm signal, and external power receives the 4th pwm signal of protection circuit output, so that outside Portion's power circuit works normally.
Wherein, the specific descriptions of DSP circuit 200 see the associated description of following Fig. 3, and protection circuit 300 is specifically retouched The associated description for seeing following Fig. 4 is stated, the specific descriptions of external power circuit 400 see the associated description of following Fig. 5.
Referring to Fig. 3, Fig. 3 is the DSP circuit in a kind of DSP initialization protection circuit provided by the embodiment of the utility model Structural schematic diagram, which includes first port PWM, second port PH, third port PL and bus B us, first Port PWM, second port PH and third port PL are connect with bus B us.
Referring to Fig. 4, Fig. 4 is the protection electricity in a kind of DSP initialization protection circuit provided by the embodiment of the utility model The structural schematic diagram on road, the protection circuit 300 include the 4th port PWM1, fifth port PH1, the 6th port PL1, the 7th port PWM2, the 8th port P1, capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, resistance R1, resistance R2, resistance R3、 Resistance R4, resistance R5, the first gate logic U1- A, the second gate logic U1- B and switching tube Q1；
4th port PWM1 respectively with the first gate logic U1First input end, the resistance R of-A1First end and electricity Hold C1First end connection；
First gate logic U1The second input terminal of-A respectively with the second gate logic U1Output end, the capacitor C of-B2 First end and resistance R2First end connection, the first gate logic U1The output end of-A is connect with the 7th port PWM2, the One gate logic U1The control terminal and capacitor C of-A3First end connection, the first gate logic U1The ground terminal of-A and first The GND1 connection of circuit ground；
Second gate logic U1The first input end of-B respectively with capacitor C4First end, resistance R3First end and Switching tube Q1Drain electrode connection, the second gate logic U1The second input terminal of-B respectively with resistance R4First end, capacitor C5's First end and fifth port PH1 connection；
Switching tube Q1Grid respectively with resistance R5First end, capacitor C6First end and the 6th port PL1 connection, Switching tube Q1Source electrode, resistance R1Second end, capacitor C1Second end, capacitor C2Second end, resistance R2Second end, resistance R4Second end, capacitor C5Second end, capacitor C4Second end, resistance R5Second end and capacitor C6Second end with The GND2 connection of two circuits ground；
Capacitor C3Second end with tertiary circuit GND3 is connect, resistance R3Second end connect with the 8th port P1.
In one embodiment, the 4th port PWM1 is connect with first port PWM, fifth port PH1 and second port PH connection, the 6th port PL1 are connect with third port PL.
Referring to Fig. 5, Fig. 5 is the circumferential work in a kind of DSP initialization protection circuit provided by the embodiment of the utility model The structural schematic diagram of rate circuit, the external power circuit 400 include the 9th port PWM3, the tenth port P2, resistance R6, resistance R7 With switching tube Q2, in which:
9th port PWM3 and resistance R6First end connection, resistance R6Second end respectively with switching tube Q2Grid and Resistance R7First end connection, switching tube Q2Drain electrode and the tenth port P2Connection, switching tube Q2Source electrode respectively with resistance R7's With the 4th circuit GND4 is connected second end.
In one embodiment, the 9th port PWM3 is connect with the 7th port PWM2.
It should be noted that for simple description, therefore, it is stated as one for each utility model embodiment above-mentioned The combination of actions of series, but those skilled in the art should understand that, the utility model is not by described sequence of movement Limitation, because some steps may be performed in other sequences or simultaneously according to the utility model.Secondly, art technology Personnel also should be aware of, and the embodiments described in the specification are all preferred embodiments, and related actions and modules is not It must be necessary to the utility model.
In the above-described embodiments, it all emphasizes particularly on different fields to the description of each embodiment, there is no the portion being described in detail in some embodiment Point, reference can be made to the related descriptions of other embodiments.
In several embodiments provided by the utility model, it should be understood that disclosed device can pass through others Mode is realized.For example, the apparatus embodiments described above are merely exemplary, such as the division of said units, only A kind of logical function partition, there may be another division manner in actual implementation, for example, multiple units or components can combine or Person is desirably integrated into another system, or some features can be ignored or not executed.Another point, shown or discussed is mutual Between coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING or communication link of device or unit It connects, can be electrical or other forms.
Above-mentioned unit as illustrated by the separation member may or may not be physically separated, aobvious as unit The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple In network unit.It can select some or all of unit therein according to the actual needs to realize the mesh of this embodiment scheme 's.
In addition, each functional unit in each embodiment of the utility model can integrate in one processing unit, It can be each unit to physically exist alone, can also be integrated in one unit with two or more units.It is above-mentioned integrated Unit both can take the form of hardware realization, can also realize in the form of software functional units.
The utility model embodiment is described in detail above, specific case used herein is to the utility model Principle and embodiment be expounded, the above embodiments are only used to help understand the utility model and its core Thought；At the same time, for those skilled in the art, based on the idea of the present invention, in specific embodiment and application There will be changes in range, to sum up above-mentioned, and the content of the present specification should not be construed as a limitation of the present invention.

Claims (7)

1. a kind of DSP initialization protection circuit, which is characterized in that the DSP initialization protection circuit includes DSP circuit, protection Circuit and external power circuit, in which:
The DSP circuit and the protection circuit connection, the protection circuit and the external power circuit connection；
It is in initialization procedure in the DSP circuit, the DSP circuit is for exporting the first pwm signal, the protection circuit For receiving first pwm signal and first pwm signal being converted into low level second pwm signal, the outside Power circuit is for receiving second pwm signal, so that the external power circuit avoids receiving the pwm signal of high level It is damaged；
After the completion of the DSP circuit is in initialization, the DSP circuit is for exporting third pwm signal, the protection circuit For receiving the third pwm signal and exporting the 4th pwm signal, the external power circuit is for receiving the 4th PWM Signal, so that the external power circuit works normally.
2. DSP initialization protection circuit according to claim 1, which is characterized in that the DSP circuit includes first port PWM, second port PH, third port PL and bus B us, the first port PWM, the second port PH and the third end Mouth PL is connect with the bus B us.
3. DSP initialization protection circuit according to claim 2, which is characterized in that the protection circuit includes the 4th end Mouth PWM1, fifth port PH1, the 6th port PL1, the 7th port PWM2, the 8th port P1, capacitor C1, capacitor C2, capacitor C3, electricity Hold C4, capacitor C5, capacitor C6, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, the first gate logic U1- A, second Logic circuit U1- B and switching tube Q1；
The 4th port PWM1 respectively with the first gate logic U1The first input end of-A, the resistance R1First End and the capacitor C1First end connection；
The first gate logic U1The second input terminal of-A respectively with the second gate logic U1The output end of-B, institute State capacitor C2First end and the resistance R2First end connection, the first gate logic U1The output end of-A and institute State the 7th port PWM2 connection, the first gate logic U1The control terminal of-A and the capacitor C3First end connection, it is described First gate logic U1With the first circuit GND1 is connect the ground terminal of-A；
The second gate logic U1The first input end of-B respectively with the capacitor C4First end, the resistance R3 One end and the switching tube Q1Drain electrode connection, the second gate logic U1The second input terminal of-B respectively with the electricity Hinder R4First end, the capacitor C5First end and the fifth port PH1 connection；
The switching tube Q1Grid respectively with the resistance R5First end, the capacitor C6First end and the described 6th Port PL1 connection, the switching tube Q1Source electrode, the resistance R1Second end, the capacitor C1Second end, the capacitor C2Second end, the resistance R2Second end, the resistance R4Second end, the capacitor C5Second end, the capacitor C4 Second end, the resistance R5Second end and the capacitor C6Second end with second circuit GND2 is connect；
The capacitor C3Second end with tertiary circuit GND3 is connect, the resistance R3Second end and the 8th port P1 Connection.
4. DSP according to claim 3 initialization protection circuit, which is characterized in that the external power circuit includes the Nine port PWM3, the tenth port P2, resistance R6, resistance R7With switching tube Q2；
The 9th port PWM3 and resistance R6First end connection, the resistance R6Second end respectively with the switch Pipe Q2Grid and the resistance R7First end connection, the switching tube Q2Drain electrode and the tenth port P2Connection, it is described Switching tube Q2Source electrode respectively with the resistance R7Second end with the 4th circuit GND4 is connected.
5. DSP initialization protection circuit according to claim 4, which is characterized in that the switching tube Q1With the switching tube Q2It is power switch tube.
6. DSP initialization protection circuit according to claim 5, which is characterized in that the first gate logic U1- A and The second gate logic U1- B is AND gate.
7. DSP initialization protection circuit according to claim 6, which is characterized in that be in initialization in the DSP circuit In the process, the second port PH corresponds to low level, and the third port PL corresponds to high level；
After the completion of the DSP circuit is in initialization, the second port PH corresponds to high level, and the third port PL is corresponding Low level.
CN201920901533.5U 2019-06-14 2019-06-14 DSP initialization protection circuit Active CN209709937U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920901533.5U CN209709937U (en) 2019-06-14 2019-06-14 DSP initialization protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920901533.5U CN209709937U (en) 2019-06-14 2019-06-14 DSP initialization protection circuit

Publications (1)

Publication Number Publication Date
CN209709937U true CN209709937U (en) 2019-11-29

Family

ID=68650762

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201920901533.5U Active CN209709937U (en) 2019-06-14 2019-06-14 DSP initialization protection circuit

Country Status (1)

Country Link
CN (1) CN209709937U (en)

Similar Documents

Publication Publication Date Title
CN207352398U (en) General digital input and output multiplex circuit and input-output control unit
CN104731742A (en) Bus driver circuit with improved transition speed
CN209709937U (en) DSP initialization protection circuit
CN207896980U (en) Communication structure and communication system
CN105634677B (en) Ethernet transmission circuit
CN206077440U (en) A kind of communication protocol converter
CN205265642U (en) Trigger circuit with prevent mistake trigger function
CN109449876A (en) A kind of short-circuit protection circuit
CN110083532A (en) Run-time error localization method and device under fusion mode based on deep learning frame
CN102164030B (en) Single-port communication circuit and communication method thereof
CN104753374A (en) Driving method for diode clamping type multi-level bridge arm and bridge arm logic unit
CN207291905U (en) A kind of CAN bus polar converter and automobile
CN208691268U (en) A kind of CAN communication modular circuit suitable for monitoring device
CN209447019U (en) RS485 equipment connects circuit and system
CN203243214U (en) Frequency conversion device
CN207788961U (en) The drive system and robot of ectoskeleton limbs motor
CN207573251U (en) A kind of secondary power supply circuit for electromagnetic interference equipment
CN206023820U (en) Gateway
CN210155221U (en) Phase sequence detection circuit
CN209267152U (en) A kind of short-circuit protection circuit
CN217116114U (en) Passive CAN communication expansion interface
CN218041372U (en) Decoding circuit for decoding specific coded signal
CN211531079U (en) Communication signal reverse connection prevention circuit
CN209545433U (en) IGBT interlocks driving circuit and chip and electronic equipment
CN108337143A (en) Communication structure, communication system and communication means

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20200115

Address after: Nanshan District Xueyuan Road in Shenzhen city of Guangdong province 518055 No. 1001 Nanshan Chi Park C1 building 14 floor

Patentee after: Shenzhen Shinry Technology Co., Ltd.

Address before: 201900 999 Shanlian Road, Baoshan District, Shanghai

Patentee before: Shanghai Jiening New Energy Technology Development Co Ltd