CN209642659U - A kind of communication device based on LORA - Google Patents
A kind of communication device based on LORA Download PDFInfo
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- CN209642659U CN209642659U CN201920559773.1U CN201920559773U CN209642659U CN 209642659 U CN209642659 U CN 209642659U CN 201920559773 U CN201920559773 U CN 201920559773U CN 209642659 U CN209642659 U CN 209642659U
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Abstract
A kind of communication device based on LORA.The utility model relates to a kind of communication devices based on LORA.FPC antenna (2) are arranged in the upper end of square shell body (1), USB interface (3) are arranged in the side of the square shell body (1), power switch (4) are set on the top surface of the square shell body (1), the utility model is the high-performance wireless device that can carry out automatic data logging.
Description
Technical field:
The utility model relates to a kind of communication devices based on LORA.
Background technique:
Occurring a kind of wireless technology of remote low-power consumption in recent years -- LORA technology, complexity is low, at low cost, can be double
To wireless communication, application field is extensive, but according to the current LORA communication technology of Sampling Survey since its is small in size, performance height is most
The application field of closeness to life is automatic data logging field.
Summary of the invention:
It is the high property that can carry out automatic data logging the purpose of the utility model is to provide a kind of communication device based on LORA
It can wireless device.
Above-mentioned purpose is realized by following technical scheme:
FPC antenna 2, the square shell body is arranged in the upper end of a kind of communication device based on LORA, square shell body 1
USB interface 3 is arranged in 1 side, and power switch 4 is arranged on the top surface of the square shell body 1,
The FPC antenna 2 is fixedly welded on J1 on piece, one end of the J1 piece connection diode D1, capacitor C5
One end, one end of inductance C7, resistance R11 one end and interface J2 one end, the diode D1 the other end ground connection, it is described
Capacitor C5 the other end ground connection, the inductance C7 the other end ground connection, the interface J2 the other end ground connection,
One end of one end connection capacitor C24 of the resistance R11 and one end of capacitor C23, the capacitor C24's is another
One end ground connection, the end IN of the other end connection chip U2 of the capacitor C23,
One end of the vdd terminal connection capacitor C9 of the chip U2 and one end of resistance R3, the capacitor C9's is another
End ground connection, No. 26 ends of the other end connection chip U3 of the resistance R3, the end VCON of the chip U2 connects capacitor C22
One end and resistance R2 one end, the other end ground connection of the capacitor C22, the other end of the resistance R2 connects chip U3
No. 27 end,
One end, one end of capacitor C20 and one end of inductance L6 of the end the OUT2 connection capacitor C21 of the chip U2, institute
The other end of the capacitor C20 stated connects the one of the other end of inductance L6, one end of inductance L5, one end of capacitor C18 and capacitor C19
End, the other end, one end of capacitor C17 and one end of resistance R10 of the other end connection capacitor C18 of the inductance L5 are described
The other end of capacitor C21, the other end of capacitor C19, capacitor C17 the other end be grounded respectively,
One end of the end the OUT1 connection capacitor C8 of the chip U2.
Further, one end of the other end connection capacitor C16 of the resistance R10, the other end of the capacitor C16
One end of one end of capacitor C15, one end of inductance L3 and inductance L8 is connected, the other end ground connection of the capacitor C15 is described
One end, one end of capacitor C13 and No. 25 of chip U1 of the other end connection capacitor C12 of inductance L3 are held, the inductance L8's
The other end connects No. 26 ends of chip U1, and No. 24 ends of the chip U1 connect one end of one end of capacitor C11, capacitor C10
With operating voltage VDD_RFS, after the other end of No. 23 of chip U1 end connection capacitor C11 and the other end of capacitor C10
Ground connection,
One end of the other end connection resistance R1 of the capacitor C8, the other end connection capacitor C7's of the resistance R1
One end, one end of the other end connection capacitor C6 of the capacitor C7 and one end of capacitor C35, the other end of the capacitor C6
Ground connection, the one end at No. 1 end and inductance L1 of the other end connection chip U1 of the capacitor C35, the inductance L1's is another
End is grounded, and is grounded after No. 2 end series capacitance C4 of the chip U1, and the one of No. 3 end connection capacitor C3 of the chip U1
The other end of end and operating voltage VDD_RFS, the capacitor C3 are grounded, after No. 4 end series capacitance C5 of the chip U1
Ground connection, one end of No. 7 end connection resistance R16 of the chip U1, the other end connection capacitor C36's of the resistance R16
No. 2 ends of one end and chip U3, the other end ground connection of the capacitor C36,
The one end at No. 3 ends and capacitor C2 of No. 5 end connection chip U4 of the chip U1, No. 6 of the chip U1
The one end at No. 1 end and capacitor C1 of end connection chip U4, the other end of the capacitor C1 connect respectively with the other end of capacitor C2
Ground, No. 4 ends ground connection of No. 2 end connection chip U4 of the chip U4,
One end of No. 14 end connection capacitor C34 of the chip U1 and operating voltage VDD_RFS, the chip U1's
No. 15 end ground connection,
No. 3 ends of No. 8 end connection chip U3 of the chip U1, the 4 of No. 9 end connection chip U3 of the chip U1
Number end, No. 20 ends of No. 10 of chip U1 end connection chip U3, the 5 of No. 11 end connection chip U3 of the chip U1
Number end, No. 8 ends of No. 12 of chip U1 end connection chip U3, the 9 of No. 13 end connection chip U3 of the chip U1
Number end,
No. 17 ends of No. 16 end connection chip U3 of the chip U1, No. 17 ends of the chip U1 connect chip U3
No. 19 ends, No. 18 ends of No. 18 of chip U1 end connection chip U3, No. 19 ends connection chip of the chip U1
No. 16 ends of U3, No. 15 ends of No. 20 end connection chip U3 of the chip U1.
Further, one end of one end of No. 1 end connection resistance R7 of the chip U3 and capacitor C31, the electricity
Hold the other end ground connection of C31, the other end of the resistance R7 connects operating voltage V3.3, No. 28 ends string of the chip U3
Operating voltage V3.3 is connected after joining resistance R13,
One end of the operating voltage V3.3 connection capacitor C32 and one end of capacitor C33, the capacitor C32's is another
It is grounded after the other end of one end connection capacitor C33,
One end of No. 12 end connection resistance R4 of the chip U3 and the grid G of field-effect tube Q4, the field-effect
The drain D connection other end of resistance R4, one end of capacitor C29, one end of capacitor C30, one end of resistance R6, the work electricity of pipe Q4
Press V3.3, the source S of field-effect tube Q4 and the other end of operating voltage VDD_RFS, the capacitor C29, capacitor C30 it is another
One end, resistance R6 the other end be grounded.
The utility model has the advantages that
It 1. the FPC antenna of the utility model is flexible, can be deformed according to actual needs, avoid damage signal and pass
Defeated sensitizing range achievees the purpose that the most effective transmission of signal.
2. include oscillator inside the chip U3 of the utility model, without that meet demand and in this way can may be used in external crystal oscillator
To reduce power consumption.
Detailed description of the invention:
Attached drawing 1 is the structural schematic diagram of the utility model.
Attached drawing 2 is the circuit diagram of the utility model (a) chip U1, (b) circuit diagram of chip U4, (c) circuit of chip U2
Figure, constitutes the RF circuit diagram of LORA module.
Attached drawing 3 is the circuit diagram of the utility model (a) chip U3, (b) circuit diagram of field-effect tube Q4, (c) capacitor C32 with
The combinational circuit diagram of C33 constitutes the MCU circuit diagram of LORA module.
Specific embodiment:
FPC antenna 2, the square shell body is arranged in the upper end of a kind of communication device based on LORA, square shell body 1
USB interface 3 is arranged in 1 side, and power switch 4 is arranged on the top surface of the square shell body 1,
The FPC antenna 2 is fixedly welded on J1 on piece, one end of the J1 piece connection diode D1, capacitor C5
One end, one end of inductance C7, resistance R11 one end and interface J2 one end, the diode D1 the other end ground connection, it is described
Capacitor C5 the other end ground connection, the inductance C7 the other end ground connection, the interface J2 the other end ground connection,
One end of one end connection capacitor C24 of the resistance R11 and one end of capacitor C23, the capacitor C24's is another
One end ground connection, the end IN of the other end connection chip U2 of the capacitor C23,
One end of the vdd terminal connection capacitor C9 of the chip U2 and one end of resistance R3, the capacitor C9's is another
End ground connection, No. 26 ends of the other end connection chip U3 of the resistance R3, the end VCON of the chip U2 connects capacitor C22
One end and resistance R2 one end, the other end ground connection of the capacitor C22, the other end of the resistance R2 connects chip U3
No. 27 end,
One end, one end of capacitor C20 and one end of inductance L6 of the end the OUT2 connection capacitor C21 of the chip U2, institute
The other end of the capacitor C20 stated connects the one of the other end of inductance L6, one end of inductance L5, one end of capacitor C18 and capacitor C19
End, the other end, one end of capacitor C17 and one end of resistance R10 of the other end connection capacitor C18 of the inductance L5 are described
The other end of capacitor C21, the other end of capacitor C19, capacitor C17 the other end be grounded respectively,
One end of the end the OUT1 connection capacitor C8 of the chip U2.
RF chip is mainly made of chip U1, and the modulation conciliation of radio-frequency receiving-transmitting is completed by chip U1, in order to control function
Consumption has still used chip U2 as RF switch, further decreases energy consumption to close radio frequency when not in use, chip U2 has
One switch control terminal is controlled by chip U3, and in addition chip U1 is further equipped with power supply control, more thoroughly to control power consumption.
Further, one end of the other end connection capacitor C16 of the resistance R10, the other end of the capacitor C16
One end of one end of capacitor C15, one end of inductance L3 and inductance L8 is connected, the other end ground connection of the capacitor C15 is described
One end, one end of capacitor C13 and No. 25 of chip U1 of the other end connection capacitor C12 of inductance L3 are held, the inductance L8's
The other end connects No. 26 ends of chip U1, and No. 24 ends of the chip U1 connect one end of one end of capacitor C11, capacitor C10
With operating voltage VDD_RFS, after the other end of No. 23 of chip U1 end connection capacitor C11 and the other end of capacitor C10
Ground connection,
One end of the other end connection resistance R1 of the capacitor C8, the other end connection capacitor C7's of the resistance R1
One end, one end of the other end connection capacitor C6 of the capacitor C7 and one end of capacitor C35, the other end of the capacitor C6
Ground connection, the one end at No. 1 end and inductance L1 of the other end connection chip U1 of the capacitor C35, the inductance L1's is another
End is grounded, and is grounded after No. 2 end series capacitance C4 of the chip U1, and the one of No. 3 end connection capacitor C3 of the chip U1
The other end of end and operating voltage VDD_RFS, the capacitor C3 are grounded, after No. 4 end series capacitance C5 of the chip U1
Ground connection, one end of No. 7 end connection resistance R16 of the chip U1, the other end connection capacitor C36's of the resistance R16
No. 2 ends of one end and chip U3, the other end ground connection of the capacitor C36,
The one end at No. 3 ends and capacitor C2 of No. 5 end connection chip U4 of the chip U1, No. 6 of the chip U1
The one end at No. 1 end and capacitor C1 of end connection chip U4, the other end of the capacitor C1 connect respectively with the other end of capacitor C2
Ground, No. 4 ends ground connection of No. 2 end connection chip U4 of the chip U4,
One end of No. 14 end connection capacitor C34 of the chip U1 and operating voltage VDD_RFS, the chip U1's
No. 15 end ground connection,
No. 3 ends of No. 8 end connection chip U3 of the chip U1, the 4 of No. 9 end connection chip U3 of the chip U1
Number end, No. 20 ends of No. 10 of chip U1 end connection chip U3, the 5 of No. 11 end connection chip U3 of the chip U1
Number end, No. 8 ends of No. 12 of chip U1 end connection chip U3, the 9 of No. 13 end connection chip U3 of the chip U1
Number end,
No. 17 ends of No. 16 end connection chip U3 of the chip U1, No. 17 ends of the chip U1 connect chip U3
No. 19 ends, No. 18 ends of No. 18 of chip U1 end connection chip U3, No. 19 ends connection chip of the chip U1
No. 16 ends of U3, No. 15 ends of No. 20 end connection chip U3 of the chip U1.
Further, one end of one end of No. 1 end connection resistance R7 of the chip U3 and capacitor C31, the electricity
Hold the other end ground connection of C31, the other end of the resistance R7 connects operating voltage V3.3, No. 28 ends string of the chip U3
Operating voltage V3.3 is connected after joining resistance R13,
One end of the operating voltage V3.3 connection capacitor C32 and one end of capacitor C33, the capacitor C32's is another
It is grounded after the other end of one end connection capacitor C33,
One end of No. 12 end connection resistance R4 of the chip U3 and the grid G of field-effect tube Q4, the field-effect
The drain D connection other end of resistance R4, one end of capacitor C29, one end of capacitor C30, one end of resistance R6, the work electricity of pipe Q4
Press V3.3, the source S of field-effect tube Q4 and the other end of operating voltage VDD_RFS, the capacitor C29, capacitor C30 it is another
One end, resistance R6 the other end be grounded.
The model STM8L151G6U6 of chip U3 uses simple appearance resistance and resets, and not only meets needs but also can reduce function
Consumption.
The connection wireless power source control circuit of chip U3 meets daily power demands, and used in circuit design in satisfaction
Under the conditions of reduce power consumption guarantee wireless power source power supply be able to satisfy demand.
Chip U3 additionally provides the serial port module of RF transceiving chip, and to connect external loading, this control MCU is at least needed
Want a UART port, it is necessary to low-power consumption.
Certainly, the above description is not intended to limit the present invention, and the utility model is also not limited to the example above,
The variations, modifications, additions or substitutions that those skilled in the art are made in the essential scope of the utility model, are also answered
Belong to the protection scope of the utility model.
Claims (3)
1. a kind of communication device based on LORA, it is characterized in that: FPC antenna (2) are arranged in the upper end of square shell body (1), it is described
The side of square shell body (1) USB interface (3) are set, power switch is set on the top surface of the square shell body (1)
(4),
The FPC antenna (2) is fixedly welded on J1 on piece, one end of the J1 piece connection diode D1, capacitor C5 one
End, one end of inductance C7, resistance R11 one end and interface J2 one end, the diode D1 the other end ground connection, it is described
The other end of capacitor C5 is grounded, the other end ground connection of the inductance C7, the other end ground connection of the interface J2,
One end of one end connection capacitor C24 of the resistance R11 and one end of capacitor C23, the other end of the capacitor C24
Ground connection, the end IN of the other end connection chip U2 of the capacitor C23,
One end of the vdd terminal connection capacitor C9 of the chip U2 and one end of resistance R3, another termination of the capacitor C9
Ground, No. 26 ends of the other end connection chip U3 of the resistance R3, the one of the end the VCON connection capacitor C22 of the chip U2
The one end at end and resistance R2, the other end ground connection of the capacitor C22, the 27 of the other end connection chip U3 of the resistance R2
Number end,
One end, one end of capacitor C20 and one end of inductance L6 of the end the OUT2 connection capacitor C21 of the chip U2, it is described
The other end of capacitor C20 connects one end and one end of capacitor C19 of the other end of inductance L6, one end of inductance L5, capacitor C18,
The other end, one end of capacitor C17 and one end of resistance R10 of the other end connection capacitor C18 of the inductance L5, the electricity
Hold the other end of C21, the other end of capacitor C19, capacitor C17 the other end be grounded respectively,
One end of the end the OUT1 connection capacitor C8 of the chip U2.
2. a kind of communication device based on LORA according to claim 1, it is characterized in that: the resistance R10's is another
One end of end connection capacitor C16, one end of other end connection capacitor C15, one end of inductance L3 and the inductance of the capacitor C16
One end of L8, the other end ground connection of the capacitor C15, one end of the other end connection capacitor C12 of the inductance L3, capacitor
One end of C13 and No. 25 ends of chip U1, No. 26 ends of the other end connection chip U1 of the inductance L8, the chip U1
No. 24 ends connection one end of capacitor C11, one end of capacitor C10 and No. 23 of operating voltage VDD_RFS, the chip U1 hold
It is grounded after connecting the other end and the other end of capacitor C10 of capacitor C11,
One end of the other end connection resistance R1 of the capacitor C8, the one of the other end connection capacitor C7 of the resistance R1
End, one end of the other end connection capacitor C6 of the capacitor C7 and one end of capacitor C35, another termination of the capacitor C6
Ground, the one end at No. 1 end and inductance L1 of the other end connection chip U1 of the capacitor C35, the other end of the inductance L1
It is grounded, is grounded after No. 2 end series capacitance C4 of the chip U1, one end of No. 3 end connection capacitor C3 of the chip U1
It is grounded with the other end of operating voltage VDD_RFS, the capacitor C3, No. 4 end series capacitance C5 of the chip U1 are followed by
Ground, one end of No. 7 end connection resistance R16 of the chip U1, the one of the other end connection capacitor C36 of the resistance R16
No. 2 ends at end and chip U3, the other end ground connection of the capacitor C36,
The one end at No. 3 ends and capacitor C2 of No. 5 end connection chip U4 of the chip U1, No. 6 ends of the chip U1 connect
The one end at No. 1 end and capacitor C1 of chip U4 is connect, the other end of the capacitor C1 is grounded respectively with the other end of capacitor C2, institute
No. 4 ends ground connection of No. 2 end connection chip U4 of the chip U4 stated,
One end of No. 14 end connection capacitor C34 of the chip U1 and operating voltage VDD_RFS, No. 15 of the chip U1
End ground connection,
No. 3 ends of No. 8 end connection chip U3 of the chip U1, No. 4 of No. 9 end connection chip U3 of the chip U1
End, No. 20 ends of No. 10 end connection chip U3 of the chip U1, No. 5 of No. 11 end connection chip U3 of the chip U1
End, No. 8 ends of No. 12 end connection chip U3 of the chip U1, No. 9 of No. 13 end connection chip U3 of the chip U1
End,
No. 17 ends of No. 16 end connection chip U3 of the chip U1, the 19 of No. 17 end connection chip U3 of the chip U1
Number end, No. 18 ends of No. 18 of chip U1 end connection chip U3, No. 19 end connection chip U3's of the chip U1
No. 16 ends, No. 15 ends of No. 20 end connection chip U3 of the chip U1.
3. a kind of communication device based on LORA according to claim 2, it is characterized in that: No. 1 of the chip U3 is held
One end of resistance R7 and one end of capacitor C31 are connected, the other end ground connection of the capacitor C31, the resistance R7's is another
Operating voltage V3.3 is connected after end connection operating voltage V3.3, No. 28 end series resistance R13 of the chip U3,
One end of the operating voltage V3.3 connection capacitor C32 and one end of capacitor C33, the other end of the capacitor C32
It is grounded after connecting the other end of capacitor C33,
One end of No. 12 end connection resistance R4 of the chip U3 and the grid G of field-effect tube Q4, the field-effect tube Q4
Drain D connect the other end of resistance R4, one end of capacitor C29, one end of capacitor C30, one end of resistance R6, operating voltage
V3.3, the other end of the source S of field-effect tube Q4 and operating voltage VDD_RFS, the capacitor C29, capacitor C30 it is another
It holds, the other end of resistance R6 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920559773.1U CN209642659U (en) | 2019-04-23 | 2019-04-23 | A kind of communication device based on LORA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920559773.1U CN209642659U (en) | 2019-04-23 | 2019-04-23 | A kind of communication device based on LORA |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209642659U true CN209642659U (en) | 2019-11-15 |
Family
ID=68497808
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920559773.1U Expired - Fee Related CN209642659U (en) | 2019-04-23 | 2019-04-23 | A kind of communication device based on LORA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209642659U (en) |
-
2019
- 2019-04-23 CN CN201920559773.1U patent/CN209642659U/en not_active Expired - Fee Related
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| Date | Code | Title | Description |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20191115 Termination date: 20210423 |
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| CF01 | Termination of patent right due to non-payment of annual fee |