CN209375223U - Power down delay circuit - Google Patents
Power down delay circuit Download PDFInfo
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- CN209375223U CN209375223U CN201920448499.0U CN201920448499U CN209375223U CN 209375223 U CN209375223 U CN 209375223U CN 201920448499 U CN201920448499 U CN 201920448499U CN 209375223 U CN209375223 U CN 209375223U
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- power supply
- delay circuit
- down delay
- power down
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Abstract
The utility model relates to power electronic equipment fields, and electric energy can be stored by being related specifically to one kind, the power down delay circuit for allowing electronic equipment to lengthen working hours.Power down delay circuit, including DC/DC power supply, the input terminal and output end of the DC/DC power supply are connected separately with the end VIN and the end VOUT, and charging paths are connected between the end VIN and DC/DC power supply, are connected with discharge paths between the end VOUT and DC/DC power supply；The charging paths are connected with discharge paths by storage discharge cell.The power down delay circuit of the utility model improves the working time for extending electronic equipment, facilitates the preservation of data, reduce loss by DC/DC power supply, charging paths, discharge paths and the cooperation of storage discharge cell Deng.
Description
Technical field
The utility model relates to power electronic equipment fields, and electric energy can be stored by being related specifically to one kind, allow electronic equipment
The power down delay circuit lengthened working hours.
Background technique
The equipment such as the driving instrument, acquisition driver, the intelligent power distribution control box that configure on automobile at present, driving instrument is disconnected
Data save when electric and pointer is zeroed, and acquire driver and intelligent power distribution control box needs to save data, due to writing for memory
The limitation of indegree cannot ceaselessly save data, and solution traditional at present is that timing saves data, and timing saves data
The defect of strategy be that will appear loss of data, when the time point of power-off and the time point of timing have big difference, can lose
Lose biggish data, it is therefore desirable to which electric energy is replenished in time when power-off in a kind of device, extends the working time of electronic equipment.
Utility model content
The technical problem to be solved by the utility model is to provide a kind of power down delay circuits, improve and extend electronics
The working time of equipment facilitates the preservation of data, reduces loss.
The utility model is achieved through the following technical solutions: power down delay circuit, including DC/DC power supply, the DC/DC power supply
Input terminal and output end be connected separately with the end VIN and the end VOUT, be connected with and fill between the end VIN and DC/DC power supply
Electric branch is connected with discharge paths between the end VOUT and DC/DC power supply；The charging paths and discharge paths pass through
The connection of storage discharge cell.
Further, to better implement the utility model, especially using such as following settings: the storage discharge cell
Including sequentially connected resistance R1, R2, R3, R4 and R5, described resistance R1, R2, R3, R4 and R5 are parallel with capacitor respectively
C1, C2, C3, C4 and C5；Described one end R1 is connect with R2, and the other end is connect with the charging paths, the electric discharge
Branch and C4 are connected with the junction of C5.
Further, to better implement the utility model, especially using such as following settings: the resistance R1, R2,
R3, R4 and R5 are also parallel with zener diode D1, D2, D3, D4 and D5 respectively.
Further, to better implement the utility model, especially using such as following settings: the charging paths include
Electronic switch DK1, diode D6 and electronic switch DK3, the discharge paths include DK2, diode D7 and DK4；Institute
The input terminal of the input termination DC/DC power supply of the DK1 stated, the output end and the input terminal of DK2 of DK1, the anode of D6, D7 cathode
It is connected, the output end of the output end connection DC/DC power supply of DK2；The output end of the cathode of D6 and electronic switch DK3 input terminal, DK4
It is connected；The DK1 and DK3 respectively with DK2 and DK4 mutual exclusion.
Further, to better implement the utility model, especially using such as following settings: the D6 and as described in
Current-limiting resistance R6 is connected between DK3.
Further, to better implement the utility model, especially using such as following settings: the resistance R1, R2,
The resistance value of R3, R4 and R5 are equal, and the capacitance of described capacitor C1, C2, C3, C4 and C5 are equal.
Further, to better implement the utility model, especially using such as following settings: the zener diode
The parameter of D1, D2, D3, D4 and D5 are equal.
Further, such as following settings especially use to better implement the utility model: the DC/DC power supply for
28V turns 5V power supply.
The utility model has the following advantages and benefits: power down delay is added in the utility model in the electronic device
Circuit is provided for carrying out the pointer zero in data preservation and instrument of driving a vehicle for electronic equipment in the power-off of each electronic equipment
Enough electric energy.The power down delay circuit of the utility model, is put by DC/DC power supply, charging paths, discharge paths and storage
The cooperation of electric unit Deng improves the working time for extending electronic equipment, facilitates the preservation of data, reduces loss.
Detailed description of the invention
Attached drawing described herein is used to provide to further understand the utility model embodiment, constitutes the one of the application
Part does not constitute the restriction to the utility model embodiment.
Fig. 1 is the circuit structure diagram of the power down delay circuit of the utility model；
Fig. 2 is schematic equivalent circuit when charging paths work；
Fig. 3 is schematic equivalent circuit when discharge paths work.
Specific embodiment
For the purpose of this utility model, technical solution and advantage is more clearly understood, below with reference to embodiment and attached drawing,
The utility model is described in further detail, and the exemplary embodiment and its explanation of the utility model are only used for explaining this
Utility model is not intended to limit the scope of the present invention.
Embodiment:
As shown in Figure 1 to Figure 3, the power down delay circuit of the utility model, including DC/DC power supply, the DC/DC power supply it is defeated
Enter end and output end is connected separately with the end VIN and the end VOUT, charging branch is connected between the end VIN and DC/DC power supply
Road is connected with discharge paths between the end VOUT and DC/DC power supply；The charging paths and discharge paths pass through storage
Discharge cell connection.
Power down delay circuit is added in the utility model in the electronic device, for being electronics in the power-off of each electronic equipment
Equipment carries out the pointer zero in data preservation and driving instrument and provides enough electric energy.The power down of the utility model is delayed electric
Road is improved by DC/DC power supply, charging paths, discharge paths and the cooperation of storage discharge cell Deng and is extended electronics and set
The standby working time facilitates the preservation of data, reduces loss.
The utility model has the advantages that be just judged as that equipment has powered off when input voltage is very low, not will cause equipment because
Power supply noise and cause to malfunction, can ensure and charge short but also ensure discharge time long advantage, and the utility model category
In high-voltage charging, low pressure discharge, it ensure that the electricity of capacitor is entirely used for equipment use, be not in LDO power supply or DC/DC
The decompression of power supply is lost.Guarantee energy effective utilization.
Preferably, on the basis of the above embodiments, to better implement the utility model, the storage electric discharge
Unit includes sequentially connected resistance R1, R2, R3, R4 and R5, and described resistance R1, R2, R3, R4 and R5 are parallel with respectively
Capacitor C1, C2, C3, C4 and C5；Described one end R1 is connect with R2, and the other end is connect with the charging paths, described
Discharge paths and C4 are connected with the junction of C5.Further, described resistance R1, R2, R3, R4 and R5 are also parallel with respectively
Zener diode D1, D2, D3, D4 and D5.It is worth noting that, resistance R1/R2, R3, R4 and R5 are that each capacitor charging mentions
For charge circuit, diode D1, D2, D3, D4 and D5 provide threshold values for each capacitor charging voltage, it is ensured that feelings of the equipment in power supply
Capacitor is not in overcharge under condition.
Preferably, on the basis of the above embodiments, to better implement the utility model, the charging paths
Including electronic switch DK1, diode D6 and electronic switch DK3, the discharge paths include DK2, diode D7 and
DK4；The input terminal of the input termination DC/DC power supply of the DK1, output end and the input terminal of DK2, the anode of D6, the D7 of DK1
Cathode be connected, the output end of the output end of DK2 connection DC/DC power supply；The cathode of D6 and electronic switch DK3 input terminal, DK4
Output end is connected；The DK1 and DK3 respectively with DK2 and DK4 mutual exclusion.Preferably, the D6 and the DK3 it
Between be connected with current-limiting resistance R6.As shown in the figure, D6, R6, DK1, DK3 constitute charge circuit, and DK2, DK4, D7 composition are discharged back
Road；When equipment normal power supply, DK1, DK3 conducting, DK2, DK4 are disconnected, and it is every that input current, which passes sequentially through DK1, D6, R6, DK3,
One capacitor charging.When equipment input power disconnect when, DK1, DK3 disconnections, DK2, DK4 conducting, capacitor discharge, by DK4,
D7, DK2 are equipment power supply.
Preferably, the resistance value of described resistance R1, R2, R3, R4 and R5 are equal, the capacitor C1, C2, C3,
The capacitance of C4 and C5 is equal.Preferably, the parameter of described zener diode D1, D2, D3, D4 and D5 are equal.In this way
After design, building and safeguarding for entire circuit structure can be facilitated, each resistance can be exchanged freely, each capacitor can oneself
By exchanging, each zener diode can also be exchanged freely.
Preferably, the DC/DC power supply is that 28V turns 5V power supply.When system has electricity, charging circuit with 28V into
Row charging is connected due to discharge paths and C4 with the junction of C5, voltage of the discharge voltage for C5, about 5V upon discharging,
When C5 electric energy is inadequate, electric energy can be obtained from C1, C2, C3 and C4 and continues to discharge, the power supply after greatly extending power down
Time facilitates preservation of the electronic equipment to various data, reduces loss.
Above-described specific embodiment, to the purpose of this utility model, technical scheme and beneficial effects carried out into
One step is described in detail, it should be understood that being not used to limit the foregoing is merely specific embodiment of the present utility model
Determine the protection scope of the utility model, within the spirit and principle of the utility model, any modification for being made equally is replaced
It changes, improve, should be included within the scope of protection of this utility model.
Claims (8)
1. power down delay circuit, it is characterised in that: including DC/DC power supply, the input terminal and output end of the DC/DC power supply connect respectively
Be connected to the end VIN and the end VOUT, be connected with charging paths between the end VIN and DC/DC power supply, the end VOUT and
Discharge paths are connected between DC/DC power supply；The charging paths are connected with discharge paths by storage discharge cell.
2. power down delay circuit according to claim 1, it is characterised in that: the storage discharge cell includes successively connecting
Resistance R1, R2, R3, R4 and the R5 connect, described resistance R1, R2, R3, R4 and R5 be parallel with respectively capacitor C1, C2, C3,
C4 and C5；Described one end R1 is connect with R2, and the other end is connect with the charging paths, and the discharge paths and C4 are same
The junction of C5 connects.
3. power down delay circuit according to claim 2, it is characterised in that: described resistance R1, R2, R3, R4 and the R5
It is also parallel with zener diode D1, D2, D3, D4 and D5 respectively.
4. power down delay circuit according to claim 1, it is characterised in that: the charging paths include electronic switch
DK1, diode D6 and electronic switch DK3, the discharge paths include DK2, diode D7 and DK4；The DK1's
The input terminal of input termination DC/DC power supply, the output end of DK1 are connected with the cathode of the input terminal of DK2, the anode of D6, D7, DK2
Output end connection DC/DC power supply output end；The cathode of D6 is connected with the output end of electronic switch DK3 input terminal, DK4；Institute
The DK1 and DK3 stated respectively with DK2 and DK4 mutual exclusion.
5. power down delay circuit according to claim 4, it is characterised in that: connected between the D6 and the DK3
Limited leakage resistance R6.
6. power down delay circuit according to claim 3, it is characterised in that: described resistance R1, R2, R3, R4 and the R5
Resistance value it is equal, the capacitance of described capacitor C1, C2, C3, C4 and C5 are equal.
7. power down delay circuit according to claim 6, it is characterised in that: described zener diode D1, D2, D3, the D4
And the parameter of D5 is equal.
8. power down delay circuit according to claim 1, it is characterised in that: the DC/DC power supply is that 28V turns 5V electricity
Source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920448499.0U CN209375223U (en) | 2019-04-04 | 2019-04-04 | Power down delay circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920448499.0U CN209375223U (en) | 2019-04-04 | 2019-04-04 | Power down delay circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209375223U true CN209375223U (en) | 2019-09-10 |
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ID=67824714
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920448499.0U Active CN209375223U (en) | 2019-04-04 | 2019-04-04 | Power down delay circuit |
Country Status (1)
| Country | Link |
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| CN (1) | CN209375223U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110071566A (en) * | 2019-04-04 | 2019-07-30 | 四川海天仪表电器开发有限公司 | Power down delay circuit |
| CN113109738A (en) * | 2021-03-15 | 2021-07-13 | 苏州汇川技术有限公司 | Power-down time detection circuit and power-down time detection system |
-
2019
- 2019-04-04 CN CN201920448499.0U patent/CN209375223U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110071566A (en) * | 2019-04-04 | 2019-07-30 | 四川海天仪表电器开发有限公司 | Power down delay circuit |
| CN113109738A (en) * | 2021-03-15 | 2021-07-13 | 苏州汇川技术有限公司 | Power-down time detection circuit and power-down time detection system |
| CN113109738B (en) * | 2021-03-15 | 2023-08-04 | 苏州汇川技术有限公司 | Power-down time detection circuit and power-down time detection system |
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