CN209311632U - A kind of test fixture - Google Patents
A kind of test fixture Download PDFInfo
- Publication number
- CN209311632U CN209311632U CN201822131702.XU CN201822131702U CN209311632U CN 209311632 U CN209311632 U CN 209311632U CN 201822131702 U CN201822131702 U CN 201822131702U CN 209311632 U CN209311632 U CN 209311632U
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- Prior art keywords
- bonding pad
- connector
- pad
- chip
- circuit board
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Abstract
The utility model discloses a kind of test fixtures.The test fixture includes: first circuit board, and the first circuit board includes the first chip bonding pad, the first connector bonding pad and test pin bonding pad；First chip bonding pad is for being arranged chip；The electrical connection corresponding with the pad of first chip bonding pad of the pad of first connector bonding pad, the electrical connection corresponding with the pad of first chip bonding pad of the pad of the test pin bonding pad；First connector, first connector are welded in first connector bonding pad；Test pin, the test pin are welded in the test pin bonding pad.The utility model is not necessarily to weld lead-out wire on test circuit board, but is drawn the signal of chip pin by test pin, improves the stability of chip testing.
Description
Technical field
The utility model embodiment is related to technical field of circuit board detection more particularly to a kind of test fixture.
Background technique
During carrying out chip testing to test circuit board, the chip on test circuit board is needed to be replaced frequently.For
Replacement chip is convenient, and the prior art uses the scheme that test bench is welded on test circuit board, and test bench when in use, needs
Test bench, which is welded on, to be needed then chip to be connected on test bench, on test circuit board to be tested without welding chip
On test circuit board.
However, when testing chip, it is also necessary to weld lead-out wire on chip pin and be carried out to the signal of chip
Detection.The chip more for pin, for example, packing forms are the chip of TSOP48, the pad of test bench is in test bench
Bottom, therefore, lead-out wire are needed from cabling is carried out between pad, and since the distance between pad is smaller, lead-out wire is arranged in this way
It is be easy to cause short circuit phenomenon, so that the prior art has the stability difference of test.
Utility model content
The utility model provides a kind of test fixture, to promote the stability of chip testing.
The utility model embodiment provides a kind of test fixture, which includes:
First circuit board, the first circuit board include that the first chip bonding pad, the first connector bonding pad and test are drawn
Foot bonding pad；First chip bonding pad is for being arranged chip；The pad of first connector bonding pad and described first
The corresponding electrical connection of the pad of chip bonding pad, the pad of the test pin bonding pad and the pad of first chip bonding pad
Corresponding electrical connection；
First connector, first connector are welded in first connector bonding pad；
Test pin, the test pin are welded in the test pin bonding pad.
Optionally, the first connector bonding pad includes: the first subregion and the second subregion；
Spacing between first subregion and second subregion is matched with the size of the chip.
Optionally, the lead pin pitch of the connector is equal with the lead pin pitch of the chip.
Optionally, the first circuit board further include: multiple resistance bonding pads, the resistance bonding pad are connected in series in institute
It states between the pad of the first chip bonding pad and the pad of the test pin bonding pad.
Optionally, two pad solders of the resistance bonding pad are together；
Alternatively, the test fixture further includes multiple resistance, the multiple resistance is corresponding to be welded in the multiple resistance company
Meet area.
Optionally, test fixture further include: test bench, the test bench are welded in first chip bonding pad, institute
Test bench is stated for installing the chip.
Optionally, the test fixture further include:
First connector bonding pad and first chip bonding pad are located at the two sides of the first circuit board；
The test fixture further includes second circuit board and row's needle, and the second circuit board is set to the first circuit board
One side close to first chip bonding pad；The second circuit board includes that the second chip bonding pad is connected with second row needle
Area；Second chip bonding pad is set to one side of the second circuit board far from the first circuit board；The second row
The electrical connection corresponding with the pad of second chip bonding pad of the pad of needle bonding pad；
The first circuit board further includes first row needle bonding pad, the pad of first row needle bonding pad and described first
The corresponding electrical connection of the pad of chip bonding pad；First row needle bonding pad and second row needle bonding pad pass through row's needle
Electrical connection；
The test bench is welded in second chip bonding pad.
Optionally, test fixture further include: the second connector, second connector are matched with first connector
Grafting.
Optionally, test fixture further include: tertiary circuit plate and third connector；
The tertiary circuit plate includes: the second connector bonding pad and cd-rom recorder bonding pad, the second connector connection
Weld the third connector in area；The pad of second connector bonding pad electricity corresponding with the pad of the cd-rom recorder bonding pad
Connection.
Optionally, which further includes flexible circuit board and the 4th connector, one end of the flexible circuit board with
The first connector connection, the other end of the flexible circuit board are connect with the 4th connector.
The utility model embodiment passes through setting first circuit board, the first connector and test pin, first circuit board packet
Include the first chip bonding pad, the first connector bonding pad and test pin bonding pad, the pad of test pin bonding pad and first
The corresponding electrical connection of the pad of chip bonding pad, test pin are welded in test pin bonding pad, compared with prior art, are not necessarily to
Lead-out wire is welded on test circuit board, but is drawn the signal of chip pin by test pin, improves chip testing
Stability.And lead-out wire is welded without using thinner soldering iron, welding difficulty is reduced, is avoided to test circuit board
Damage, to reduce the cost of chip testing.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of test fixture provided by the embodiment of the utility model；
Fig. 2 is a kind of overlooking structure diagram of first circuit board provided by the embodiment of the utility model；
Fig. 3 is a kind of present invention looks up structural representation of first circuit board provided by the embodiment of the utility model；
Fig. 4 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model；
Fig. 5 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model；
Fig. 6 is a kind of overlooking structure diagram of second circuit board provided by the embodiment of the utility model；
Fig. 7 is a kind of present invention looks up structural representation of second circuit board provided by the embodiment of the utility model；
Fig. 8 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model；
Fig. 9 is a kind of overlooking structure diagram of tertiary circuit plate provided by the embodiment of the utility model；
Figure 10 is a kind of present invention looks up structural representation of tertiary circuit plate provided by the embodiment of the utility model；
Figure 11 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model.
Specific embodiment
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model, rather than the restriction to the utility model.It further needs exist for
It is bright, part relevant to the utility model is illustrated only for ease of description, in attached drawing rather than entire infrastructure.
The utility model embodiment provides a kind of test fixture.Fig. 1 is a kind of survey provided by the embodiment of the utility model
The structural schematic diagram of jig is tried, Fig. 2 is a kind of overlooking structure diagram of first circuit board provided by the embodiment of the utility model,
Fig. 3 is a kind of present invention looks up structural representation of first circuit board provided by the embodiment of the utility model.Referring to figures 1-3, the test
Jig includes: first circuit board 10, the first connector 20 and test pin 30.First circuit board 10 includes the first chip bonding pad
11, the first connector bonding pad 12 and test pin bonding pad 13；First chip bonding pad 11 is for being arranged chip；First connection
The electrical connection corresponding with the pad of the first chip bonding pad 11 of the pad of device bonding pad 12, the pad of test pin bonding pad 13 and the
The corresponding electrical connection of the pad of one chip bonding pad 11.First connector 20 is welded in the first connector bonding pad 12.Test pin
30 are welded in test pin bonding pad 13.
Wherein, connector is also known as connector, and connector may include male seat and base.Illustratively, the test fixture
Including two the first connectors 20, the first connector 20 can be welded on first circuit board 10 for the male seat in connector, male seat
On, it is electrically connected with the circuit realization on first circuit board 10.Base is welded on test circuit board, with the electricity on test circuit board
Realize electrical connection in road.It is that chip 40 is welded on the first of first circuit board 10 using the process that the test fixture is tested
The base grafting in the male seat and test circuit board of the test fixture of chip 40 will be welded, to circuit board in chip bonding pad 11
Power up test is carried out, test pin 30 is connected to the output signal for observing chip pin in measuring instrument.
The utility model embodiment passes through setting first circuit board 10, the first connector 20 and test pin 30, the first electricity
Road plate 10 includes the first chip bonding pad 11, the first connector bonding pad 12 and test pin bonding pad 13, test pin connection
The electrical connection corresponding with the pad of the first chip bonding pad 11 of the pad in area 13, test pin 30 are welded in test pin bonding pad
13, compared with prior art, without welding lead-out wire on test circuit board, but pass through test pin 30 for chip pin
Signal is drawn, and the stability of the test of chip 40 is improved.And lead-out wire is welded without using thinner soldering iron, reduce weldering
Difficulty is connect, the damage to test circuit board is avoided, to reduce the cost of chip testing.
On the basis of the various embodiments described above, optionally, test fixture further include: the second connector, the second connector with
First connector 20 matches grafting.Wherein, the second connector for example can be base.The mistake tested using the test fixture
Second connector is welded on test circuit board by Cheng Wei, and the first chip that chip 40 is welded on first circuit board 10 is connected
Area 11 will be welded the base grafting in the male seat and test circuit board of the test fixture of chip 40, power on to circuit board
Test pin 30 is connected to the output signal that chip pin is observed in measuring instrument by test.
With continued reference to Fig. 2 and Fig. 3, on the basis of the various embodiments described above, optionally, the first connector bonding pad 12 packet
Include: the first subregion and the second subregion, the spacing between the first subregion and the second subregion are matched with the size of chip 40.It is exemplary
Ground, chip 40 can be (the single-level cell of single layer cell nand flash memory chip 40 that packing forms are TSOP48
NAND flash, SLC NAND flash), the number of pads of the first subregion is 24, and the number of pads of the second subregion is 24,
One first connector 20 is respectively welded on first subregion and the second subregion.Spacing between first subregion and the second subregion to seal
Dress form is that the pin of the chip 40 of TSOP48 can be directly welded on the pad of the first subregion and the second subregion.
It should be noted that in the above embodiments, being two with the quantity of the first connector 20 and being illustrated, not
Four the first connectors 20 can also be arranged in other embodiments in restriction to the utility model, in practical applications can be with
It is set as needed.
On the basis of the various embodiments described above, optionally, between the lead pin pitch of the first connector 20 and the pin of chip 40
Away from equal, correspondingly, the lead pin pitch of the second connector is equal with the lead pin pitch of chip 40, so that the second connector energy
It is enough welded on test circuit board, is welded on the pad for welding chip 40, is conducive to the welding of the second connector.
With continued reference to Fig. 2 and Fig. 3, on the basis of the various embodiments described above, optionally, first circuit board 10 further include: more
A resistance bonding pad 14, resistance bonding pad 14 are connected in series in pad and the test pin bonding pad 13 of the first chip bonding pad 11
Pad between.Wherein resistance bonding pad 14 avoids test pin 30 for welding kesistance to increase build-out resistor in circuit
Upper test signal overshoot it is excessive, to test signal be finely adjusted.
On the basis of the various embodiments described above, optionally, two pad solders of resistance bonding pad 14 are together；Alternatively,
Test fixture further includes multiple resistance, and multiple resistance correspondences are welded in multiple resistance bonding pads 14.Wherein, when test signal is not required to
When being finely adjusted, two pads for connecting resistance are shorted together, is equivalent between two pads and is connected by conducting wire.When
Test signal is when needing to be finely adjusted, in corresponding first chip bonding pad 11 pad and test pin bonding pad 13 in it is right
Build-out resistor is welded between two pads of the resistance bonding pad 14 between the pad answered.
Fig. 4 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model, referring to fig. 4, above-mentioned
On the basis of each embodiment, optionally, the test fixture further include: test bench 50, test bench 50 are welded in the connection of the first chip
Area, test bench 50 are used for chip 40.Illustratively, if the packing forms of chip 40 are TSOP48, test bench 50 is
The fixture of TSOP48, when chip 40, chip 40 can be pressed on test bench 50, it is not necessary that chip 40 is welded on circuit
On plate, to facilitate the replacement of chip 40.
Fig. 5 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model, and Fig. 6 is the utility model
A kind of overlooking structure diagram for second circuit board that embodiment provides, Fig. 7 are provided by the embodiment of the utility model a kind of the
The present invention looks up structural representation of two circuit boards.Referring to Fig. 5-Fig. 7, on the basis of the various embodiments described above, optionally, the first connector
Bonding pad 12 and the first chip bonding pad 11 are located at the two sides of first circuit board 10.Test fixture further includes second circuit board
60 are set to first circuit board 10 close to the first chip bonding pad 11 with row's needle (being not shown in Fig. 5-Fig. 7), second circuit board 60
One side；Second circuit board 60 includes the second chip bonding pad 61 and second row needle bonding pad 65；Second chip bonding pad 61 is set
It is placed in one side of the second circuit board 60 far from first circuit board 10；The pad of second row needle bonding pad 65 and the second chip bonding pad
The corresponding electrical connection of 61 pad.Test bench 50 is welded in the second chip bonding pad 61.With continued reference to Fig. 2 and Fig. 3, first circuit board
10 further include first row needle bonding pad 15, the pad of first row needle bonding pad 15 electricity corresponding with the pad of the first chip bonding pad 11
Connection；First row needle bonding pad 15 is electrically connected with second row needle bonding pad 65 by arranging needle.The utility model embodiment by
First row needle bonding pad 15 is set on first circuit board 10 and second circuit board 60 is electrically connected, test bench 50 is welded on second circuit
On plate 60, it is not necessary that chip 40 is welded on circuit boards, to facilitate the replacement of chip 40.
With continued reference to Fig. 6 and Fig. 7, on the basis of the various embodiments described above, optionally, the size of second circuit board 60 is greater than
The size of first circuit board 10, second circuit board 60 further include the second test pin bonding pad 63, the second test pin bonding pad
63 pad is electrically connected with the pad of the second chip bonding pad 61.The ruler of the utility model embodiment setting second circuit board plate 60
The very little size greater than first circuit board 10, is conducive to test bench 50 and is welded on second circuit board plate 60, and in second circuit board
Second test pin bonding pad 63 is set on 60, facilitates the test to test point.
Fig. 8 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model, and Fig. 9 is the utility model
A kind of overlooking structure diagram for tertiary circuit plate that embodiment provides, Figure 10 are provided by the embodiment of the utility model a kind of the
The present invention looks up structural representation of three-circuit plate.Referring to Fig. 8-Figure 10, on the basis of the various embodiments described above, optionally, which is controlled
Tool further includes tertiary circuit plate 70 and third connector 80.Tertiary circuit plate 70 includes: the second connector bonding pad 71 and burning
Third connector 80 is welded in device bonding pad 72, the second connector bonding pad 71；The pad of second connector bonding pad 71 and burning
The corresponding electrical connection of the pad of device bonding pad 72.
Wherein, illustratively, the first connector 20 is male seat, and third connector 80 is base.Using the test fixture into
The process of row burning is that will be welded with the third of the first connector 20 and tertiary circuit plate 70 of the first circuit board 10 of chip 40
Connector 80 is plugged in together, and tertiary circuit plate 70 is electrically connected with cd-rom recorder, and cd-rom recorder is to 40 recordable paper of chip.Test is controlled
Tool setting tertiary circuit plate 70 and third connector 80, it is not necessary that chip 40 is welded from first circuit board 10, the first circuit
Plate 10 is directly attached by tertiary circuit plate 70 with cd-rom recorder, is facilitated and is carried out burning text to chip 40 during the test
Part.
Figure 11 is the structural schematic diagram of another test fixture provided by the embodiment of the utility model.Referring to Figure 11, the survey
Examination jig further includes flexible circuit board 90 and the 4th connector 91, and one end of flexible circuit board 90 and the first connector are (in Figure 11
It is not shown) it connects, the other end of flexible circuit board 90 is connect with the 4th connector 91.Illustratively, the 4th connector 91 can be with
For the male seat of flat-cable connector, base is welded on test circuit board.It is using the process that the test fixture is tested,
Chip 40 is welded on to the first chip bonding pad 11 of first circuit board 10, will be welded the male seat of the test fixture of chip 40 with
The base grafting on circuit board is tested, power up test is carried out to circuit board, test pin 30 is connected in measuring instrument and is observed
The output signal of chip pin.
The utility model embodiment passes through setting first circuit board 10, the first connector 20 and test pin 30, the first electricity
Road plate 10 includes the first chip bonding pad 11, the first connector bonding pad 12 and test pin bonding pad 13, test pin connection
The electrical connection corresponding with the pad of the first chip bonding pad 11 of the pad in area 13, test pin 30 are welded in test pin bonding pad
13, compared with prior art, without welding lead-out wire on test circuit board, but pass through test pin 30 for chip pin
Signal is drawn, and the stability of the test of chip 40 is improved.And lead-out wire is welded without using thinner soldering iron, reduce weldering
Difficulty is connect, the damage to test circuit board is avoided, to reduce the cost of chip testing.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, is able to carry out for a person skilled in the art various bright
Aobvious variation, readjustment and substitution is without departing from the protection scope of the utility model.Therefore, although passing through above embodiments
The utility model is described in further detail, but the utility model is not limited only to above embodiments, is not departing from
It can also include more other equivalent embodiments in the case that the utility model is conceived, and the scope of the utility model is by appended
Scope of the claims determine.
Claims (10)
1. a kind of test fixture characterized by comprising
First circuit board, the first circuit board include that the first chip bonding pad, the first connector bonding pad and test pin connect
Meet area；First chip bonding pad is for being arranged chip；The pad of first connector bonding pad and first chip
The corresponding electrical connection of the pad of bonding pad, the pad of the test pin bonding pad are corresponding with the pad of first chip bonding pad
Electrical connection；
First connector, first connector are welded in first connector bonding pad；
Test pin, the test pin are welded in the test pin bonding pad.
2. test fixture according to claim 1, which is characterized in that the first connector bonding pad include: the first subregion and
Second subregion；
Spacing between first subregion and second subregion is matched with the size of the chip.
3. test fixture according to claim 1, which is characterized in that the lead pin pitch of the connector and the chip
Lead pin pitch is equal.
4. test fixture according to claim 1, which is characterized in that the first circuit board further include: multiple resistance connect
Area is met, the resistance bonding pad is connected in series in the pad of first chip bonding pad and the weldering of the test pin bonding pad
Between disk.
5. test fixture according to claim 4, which is characterized in that
Two pad solders of the resistance bonding pad are together；
Alternatively, the test fixture further includes multiple resistance, the multiple resistance correspondence is welded in the multiple resistance bonding pad.
6. test fixture according to claim 1, which is characterized in that further include: test bench, the test bench are welded in institute
The first chip bonding pad is stated, the test bench is for installing the chip.
7. test fixture according to claim 6, which is characterized in that further include:
First connector bonding pad and first chip bonding pad are located at the two sides of the first circuit board；
The test fixture further includes second circuit board and row's needle, and it is close that the second circuit board is set to the first circuit board
The one side of first chip bonding pad；The second circuit board includes the second chip bonding pad and second row needle bonding pad；Institute
It states the second chip bonding pad and is set to one side of the second circuit board far from the first circuit board；The second row needle connection
The electrical connection corresponding with the pad of second chip bonding pad of the pad in area；
The first circuit board further includes first row needle bonding pad, the pad of first row needle bonding pad and first chip
The corresponding electrical connection of the pad of bonding pad；First row needle bonding pad is electrically connected with second row needle bonding pad by row's needle
It connects；
The test bench is welded in second chip bonding pad.
8. test fixture according to claim 1, which is characterized in that further include: the second connector, second connector
Grafting is matched with first connector.
9. test fixture according to claim 1, which is characterized in that further include: tertiary circuit plate and third connector；
The tertiary circuit plate includes: the second connector bonding pad and cd-rom recorder bonding pad, the weldering of second connector bonding pad
Connect the third connector；The pad of second connector bonding pad is corresponding with the pad of the cd-rom recorder bonding pad to be electrically connected
It connects.
10. test fixture according to claim 1, which is characterized in that further include flexible circuit board and the 4th connector, institute
The one end for stating flexible circuit board is connect with first connector, the other end of the flexible circuit board and the 4th connector
Connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822131702.XU CN209311632U (en) | 2018-12-18 | 2018-12-18 | A kind of test fixture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822131702.XU CN209311632U (en) | 2018-12-18 | 2018-12-18 | A kind of test fixture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209311632U true CN209311632U (en) | 2019-08-27 |
Family
ID=67677560
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201822131702.XU Active CN209311632U (en) | 2018-12-18 | 2018-12-18 | A kind of test fixture |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209311632U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109342933A (en) * | 2018-12-18 | 2019-02-15 | 北京兆易创新科技股份有限公司 | A kind of test fixture |
| CN113866590A (en) * | 2021-09-03 | 2021-12-31 | 长江存储科技有限责任公司 | Detection piece and chip detection method |
-
2018
- 2018-12-18 CN CN201822131702.XU patent/CN209311632U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109342933A (en) * | 2018-12-18 | 2019-02-15 | 北京兆易创新科技股份有限公司 | A kind of test fixture |
| CN113866590A (en) * | 2021-09-03 | 2021-12-31 | 长江存储科技有限责任公司 | Detection piece and chip detection method |
| CN113866590B (en) * | 2021-09-03 | 2023-09-26 | 长江存储科技有限责任公司 | Detection part and chip detection method |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094 Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. |