CN209282231U - A kind of high brightness LED chip - Google Patents

A kind of high brightness LED chip Download PDF

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Publication number
CN209282231U
CN209282231U CN201822228330.2U CN201822228330U CN209282231U CN 209282231 U CN209282231 U CN 209282231U CN 201822228330 U CN201822228330 U CN 201822228330U CN 209282231 U CN209282231 U CN 209282231U
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electrode
hole
layer
insulating layer
semiconductor layer
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CN201822228330.2U
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仇美懿
庄家铭
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Foshan Nationstar Semiconductor Co Ltd
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Foshan Nationstar Semiconductor Co Ltd
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Abstract

The utility model discloses a kind of high brightness LED chips, including substrate, light emitting structure, electrode structure and insulating layer, the electrode structure includes first electrode, second electrode and at least two the first hole below first electrode is arranged in, the second electrode connects over transparent conductive layer through insulating layer, the first electrode setting is on the insulating layer, first hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends to the first semiconductor layer from the first hole and is conductively connected with the first semiconductor layer.First electrode is arranged on the insulating layer the utility model, and the first hole for being etched to the first semiconductor layer is formed in the lower section of first electrode, to be electrically connected by the first hole with the formation of the first semiconductor layer, therefore it does not need to perform etching light emitting structure, the light-emitting area for increasing chip to the maximum extent improves the brightness of chip.

Description

A kind of high brightness LED chip
Technical field
The utility model relates to LED technology field more particularly to a kind of high brightness LED chips.
Background technique
LED (Light Emitting Diode, light emitting diode) be it is a kind of using Carrier recombination when release energy shape At luminous semiconductor devices, LED chip is with power consumption is low, coloration is pure, the service life is long, small in size, the response time is fast, energy conservation and environmental protection Equal many advantages.
LED is an energy-efficient product, has gradually replaced traditional lighting in recent ten years, enters the neck of people's life Domain.But the price of LED illumination is still higher, each chip, encapsulation and finished product end compared with traditional lighting, none is not desired to do to the greatest extent Method promotes brightness, reduces cost, and then universalness.
It is the structural schematic diagram of existing LED chip referring to Fig. 1, Fig. 1, existing LED chip needs to carry out light emitting region MESA (Miniature Electrostatic Accelerometer) etching, N-type electrode is arranged in n type semiconductor layer On.The light-emitting area that chip can be greatly reduced in this way, reduces the brightness of chip.
Wherein, increasing light-emitting area is the prevalent means for increasing LED luminance, therefore how on effective chip size, Increase the area of luminescent quantum well, just becomes the target of current research.
Summary of the invention
Technical problem to be solved by the utility model is to provide a kind of high brightness LED chips, and brightness is high, electric current point Cloth is uniform.
In order to solve the above-mentioned technical problem, the utility model provides a kind of high brightness LED chip, including substrate, shines Structure, electrode structure and insulating layer, the light emitting structure include the first semiconductor layer being sequentially arranged on substrate, active layer, Two semiconductor layers and transparency conducting layer, the insulating layer are covered on light emitting structure, and the electrode structure includes first electrode, Two electrodes and at least two the first hole below first electrode is set, the second electrode is connected to through insulating layer On transparency conducting layer, on the insulating layer, first hole is etched to the first semiconductor from insulating layer for the first electrode setting Layer, the first electrode extend to the first semiconductor layer from the first hole and are conductively connected with the first semiconductor layer, the insulation Layer extends to the first semiconductor layer from the first hole sidewalls.
As an improvement of the above scheme, the area of first hole is less than the area of first electrode, first hole Size be 1-100 μm.
As an improvement of the above scheme, the depth of first hole is 1-2 μm.
As an improvement of the above scheme, multiple first holes are in concentric arrays.
As an improvement of the above scheme, multiple first holes are in rectangle or circular arrangement.
As an improvement of the above scheme, the surface of the first electrode and second electrode is in same plane.
Implement the utility model, has the following beneficial effects:
High brightness LED chip provided by the utility model, on the insulating layer by first electrode setting, and in first electrode Lower section forms the first hole for being etched to the first semiconductor layer, to be electrically connected by the first hole and the formation of the first semiconductor layer It connects, therefore does not need to perform etching light emitting structure, increase the light-emitting area of chip to the maximum extent, improve the bright of chip Degree.Further, since the first electrode setting of the utility model is on the insulating layer, the surface of first electrode and second electrode is same In plane, consequently facilitating packaging and routing.Secondly as increasing light-emitting area, first electrode is arranged on the insulating layer, and first Electrode is connect by multiple first holes with the first semiconductor layer, to keep current distribution more uniform.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of existing LED chip;
Fig. 2 is the structural schematic diagram of the utility model high brightness LED chip;
Fig. 3 is the top view of the utility model high brightness LED chip;
Fig. 4 is the arrangement mode schematic diagram of the first hole of the utility model.
Specific embodiment
It is practical new to this below in conjunction with attached drawing to keep the purpose of this utility model, technical solution and advantage clearer Type is described in further detail.
Referring to figs. 2 and 3, a kind of high brightness LED chip provided by the utility model, including substrate 10, light emitting structure 20, Electrode structure and insulating layer 30.
The light emitting structure 20 includes the first semiconductor layer 21 being sequentially arranged on substrate 10, active layer 22, the second half leads Body layer 23 and transparency conducting layer 24.
Wherein, the material of the utility model substrate 10 can be sapphire, silicon carbide or silicon, or other semiconductors Material.Preferably, the substrate 10 of the utility model is Sapphire Substrate.
In addition, the first semiconductor layer 21 provided by the utility model is n type gallium nitride base, the second semiconductor layer 23 is P Type gallium nitride based layer, active layer 22 are MQW quantum well layer.
Secondly, the material of the utility model transparency conducting layer 24 is indium tin oxide, but not limited to this.In indium tin oxide The ratio of indium and tin is 70-99:1-30.Preferably, the ratio of indium and tin is 95:5 in indium tin oxide.It is advantageous in this way to improve thoroughly The conductive capability of bright conductive layer, prevents carrier from flocking together, and also improves the light extraction efficiency of chip.
The insulating layer 30 is covered on light emitting structure 20.The insulating layer 30 is by SiO2、Si3N4、Al2O3、TiO2With Ta2O3One or more of be made.Preferably, the insulating layer 30 is made of silica.
The electrode structure includes first electrode 41, second electrode 42 and at least two settings under first electrode 41 First hole 43 of side.Specifically, the second electrode 42 through insulating layer 30 be connected to it is transparent lead in 24 electric layer, described first Electrode 41 is arranged on insulating layer 30, and first hole 43 is etched to the first semiconductor layer 21 from insulating layer 30, and described first Electrode 41 extends to the first semiconductor layer 21 and leads 21 with the first semiconductor layer and is electrically connected from the first hole 43, the insulating layer 30 The first semiconductor layer 21 is extended to from 43 side wall of the first hole, by the lateral wall insulation of first electrode 41 and the first hole 43, to prevent Only chip leaks electricity.Preferably, the surface of first electrode 41 and second electrode 42 is in the same plane.
First electrode is arranged on the insulating layer the utility model, and is formed in the lower section of first electrode and be etched to the first half First hole of conductor layer to be electrically connected by the first hole with the formation of the first semiconductor layer, therefore is not needed to light-emitting junction Structure performs etching, and increases the light-emitting area of chip to the maximum extent, improves the brightness of chip.Further, since the utility model First electrode setting on the insulating layer, the surface of first electrode and second electrode in the same plane, consequently facilitating encapsulation beat Line.Referring to Fig. 1, there are biggish difference in height, packaging and routing is inconvenient for existing first electrode and second electrode.Secondly as Light-emitting area is increased, first electrode is arranged on the insulating layer, and first electrode passes through multiple first holes and the first semiconductor Layer connection, to keep current distribution more uniform.
It should be noted that first electrode is arranged on the insulating layer the utility model, effectively by first electrode and the Two electrode insulations guarantee that chip can work normally.
Due to the first hole 43 quantity, size, depth and arrangement mode to the brightness of chip and voltage, ageing rate, Yield etc. plays an important role, therefore the utility model carries out the quantity of the first hole, size, depth and arrangement mode It limits.
Specifically, the area of first hole 43 is less than the area of first electrode 41, and the diameter of the first hole 43 is 1-100μm.Due to first electrode 41 size be generally less than be equal to 100 μm, the size of the first hole less than 100 μm, if The size of first electrode 41 is greater than 100 μm, then seriously stops light-emitting area, reduces chip brightness, and not good to chip voltage Place.If the size of the first hole less than 1 μm, will affect the current distribution and voltage of chip, cause chip voltage excessively high, aging Do not pass through.
Preferably, the diameter of the first hole 43 is 5-80 μm.More preferably, the diameter of the first hole 43 is 10-30 μm.
In addition, the depth of first hole 43 is 1-2 μm.Current distribution and electricity of the depth of first hole 43 to chip Pressure plays important influence.If the depth of the first hole 43 exceeds above range, cause chip voltage excessively high, aging is obstructed It crosses.Preferably, the depth of the first hole 43 is 1.3-1.7 μm.
Referring to fig. 4, in order to make chip current distribution it is more uniform, multiple first holes 43 be in rectangle or circular arrangement, or Multiple first holes 43 of person are in concentric arrays.Preferably, multiple first holes 43 are in concentric arrays, can be greatly reduced in this way To the etching of light-emitting area, while guaranteeing the voltage of chip in normal range (NR).
It should be noted that the shape of the first hole 43 can be round, oval, rectangular or polygon.
Correspondingly, the utility model additionally provides a kind of production method of high brightness LED chip, comprising the following steps:
S101, light emitting structure is formed on the substrate;
Specifically, the light emitting structure includes the first semiconductor layer, active layer, the second semiconductor being sequentially arranged on substrate Layer and transparency conducting layer.
The material of the utility model substrate can be sapphire, silicon carbide or silicon, or other semiconductor materials.It is excellent Choosing, the substrate of the utility model is Sapphire Substrate.
Epitaxial layer is formed in substrate surface using MOCVD device, the epitaxial layer includes the first half leading on the substrate Body layer, the active layer on the first semiconductor layer and the second semiconductor layer on active layer.
Specifically, the first semiconductor layer provided by the utility model is n type gallium nitride base, the second semiconductor layer is p-type Gallium nitride based layer, active layer are MQW quantum well layer.
It should be noted that being set between the substrate and first semiconductor layer in the other embodiments of the application There is caching to rush the laminations such as layer.
Layer of transparent conductive layer is formed on the second semiconductor layer.The material of the utility model transparency conducting layer 24 is indium tin Oxide, but not limited to this.The ratio of indium and tin is 70-99:1-30 in indium tin oxide.Preferably, indium in indium tin oxide Ratio with tin is 95:5.The conductive capability for favorably improving transparency conducting layer in this way, prevents carrier from flocking together, also improves The light extraction efficiency of chip.
S102, light emitting structure is performed etching, forms at least two first holes;
Specifically, porous photolithography plate to be placed on to the top of light emitting structure, light emitting structure is carved using yellow light technique Erosion, forms at least two first holes, and first hole is through to the first semiconductor layer from transparency conducting layer.
Since the quantity of the first hole, size, depth and arrangement mode are to the brightness of chip and voltage, ageing rate, good Rate etc. plays an important role, therefore the utility model limits the quantity of the first hole, size, depth and arrangement mode It is fixed.
Specifically, the area of first hole is less than the area of first electrode, and the size of the first hole is 1-100 μ m.It is equal to 100 μm since the size of first electrode is generally less than, the size of the first hole is less than 100 μm, if first electrode Size be greater than 100 μm, then seriously stop light-emitting area, reduce chip brightness, and there is no benefit to chip voltage.If the first hole The size in hole then will affect the current distribution and voltage of chip, cause chip voltage excessively high, aging does not pass through less than 1 μm.
Preferably, the size of the first hole is 5-80 μm.More preferably, the size of the first hole is 10-30 μm.
In addition, the depth of first hole is 1-2 μm.The depth of first hole plays the current distribution and voltage of chip Important influence.If the depth of the first hole exceeds above range, cause chip voltage excessively high, aging does not pass through.It is preferred that , the depth of the first hole is 1.3-1.7 μm.
In order to keep chip current distribution more uniform, multiple first holes are in rectangle or circular arrangement or multiple first Hole is in concentric arrays.Preferably, multiple first holes are in concentric arrays, can greatly reduce the quarter to light-emitting area in this way Erosion, while guaranteeing the voltage of chip in normal range (NR).It should be noted that the shape of the first hole can for round, ellipse, Rectangular or polygon.
Wherein, the yellow light technique the following steps are included:
S201, positive photoresist is coated over transparent conductive layer, obtains the LED wafer to photoetching;
S202, LED wafer is heated, heating temperature is 105-115 DEG C, heating time 3-8min;
S203, the LED wafer after heating is exposed, is developed;
S204, the LED wafer after development is heated, heating temperature is 105-115 DEG C;
S205, the LED wafer after heating is performed etching using ICP, forms the first hole.
Since the size and depth of the first hole of the utility model must be in above ranges, in order to etch above-mentioned ruler Very little and depth the first hole, the utility model must be just able to achieve using above-mentioned yellow light technique.Specifically, phosphoric acid process etches Rate is unstable, and easy etching extends out;Laser technology punching, depth is unstable, and light emitting structure is easy laser and is burnt.
Preferably, the heating temperature in step 202 is 110 DEG C, heating time 5min.Heating temperature in step S204 It is 110 DEG C.
If heating temperature exceeds above range, the solidification of photoresist is influenced, reduces the etching precision of the first hole.
S103, insulating layer is formed, over transparent conductive layer, and the insulating layer is from the first hole side for insulating layer covering Wall extends to the first semiconductor layer;
The mode that using plasma enhances chemical vapor deposition (PECVD) deposits one layer of insulation on the surface of light emitting structure Layer, wherein the insulating layer extends to the first semiconductor layer from the first hole sidewalls.The insulating layer is made of insulating material. Preferably, the insulating layer is by SiO2、Si3N4、Al2O3、TiO2And Ta2O3One or more of be made.
S104, the insulating layer is performed etching, is etched to the surface of transparency conducting layer, form the second hole;
Insulating layer is performed etching using inductively coupled plasma (ICP) or wet corrosion technique, is etched to transparent lead The surface of electric layer forms the second hole.
S105, on the insulating layer deposited metal form first electrode, and gold is deposited on the transparency conducting layer of the second hole Belong to, formed second electrode, wherein first electrode from the first hole extend to the first semiconductor layer and with the first semiconductor layer conduction Connection;
Using the method for electron beam evaporation (E-beam) or magnetron sputtering (sputter) deposited metal on the insulating layer, First electrode is formed, the deposited metal on the transparency conducting layer of the second hole forms second electrode, wherein first electrode is from the One hole extends to the first semiconductor layer and is conductively connected with the first semiconductor layer.
It should be noted that further comprising the steps of:
S106, scribing is carried out to substrate using laser, forms X-axis scratch and Y-axis scratch;
S107, it is cleaved using chopper along X-axis scratch and Y-axis scratch, forms single LED chip.
The utility model could form the first of the utility model by the mutual cooperation of porous photolithography plate and yellow light technique Hole reduces the etching to light-emitting area, to improve the brightness of chip in the case where not influencing chip voltage.In addition, this First electrode is arranged on the insulating layer utility model, and is connect by multiple first holes with the first semiconductor layer, so that electric Flow distribution is more uniform.
Below the utility model will be illustrated with specific embodiment
Embodiment 1
A kind of high brightness LED chip, including substrate, light emitting structure, electrode structure and insulating layer, the light emitting structure include The first semiconductor layer, active layer, the second semiconductor layer and the transparency conducting layer being sequentially arranged on substrate, the insulating layer are covered on On light emitting structure, the electrode structure includes first electrode, second electrode and at least two is arranged in below first electrode First hole, the second electrode connect over transparent conductive layer through insulating layer, and the first electrode is arranged on the insulating layer, First hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends to the first semiconductor from the first hole Layer is simultaneously conductively connected with the first semiconductor layer, and the insulating layer extends to the first semiconductor layer from the first hole sidewalls;First hole Hole is equipped with 2, and the diameter of the first hole is 1 μm, and the depth of the first hole is 1 μm.
Embodiment 2
A kind of high brightness LED chip, including substrate, light emitting structure, electrode structure and insulating layer, the light emitting structure include The first semiconductor layer, active layer, the second semiconductor layer and the transparency conducting layer being sequentially arranged on substrate, the insulating layer are covered on On light emitting structure, the electrode structure includes first electrode, second electrode and at least two is arranged in below first electrode First hole, the second electrode connect over transparent conductive layer through insulating layer, and the first electrode is arranged on the insulating layer, First hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends to the first semiconductor from the first hole Layer is simultaneously conductively connected with the first semiconductor layer, and the insulating layer extends to the first semiconductor layer from the first hole sidewalls;First hole Hole is equipped with 4, and the first hole is in rectangular arranged, and the diameter of the first hole is 5 μm, and the depth of the first hole is 1.3 μm.
Embodiment 3
A kind of high brightness LED chip, including substrate, light emitting structure, electrode structure and insulating layer, the light emitting structure include The first semiconductor layer, active layer, the second semiconductor layer and the transparency conducting layer being sequentially arranged on substrate, the insulating layer are covered on On light emitting structure, the electrode structure includes first electrode, second electrode and at least two is arranged in below first electrode First hole, the second electrode connect over transparent conductive layer through insulating layer, and the first electrode is arranged on the insulating layer, First hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends to the first semiconductor from the first hole Layer is simultaneously conductively connected with the first semiconductor layer, and the insulating layer extends to the first semiconductor layer from the first hole sidewalls;First hole Hole is equipped with 5, and the rounded arrangement of the first hole, the diameter of the first hole is 30 μm, and the depth of the first hole is 1.5 μm.
Embodiment 4
A kind of high brightness LED chip, including substrate, light emitting structure, electrode structure and insulating layer, the light emitting structure include The first semiconductor layer, active layer, the second semiconductor layer and the transparency conducting layer being sequentially arranged on substrate, the insulating layer are covered on On light emitting structure, the electrode structure includes first electrode, second electrode and at least two is arranged in below first electrode First hole, the second electrode connect over transparent conductive layer through insulating layer, and the first electrode is arranged on the insulating layer, First hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends to the first semiconductor from the first hole Layer is simultaneously conductively connected with the first semiconductor layer, and the insulating layer extends to the first semiconductor layer from the first hole sidewalls;First hole Hole is equipped with 3, and the first hole is in concentric arrays, and the width of the first hole is 10 μm, and the depth of the first hole is 1.7 μm.
Embodiment 5
A kind of high brightness LED chip, including substrate, light emitting structure, electrode structure and insulating layer, the light emitting structure include The first semiconductor layer, active layer, the second semiconductor layer and the transparency conducting layer being sequentially arranged on substrate, the insulating layer are covered on On light emitting structure, the electrode structure includes first electrode, second electrode and at least two is arranged in below first electrode First hole, the second electrode connect over transparent conductive layer through insulating layer, and the first electrode is arranged on the insulating layer, First hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends to the first semiconductor from the first hole Layer is simultaneously conductively connected with the first semiconductor layer, and the insulating layer extends to the first semiconductor layer from the first hole sidewalls;First hole Hole is equipped with 4, and the first hole rectangular arranged, the diameter of the first hole is 100 μm, and the depth of the first hole is 2 μm.
Comparative example 1 is existing LED chip in Fig. 1, wherein embodiment 1-5 is identical with the chip size of comparative example 1, right Embodiment 1-5 and the chip of comparative example 1 carry out test and degradation, as a result as follows:
Above disclosed is only a kind of preferred embodiment of the utility model, certainly cannot be practical to limit with this Novel interest field, therefore equivalent variations made according to the claim of the utility model still belong to what the utility model was covered Range.

Claims (6)

1. a kind of high brightness LED chip, which is characterized in that including substrate, light emitting structure, electrode structure and insulating layer, the hair Photo structure includes the first semiconductor layer being sequentially arranged on substrate, active layer, the second semiconductor layer and transparency conducting layer, it is described absolutely Edge layer is covered on light emitting structure, and the electrode structure includes first electrode, second electrode and at least two settings first First hole of base part, the second electrode connect over transparent conductive layer through insulating layer, the first electrode setting On the insulating layer, first hole is etched to the first semiconductor layer from insulating layer, and the first electrode extends from the first hole It is conductively connected to the first semiconductor layer and with the first semiconductor layer, the insulating layer extends to the first half from the first hole sidewalls and leads Body layer.
2. high brightness LED chip as described in claim 1, which is characterized in that the area of first hole is less than the first electricity The area of pole, the size of first hole are 1-100 μm.
3. high brightness LED chip as claimed in claim 2, which is characterized in that the depth of first hole is 1-2 μm.
4. high brightness LED chip as described in claim 1, which is characterized in that multiple first holes are in concentric arrays.
5. high brightness LED chip as described in claim 1, which is characterized in that multiple first holes are in rectangle or circular arrangement.
6. high brightness LED chip as described in claim 1, which is characterized in that the surface of the first electrode and second electrode In same plane.
CN201822228330.2U 2018-12-27 2018-12-27 A kind of high brightness LED chip Active CN209282231U (en)

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Application Number Priority Date Filing Date Title
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Publication Number Publication Date
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109545935A (en) * 2018-12-27 2019-03-29 佛山市国星半导体技术有限公司 A kind of high brightness LED chip and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109545935A (en) * 2018-12-27 2019-03-29 佛山市国星半导体技术有限公司 A kind of high brightness LED chip and preparation method thereof

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