CN209151005U - The constant buck converter of switching frequency - Google Patents
The constant buck converter of switching frequency Download PDFInfo
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- CN209151005U CN209151005U CN201822093707.8U CN201822093707U CN209151005U CN 209151005 U CN209151005 U CN 209151005U CN 201822093707 U CN201822093707 U CN 201822093707U CN 209151005 U CN209151005 U CN 209151005U
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Abstract
The utility model discloses a kind of buck converters that switching frequency is constant, including SFC core circuit and voltage feedback loop, above-mentioned voltage feedback loop includes first switch tube Q1 and second switch Q2, the source electrode of above-mentioned first switch tube Q1 connects VIN input signal, grid connects the PWM output signal of SFC core circuit by driver, the source electrode of the drain electrode connection second switch Q2 of above-mentioned first switch tube Q1, the drain electrode of above-mentioned first switch tube Q1 and the drain electrode of second switch Q2 pass through 3rd resistor R3 respectively and the 4th resistance R4 is connected to output voltage feedback signal vfb, above-mentioned output voltage feedback signal vfb and reference voltage VREF after comparator by being used as pluse pulse signal to be input to SFC core circuit.The constant artificial tooth converter of switching frequency in the utility model has circuit structure simple, is able to carry out quick load current response and the response of quick input voltage, can be realized stable voltage output.
Description
Technical field
The utility model relates to buck converters, and in particular to a kind of buck converter that switching frequency is constant.
Background technique
Typical constitute of buck converter has: controller provides periodic pwm control signal, and driver driving one is split
Pass and inductance and output capacitance, such buck converter are called synchronized model buck converter.Switch Q2 can be by one
A diode in place, this buck converter for being called asynchronous type.
The function of controller, such as voltage mode are realized now with various frameworks, peak-current mode is constant
Shangguan's service time mode.But the circuit structure of the buck converter of current various frameworks is complicated, load response is slower.
Utility model content
The purpose of this utility model is to provide a kind of buck converters that switching frequency is constant, solve current various framves
The circuit structure of the buck converter of structure is complicated, the slower problem of load response.
In order to solve the above technical problems, the utility model uses following technical scheme:
A kind of buck converter that switching frequency is constant, including SFC core circuit and voltage feedback loop, above-mentioned voltage are anti-
Feedback loop includes the source electrode connection VIN input signal of first switch tube Q1 and second switch Q2, above-mentioned first switch tube Q1, grid
Pole connects the PWM output signal of SFC core circuit by driver, and the drain electrode of above-mentioned first switch tube Q1 connects second switch
The source electrode of Q2, the drain electrode of above-mentioned first switch tube Q1 and the drain electrode of second switch Q2 pass through the electricity of 3rd resistor R3 and the 4th respectively
Resistance R4 is connected to output voltage feedback signal vfb, and above-mentioned output voltage feedback signal vfb and reference voltage VREF pass through comparator
SFC core circuit is input to as pluse pulse signal afterwards.
Preferably, above-mentioned SFC core circuit includes the first trigger rsregister1 and the second trigger
The s foot of the s foot of rsregister2, above-mentioned first trigger rsregister1 and the second trigger rsregister2 with
The connection of pluse pulse signal, the q foot of above-mentioned first trigger rsregister1 and the q with the second trigger rsregister2
Foot is separately connected PWM output signal and LDREN output signal, the r foot of above-mentioned first trigger rsregister1 and with the second touching
The r foot of hair device rsregister2 is separately connected S1 input signal and S2 input signal.
Preferably, the q foot of above-mentioned first trigger rsregister1 is also connected with the grid of first switch SW1, it is above-mentioned
The source electrode of first switch SW1 is connect by first resistor R1 connection power supply, the drain electrode of above-mentioned first switch SW1 by first capacitor C1
Ground.
Preferably, above-mentioned S1 input signal is after Vin signal is connect with first resistor R1 and first capacitor C1 by the
Output signal after one comparator comparator1.
Preferably, the drain electrode of above-mentioned first switch SW1 is also connected with the source electrode of second switch SW2, above-mentioned second switch SW2
Grid connect the first trigger rsregister1 qb foot, the grounded drain of above-mentioned second switch SW2.
Preferably, the q foot of above-mentioned second trigger rsregister1 is also connected with the grid of third switch SW3, it is above-mentioned
The source electrode of third switch SW3 passes through the second capacitor C2 by second resistance R2 connection power supply, the drain electrode of above-mentioned third switching tube SW3
Ground connection.
Preferably, above-mentioned S2 input signal is after Vout signal is connect with second resistance R2 and the second capacitor C2 by the
Output signal after two comparator comparator2.
Preferably, the drain electrode of above-mentioned third switch SW3 is also connected with the source electrode of the 4th switch SW4, above-mentioned 4th switch SW4
Grid connection marginal detector edge_detector q foot, the grounded drain of above-mentioned 4th switch SW4.
Compared with prior art, the utility model has the beneficial effects that
The constant artificial tooth converter of switching frequency in the utility model has circuit structure simple, is able to carry out quickly
Load current response and the response of quick input voltage, can be realized stable voltage output.
Detailed description of the invention
Fig. 1 is the electrical block diagram of the buck converter of the utility model.
Fig. 2 is the electrical block diagram of SFC core circuit in the buck converter of the utility model.
Fig. 3 is the operation principle schematic diagram of the SFC core circuit of the utility model.
Specific embodiment
In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, below in conjunction with attached drawing and implementation
Example, the present invention will be further described in detail.It should be appreciated that specific embodiment described herein is only used to explain
The utility model is not used to limit the utility model.
The buck convertor being made of together SFC core circuit and phone feedback control loop is shown referring to Fig. 1, Fig. 1,
In the buck convertor, mainly include two-part core component, i.e., SFC core circuit and with SFC core circuit carry out
The voltage feedback loop of cooperation, setting is respectively first switch tube Q1 and the there are two switching tube in the voltage feedback loop
The source electrode of two switching tube Q2, above-mentioned first switch tube Q1 connects VIN input signal, and grid connects SFC core electricity by driver
The PWM output signal on road, the source electrode of the drain electrode connection second switch Q2 of above-mentioned first switch tube Q1, above-mentioned second switch Q2
Grid by being drivingly connected SFC core circuit, the drain electrode of above-mentioned first switch tube Q1 and the drain electrode of second switch Q2 difference
Be connected to output voltage feedback signal vfb by 3rd resistor R3 and the 4th resistance R4, above-mentioned output voltage feedback signal vfb and
Reference voltage VREF after comparator by being used as pluse pulse signal to be input to SFC core circuit.
The structural schematic diagram of SFC core circuit is shown in Fig. 2, includes the first trigger in the SFC core circuit
Rsregister1 and the second trigger rsregister2, the s foot and the second trigger of above-mentioned first trigger rsregister1
The s foot of rsregister2 is connect with pluse pulse signal, the q foot of above-mentioned first trigger rsregister1 and with second
The q foot of trigger rsregister2 is separately connected PWM output signal and LDREN output signal, above-mentioned first trigger
The r foot of rsregister1 and S1 input signal and S2 input signal are separately connected with the r foot of the second trigger rsregister2.
In addition the q foot of above-mentioned first trigger rsregister1 is also connected with the grid of first switch SW1, and above-mentioned first
The source electrode of switch SW1 is grounded by first resistor R1 connection power supply, the drain electrode of above-mentioned first switch SW1 by first capacitor C1.
Above-mentioned S1 input signal is after Vin signal is connect with first resistor R1 and first capacitor C1 by first comparator
Output signal after comparator1.
The drain electrode of above-mentioned first switch SW1 is also connected with the source electrode of second switch SW2, and the grid of above-mentioned second switch SW2 connects
Connect the qb foot of the first trigger rsregister1, the grounded drain of above-mentioned second switch SW2.
The q foot of above-mentioned second trigger rsregister1 is also connected with the grid of third switch SW3, above-mentioned third switch
The source electrode of SW3 is grounded by second resistance R2 connection power supply, the drain electrode of above-mentioned third switching tube SW3 by the second capacitor C2.
Above-mentioned S2 input signal is after Vout signal is connect with second resistance R2 and the second capacitor C2 by the second comparator
Output signal after comparator2.
The drain electrode of above-mentioned third switch SW3 is also connected with the source electrode of the 4th switch SW4, and the grid of above-mentioned 4th switch SW4 connects
Connect the q foot of marginal detector edge_detector, the grounded drain of above-mentioned 4th switch SW4.
It is divided into two-way filtering about the SFC core circuit, principle difference is as follows:
First via RC filtering: first resistor R1, first capacitor C1 are connected to VIN and first comparator
Comparator1, this partial circuit determine the voltage range of ramp_ton between kvout and gnd.Pulse signal and first
Comparator output signal S1 is input to the first triggering rsregister1, output pwm signal.The function that it is realized is calculating first
The time that switching tube Q1 is opened.Ton= (R1*C1*K*VOUT)/VIN；It can be seen that the change of VIN voltage from this calculation formula
Change can react in one cycle, so such framework has good VIN feedforward responding ability.
Second road RC filtering: second resistance R2, the second capacitor C2 are connected to VOUT and the second comparator comparator2,
This partial circuit determines the voltage range of ramp_t between kvout and gnd.Pulse signal and the second comparator output signal
S2 is input to the second trigger rsregister2, exports LDREN signal.The function that this partial circuit is realized is to calculate switch week
The time of phase.
Switch periods: T=(R2*C2*K*VOUT)/VOUT=R2*C2*K;
In general, setting R1=R2=R, C1=C2=C；Switch periods T is determined by R, C and K.Even if in different VIN and VOUT
In the case of, switch periods (frequency) are also a steady state value.
The effect of each device is as follows in the SFC core circuit
Comparator: it when anode input signal is higher than negative terminal input signal, exports as height；When anode input signal is low
When negative terminal input signal, it is low for exporting.
Rest-set flip-flop: when the end R output signal is high, output signal Q is reset；When the end S input signal is high
It waits, output signal Q is set height.
Switch SW is connected when controlling signal and being high；Control signal turns off when being low.
Decline marginal detector edge_detector, when input signal failing edge comes, output signal Q is one
Short pulse signal, pulse high level time about 20nS.
In PWM=high；Switch SW1 conducting, VIN charge to capacitor C1 by resistance R1, when signal ramp_ton is from gnd
When rising to Kvout voltage, first comparator comparator1 output signal S1 is got higher；
First trigger rsregister1 input signal is pulse and S1；As pulse=high, the first trigger is set
Height, output signal PWM=high；When S1=high, the first trigger is reset, output signal PWM=low；While pwmb=
High, switch SW1 are closed, and SW2 conducting, ramp_ton signal drawing to gnd, S1 signal is lower.
Second trigger rsregister2 input signal is pulse and S2；As pulse=high, the second trigger is set
Height, output signal LDREN=high, switch SW3 conducting.Vout by resistance R2 to capacitor C2 charge, when signal ramp_t from
When gnd rises to voltage Kvout, the second comparator comparator2 output signal S2 is got higher.Second trigger
Rsregister2 sets low LDREN, LDREN=0；SW3 is closed；Marginal detector edge_detector is in LDREN failing edge
When, a pulse signal ldren_ed, high level about 20nS are exported, ramp_t drawing is arrived in the interior switch SW4 conducting of this time
Gnd, S2 signal are lower.
For the working principle of the utility model, with reference to the circuit structure of Fig. 1 and Fig. 2, output voltage feedback signal vfb
It is input to comparator with reference voltage, comparator exports pulse signal.Entire SFC buck converter working method is as follows: when
When feedback signal vfb ratio vref is low, pulse signal is got higher；Inside SFC core circuit, pulse passes through the first triggering
Pwm is set to height by device rsregister1, while ramp_ton starts up to walk, until kvout voltage, this when S1 signal
It gets higher, while PWM is set to low.This is the calculating process of upper tube service time.
On the other hand, LDREN is set to height for high pass the second trigger rsregister2 by pulse, while ramp_t is opened
Beginning is up walked, and until kvout voltage, this when, signal S2 signal was got higher, at the same LDREN is set to it is low, as shown in Figure 3.This
A is the calculating process of switch periods.
If after LDREN is lower, pulse is still continuously low, and first switch tube Q1 and second switch Q2 locate at this time
In off state, buck converter is in skip mode.
If exporting before S2 signal is got higher and increasing output loading suddenly, vfb is pulled low, and pulse is got higher at this time, and
And immediately PWM value height, into next switch periods.This control mode can change output loading and switch at one
In period on immediate response to loop control, to reach the quick response of output load current.
" one embodiment ", " another embodiment ", " embodiment ", " preferred implementation spoken of in the present specification
Example " etc., referring to combining specific features, structure or the feature of embodiment description includes describing extremely in the application generality
In few one embodiment.It is not centainly to refer to the same embodiment that statement of the same race, which occur, in multiple places in the description.Into one
For step, when describing a specific features, structure or feature in conjunction with any embodiment, what is advocated is to combine other implementations
Example realizes that this feature, structure or feature are also fallen in the scope of the utility model.
Although reference be made herein to the utility model is described in multiple explanatory embodiments of the utility model, still,
It should be understood that those skilled in the art can be designed that a lot of other modification and implementations, these modifications and implementations
It will fall within scope and spirit disclosed in the present application.More specifically, it discloses in the application, drawings and claims
In range, can building block to theme combination layout and/or layout carry out a variety of variations and modifications.In addition to building block
And/or outside the modification and improvement of layout progress, to those skilled in the art, other purposes also be will be apparent.
Claims (8)
1. a kind of buck converter that switching frequency is constant, it is characterised in that: including SFC core circuit and voltage feedback loop,
The voltage feedback loop includes the source electrode connection VIN of first switch tube Q1 and second switch Q2, the first switch tube Q1
Input signal, grid connect the PWM output signal of SFC core circuit by driver, and the drain electrode of the first switch tube Q1 connects
The source electrode of second switch Q2 is connect, the drain electrode of the first switch tube Q1 and the drain electrode of second switch Q2 pass through third electricity respectively
Resistance R3 and the 4th resistance R4 is connected to output voltage feedback signal vfb, the output voltage feedback signal vfb and reference voltage
VREF after comparator by being used as pluse pulse signal to be input to SFC core circuit.
2. the constant buck converter of switching frequency according to claim 1, it is characterised in that: the SFC core circuit
Including the first trigger rsregister1 and the second trigger rsregister2, the s of the first trigger rsregister1
The s foot of foot and the second trigger rsregister2 are connect with pluse pulse signal, the first trigger rsregister1
Q foot and be separately connected PWM output signal and LDREN output signal with the q foot of the second trigger rsregister2, described
The r foot of one trigger rsregister1 and S1 input signal and S2 are separately connected with the r foot of the second trigger rsregister2
Input signal.
3. the constant buck converter of switching frequency according to claim 2, it is characterised in that: first trigger
The q foot of rsregister1 is also connected with the grid of first switch SW1, and the source electrode of the first switch SW1 passes through first resistor R1
Power supply is connected, the drain electrode of the first switch SW1 is grounded by first capacitor C1.
4. the constant buck converter of switching frequency according to claim 3, it is characterised in that: the S1 input signal is
Output signal after first comparator comparator1 after Vin signal is connect with first resistor R1 and first capacitor C1.
5. the constant buck converter of switching frequency according to claim 3, it is characterised in that: the first switch SW1
Drain electrode be also connected with the source electrode of second switch SW2, the grid of the second switch SW2 connects the first trigger rsregister1
Qb foot, the grounded drain of the second switch SW2.
6. the constant buck converter of switching frequency according to claim 2, it is characterised in that: second trigger
The q foot of rsregister1 is also connected with the grid of third switch SW3, and the source electrode of the third switch SW3 passes through second resistance R2
Power supply is connected, the drain electrode of the third switching tube SW3 is grounded by the second capacitor C2.
7. the constant buck converter of switching frequency according to claim 6, it is characterised in that: the S2 input signal is
Output signal after the second comparator comparator2 after Vout signal is connect with second resistance R2 and the second capacitor C2.
8. the constant buck converter of switching frequency according to claim 6, it is characterised in that: the third switch SW3
Drain electrode be also connected with the source electrode of the 4th switch SW4, the grid of the 4th switch SW4 connects marginal detector edge_
The q foot of detector, the grounded drain of the 4th switch SW4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822093707.8U CN209151005U (en) | 2018-12-13 | 2018-12-13 | The constant buck converter of switching frequency |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822093707.8U CN209151005U (en) | 2018-12-13 | 2018-12-13 | The constant buck converter of switching frequency |
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| CN209151005U true CN209151005U (en) | 2019-07-23 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109286318A (en) * | 2018-12-13 | 2019-01-29 | 深圳市泰德半导体有限公司 | The constant buck converter of switching frequency |
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2018
- 2018-12-13 CN CN201822093707.8U patent/CN209151005U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109286318A (en) * | 2018-12-13 | 2019-01-29 | 深圳市泰德半导体有限公司 | The constant buck converter of switching frequency |
| CN109286318B (en) * | 2018-12-13 | 2023-10-27 | 深圳市泰德半导体有限公司 | Step-down converter with constant switching frequency |
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