CN209000954U - Packaging structure of sound surface filtering chip - Google Patents
Packaging structure of sound surface filtering chip Download PDFInfo
- Publication number
- CN209000954U CN209000954U CN201821842594.0U CN201821842594U CN209000954U CN 209000954 U CN209000954 U CN 209000954U CN 201821842594 U CN201821842594 U CN 201821842594U CN 209000954 U CN209000954 U CN 209000954U
- Authority
- CN
- China
- Prior art keywords
- metal
- chip
- layer
- multilayer
- baffle ring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000001914 filtration Methods 0.000 title claims abstract description 20
- 238000004806 packaging method and process Methods 0.000 title abstract description 4
- 239000002184 metal Substances 0.000 claims abstract description 112
- 229910052751 metal Inorganic materials 0.000 claims abstract description 112
- 238000010897 surface acoustic wave method Methods 0.000 claims abstract 7
- 239000004744 fabric Substances 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 2
- 238000012536 packaging technology Methods 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 73
- 238000000034 method Methods 0.000 description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 229910052737 gold Inorganic materials 0.000 description 9
- 239000010931 gold Substances 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 239000000919 ceramic Substances 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- 238000005538 encapsulation Methods 0.000 description 6
- 239000012528 membrane Substances 0.000 description 6
- 238000003466 welding Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000005360 phosphosilicate glass Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910007637 SnAg Inorganic materials 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000003749 cleanliness Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 229920002577 polybenzoxazole Polymers 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- PMPVIKIVABFJJI-UHFFFAOYSA-N Cyclobutane Chemical compound C1CCC1 PMPVIKIVABFJJI-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920006389 polyphenyl polymer Polymers 0.000 description 1
- 239000005297 pyrex Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
The utility model discloses a packaging structure of sound surface filtering chip belongs to semiconductor chip packaging technology field. The surface acoustic wave filter comprises a surface acoustic wave filter chip with a chip functional area on the front surface, a metal connecting block, a multilayer rewiring layer, a metal block I, a metal baffle ring and an encapsulating layer, wherein the metal connecting block is arranged on the periphery of the chip functional area; the metal baffle ring is arranged on the upper surfaces of the multilayer rewiring layers on the peripheries of the metal connecting block and the metal block I and is in a wall shape, the encapsulating layer forms a cavity above the multilayer rewiring layers, below the surface acoustic wave filter chip and on the inner side of the metal baffle ring, and the chip function area is arranged in the cavity. The utility model discloses reduce the technology degree of difficulty when making, improved surface acoustic wave filter's yield.
Description
Technical field
The utility model relates to a kind of encapsulating structures of sound surface filtering chip, belong to semiconductor chip packaging technology neck
Domain.
Background technique
SAW filter is the important component of communication terminal product, raw material be using piezo-electric crystal production and
At.With the miniaturization of mobile terminal, cost effective, the encapsulation of SAW filter is required also to be correspondingly improved.Together
When because of SAW filter properties of product and design function demand, it is any to need to guarantee that filtering chip functional area cannot contact
The design of substance, i.e. cavity structure.Demand and cavity surface based on SAW filter to encapsulating structure cavity structure
The requirement of flatness and cleanliness, traditional SAW filter mostly use greatly ceramic substrate encapsulation to combine hot pressing ultrasonic welding
Mode be packaged.As shown in Figure 1, being equipped with gold plated pads 3 on ceramic substrate 2, it is equipped with tin paste layer 4 on pad 3, is welding
Ceramic substrate 2 around disk 3 is equipped with insulating layer 5;It is implanted with gold goal 6 in the welding surface of chip 1, chip 1 passes through gold goal 6 and tin cream
The mode of layer 4 phases welding is fastened together with ceramic substrate 2.Existing this kind of SAW filter encapsulating structure exists
Following defect: one, ceramic substrate must use the hot pressing ultrasonic welding of gold goal, cause material and process costs high;Two,
Ceramic substrate thickness itself and weight are all larger, so that encapsulating structure volume is big, complex process cost performance is low, and mobile whole
End demand it is thin, small, gently run in the opposite direction;Three, accuracy, angle of influence, welding of signal conductor etc. of device installation this
The uncertainty of series just causes the inconsistency of device performance, or even damages to SAW filter.
Summary of the invention
The purpose of the utility model is to overcome the deficiencies in the prior art, provide one kind and are not required to using ceramic substrate
The encapsulating structure of SAW filter chip is encapsulated, to improve the yield rate of SAW filter.
Purpose of the utility model is realized as follows:
A kind of encapsulating structure of sound surface filtering chip of the utility model comprising front is equipped with the sound table in chip functions area
Surface wave filter chip,
It further includes metal link block, multilayer wiring layer, metal block I, metal baffle ring and encapsulated layer again, the metal connection
The periphery in the chip functions area, and at least two are arranged in block, and the SAW filter chip passes through metal link block
The upside-down mounting of wiring layer multiple spot is connect again with multilayer, and the electric signal of SAW filter chip is conducted downwards;
Wiring layer includes at least one layer of wiring metal graph layer again and at least one layer of dielectric layer, the cloth again to the multilayer again
Line metal pattern layer exists each other to be selectively electrically connected with, and the dielectric layer wraps up wiring metal graph layer again or is filled in
Between the adjacent graph layer of wiring metal again, and multilayer wiring layer opening again is set, the multilayer interior setting of wiring layer opening again
Metal block I, by multilayer, wiring layer opening is connect with the graph layer of wiring metal again of multilayer wiring layer again the metal block I again;
The upper surface of the multilayer of the periphery of metal link block and metal block I wiring layer again is arranged in the metal baffle ring, and
Wiring layer is connected again with multilayer, and metal baffle ring is in enclosure wall shape, and inside region is placed in the chip function of SAW filter chip
In the vertical area in energy area;
The encapsulated layer by SAW filter chip, metal baffle ring and multilayer again wiring layer exposed surface encapsulate, and
Multilayer again the top of wiring layer, the lower section of SAW filter chip, metal baffle ring inside formed cavity, by the core
Piece functional areas are placed in cavity.
The thickness range of metal link block described in the utility model is at 8 ~ 12 microns.
Metal baffle ring described in the utility model is in discontinuous enclosure wall.
The gap width of metal baffle ring described in the utility model is at 8 ~ 12 microns.
Therefore, in the encapsulation for coping with next-generation SAW filter, wafer scale mode encapsulating structure and method are recognized
To be most possibly to solve the problems, such as the means of current encapsulation.
Beneficial effect
The ingenious concept using wafer-level packaging of the utility model and again wiring metal technique, by way of reconstructing wafer
Realize the encapsulation of SAW filter, cavity needed for SAW filter is formed in the way of face-down bonding, is dropped
Low technology difficulty, also reduces overall weight, and reduce cavity thickness, thus greatly reduces the whole thick of packaging body
Degree, and then the encapsulating structure of SAW filter small in size, at low cost is realized, and improve package reliability, under being
The important solutions of generation SAW filter encapsulation.
Detailed description of the invention
Fig. 1 is the diagrammatic cross-section of the encapsulating structure of traditional sound surface filtering chip;
Fig. 2 is a kind of diagrammatic cross-section of the embodiment of the encapsulating structure of sound surface filtering chip of the utility model;
Fig. 3,4 are metal baffle ring in the embodiment of Fig. 2 and the chip functions area of sound surface filtering chip, the position of metal block
Relation schematic diagram;
In figure:
SAW filter chip 10
Metal link block 71
Cavity 14
Encapsulated membranes 16
Multilayer wiring layer 30 again
Dielectric layer I 321
Dielectric layer opening 301
Encapsulate the bed of material 30
Metal column array 40
Metal column upper surface 41
Metal column lower surface 43
Carrier disk 50
Adhesive layer 53
Metal baffle ring 60.
Specific embodiment
Specific embodiment of the present utility model is described in detail with reference to the accompanying drawing.It for ease of explanation, can be with
Use space relative terms (" in ... lower section ", " under ", " lower part ", " in ... top ", " top " etc.) to describe in figure
The relationship of a shown element or component and another element or component.In addition to orientation shown in figure, spatially relative term
Further include using or operation in equipment be differently directed.Device, which can be oriented otherwise, (to be rotated by 90 ° or fixed in other
To), therefore the opposite description in space used herein can carry out similar explanation.
Embodiment
A kind of encapsulating structure of sound surface filtering chip of the utility model, as shown in Figure 2, Figure 3 and Figure 4, wherein Fig. 2 is
A kind of diagrammatic cross-section of the embodiment of the encapsulating structure of sound surface filtering chip of the utility model;The embodiment that Fig. 3,4 are Fig. 2
Middle metal baffle ring 60 and the chip functions area 13 of sound surface filtering chip, the positional diagram of metal link block 71.Sound table
Surface wave filter chip 10 is radio-frequency devices, and thickness range is 200-250 microns, and front is equipped with chip functions area 13.Sound
The periphery setting metal link block 71 in the chip functions area 13 of surface wave filter chip 10, metal link block 71 at least two.
Metal link block 71 mainly plays support SAW filter chip 10, can be set in the short of chip functions area 13
Avris also can be set the long side in chip functions area 13, or be arranged according to actual needs.SAW filter chip 10
By metal link block 71,30 multiple spot upside-down mounting of wiring layer is connect again with multilayer, by the electric signal of SAW filter chip 10 to
Lower conduction.
Specifically, a kind of encapsulating structure of sound surface filtering chip of the utility model, including SAW filter chip
10, metal link block 71, multilayer wiring layer 30 and metal baffle ring 60 again.Wherein, multilayer again wiring layer 30 include it is at least one layer of again
Wiring metal graph layer and at least one layer of dielectric layer, then wiring metal graph layer conductive material include but is not limited to copper, gold,
Silver exists be selectively electrically connected with each other, to enhance the input/output function of entire encapsulating structure.Dielectric material package
It wiring metal graph layer or is filled between the adjacent graph layer of wiring metal again again and forms dielectric layer, play insulating effect.Generally
Ground, dielectric layer are the polymeric layers being formed by polyme, and the organic material that can be photosensitive polymer etc is formed, can be with
It is the polymer of polybenzoxazoles (PBO), polyimides, polyphenyl cyclobutane (BCB) etc., is also possible to by inorganic material,
Its nitride that can be such as silicon nitride, the oxide of such as silica, phosphosilicate glass (PSG), pyrex
(BSG), the formation such as boron-doping phosphosilicate glass (BPSG).In Fig. 2, wiring layer 30 is only shown two layers multilayer again, comprising: is routed gold again
Belong to graph layer I 311, again wiring metal graph layer II 313 and dielectric layer I 321, dielectric layer II 322.Wiring metal graph layer I again
311, about II 313 selective connection of wiring metal graph layer again, is arranged several multilayers wiring layer again on dielectric layer II 322
Opening 301, by multilayer, wiring layer opening 301 is connect metal block I 41 with wiring metal graph layer II 313 again again, and is revealed upwards
Dielectric layer II 322 out.Metal block I 41 forms the metal pattern with certain altitude above dielectric layer II 322, generally, gold
Belonging to block I 41, square metal pattern is rounded on the dielectric layer or rectangle, can also be according to the cross-sectional shape of metal link block 71
To determine the metal pattern of metal block I 41.Solder layer I 61 is arranged in the top of metal block I 41, and material Sn, SnAg etc. is solderable
Property metal.
SAW filter chip 10 is connected by metal link block 71 and I 61 upside-down mounting of solder layer.Metal link block 71
Material include but is not limited to copper, gold, silver, generally, circular in cross-section or rectangle, or with SAW filter core
The bond pad shapes of piece 10 are consistent.The lower surface of wiring metal graph layer I 311 exposes dielectric layer I 321 and input/output is arranged again
Hold II 310.
Metal block II 43 is arranged in the upper surface of the multilayer wiring layer 30 again of the periphery of metal block I 41, and with multilayer cloth again
Line layer 30 is connected, and solder layer II 63 is arranged in top, and metal block II 43 and solder layer II 63 are formed together the metal gear of enclosure wall shape
Ring 60.The inside region of metal baffle ring 60 is placed in the vertical area of SAW filter chip 10.In view of subsequent cleaning
Metal baffle ring 60 is specially designed to discontinuous enclosure wall by technique etc., as shown in figure 3, the conductive material of metal block II 43 includes
But it is not limited to copper, gold, silver, the material of solder layer II 63 is the solderabilities metals such as Sn, SnAg.Subsequent encapsulating material carries out lamination work
When skill, metal baffle ring 60 can prevent encapsulating material from entering the chip functions area 13 of SAW filter chip 10, facilitate sky
The forming of chamber.Generally, due in technical process metal block II 43 and its top solder layer II 63 and metal block I 41 and Qi Ding
The solder layer I 61 at end shapes simultaneously, therefore its height is consistent.The solder layer II 63 on II 43 top of metal block increases metal baffle ring 60
Height, can further stop encapsulating material to enter the chip functions area 13 of SAW filter chip 10, ensure that cavity
14 stability and consistency formed.The enclosure wall interior angle of metal baffle ring 60 can be right angle, or fillet is to facilitate technique
The removing of impurity in the process, as shown in Figure 4.
Using the encapsulated membranes of membrane-like, laminated technique, by SAW filter chip 10, metal baffle ring 60 and multilayer
The exposed surface encapsulating of wiring layer 30 again, forms encapsulated layer 16.Because encapsulated membranes use membrane-like, by controlling temperature and humidity, make
Its filling that is pressurized under the dynamic character that relatively flows slowly, can be in the multilayer top of wiring layer 30, SAW filter chip 10 again
Lower section, metal baffle ring 60 inside formed cavity 14, make SAW filter chip 10 chip functions area 13 be in sky
It in chamber 14, ensure that filtering chip functional area does not contact any substance, reached wanting for cavity surface flatness and cleanliness
It asks.
It is found in technical process, because the top of metal baffle ring 60, sound surface is arranged in SAW filter chip 10
Wave filter chip 10 and the spacing of metal baffle ring 60 are too small, will lead to the generation of capillary effect and cause encapsulated membranes colloid easy
It overflows to cavity, influences cavity surface flatness, therefore, for the generation for preventing capillary effect, SAW filter chip
10 are advisable with the gap of metal baffle ring 60 with being greater than 7 microns.It similarly, is the generation for preventing capillary effect, metal baffle ring 60
Gap width is also advisable with being greater than 7 microns.
To sum up, in conjunction with the thickness and encapsulated membranes of solder thickness and the multilayer graph layer of wiring metal again of wiring layer 30 again
Characteristic and process conditions, be preferred with the thickness range of metal link block 71 at 8 ~ 12 microns, to meet SAW filter
Gap width between chip 10 and metal baffle ring 60 is at 8 ~ 12 microns, and the gap width of metal baffle ring 60 is also micro- with 8 ~ 12
Meter Wei Jia, gap width between the SAW filter chip 10 and metal baffle ring 60 is at 8 ~ 12 microns, encapsulated membranes quilt
The probability for getting into SAW filter beneath chips is no more than 10%, the formability of cavity is good, cavity surface good flatness and
Forming is consistent, and the chip functions area 13 of SAW filter chip 10 is made to reach design requirement.
Above-described specific embodiment, to the purpose of this utility model, technical scheme and beneficial effects carried out into
It is described in detail to one step, it should be understood that being not used to the foregoing is merely specific embodiment of the present utility model
Limit the protection scope of the utility model.Within the spirit and principle of the utility model, any modification for being made equally is replaced
It changes, improve, should be included within the scope of protection of this utility model.
Claims (5)
1. a kind of encapsulating structure of sound surface filtering chip comprising the surface acoustic wave that front is equipped with chip functions area (13) filters
Device chip (10),
It is characterized in that, it further includes metal link block (71), multilayer wiring layer (30), metal block I (41), metal baffle ring again
(60) and encapsulated layer (16), metal link block (71) setting is in the periphery of the chip functions area (13), and at least two,
By metal link block (71), wiring layer (30) multiple spot upside-down mounting is connect the SAW filter chip (10) again with multilayer, will
The electric signal of SAW filter chip (10) conducts downwards;
Wiring layer (30) includes at least one layer of wiring metal graph layer again and at least one layer of dielectric layer, the cloth again to the multilayer again
Line metal pattern layer exists each other to be selectively electrically connected with, and the dielectric layer wraps up wiring metal graph layer again or is filled in
Between the adjacent graph layer of wiring metal again, and multilayer wiring layer opening again is set, the multilayer interior setting of wiring layer opening again
Metal block I (41), the wiring metal again that the metal block I (41) passes through multilayer wiring layer opening and multilayer wiring layer (30) again again
Graph layer connection;
The metal baffle ring (60) setting is in the peripheral multilayer of metal link block (71) and metal block I (41) wiring layer (30) again
Upper surface, and wiring layer (30) is connected again with multilayer, and metal baffle ring (60) is in enclosure wall shape, and inside region is placed in surface acoustic wave
In the vertical area in the chip functions area (13) of filter chip (10);
The encapsulated layer (16) is naked by SAW filter chip (10), metal baffle ring (60) and multilayer wiring layer (30) again
Show up encapsulating, and in the multilayer top of wiring layer (30), the lower section of SAW filter chip (10), metal baffle ring (60) again
Inside form cavity (14), the chip functions area (13) is placed in cavity (14).
2. the encapsulating structure of sound surface filtering chip according to claim 1, which is characterized in that the surface acoustic wave filtering
Gap width between device chip (10) and metal baffle ring (60) is at 8 ~ 12 microns.
3. the encapsulating structure of sound surface filtering chip according to claim 1, which is characterized in that the metal link block
(71) thickness range is at 8 ~ 12 microns.
4. the encapsulating structure of sound surface filtering chip according to claim 1, which is characterized in that the metal baffle ring (60)
In discontinuous enclosure wall.
5. the encapsulating structure of sound surface filtering chip according to claim 4, which is characterized in that the metal baffle ring (60)
Gap width at 8 ~ 12 microns.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201821842594.0U CN209000954U (en) | 2018-11-09 | 2018-11-09 | Packaging structure of sound surface filtering chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201821842594.0U CN209000954U (en) | 2018-11-09 | 2018-11-09 | Packaging structure of sound surface filtering chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN209000954U true CN209000954U (en) | 2019-06-18 |
Family
ID=66806538
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201821842594.0U Active CN209000954U (en) | 2018-11-09 | 2018-11-09 | Packaging structure of sound surface filtering chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN209000954U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109244231A (en) * | 2018-11-09 | 2019-01-18 | 江阴长电先进封装有限公司 | Packaging structure and packaging method of sound surface filtering chip |
CN110380703A (en) * | 2019-08-13 | 2019-10-25 | 中电科技德清华莹电子有限公司 | A kind of the full wafer wafer level packaging structure and technique of microelectronic device |
-
2018
- 2018-11-09 CN CN201821842594.0U patent/CN209000954U/en active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109244231A (en) * | 2018-11-09 | 2019-01-18 | 江阴长电先进封装有限公司 | Packaging structure and packaging method of sound surface filtering chip |
CN109244231B (en) * | 2018-11-09 | 2024-03-12 | 江阴长电先进封装有限公司 | Packaging structure and packaging method of acoustic surface filter chip |
CN110380703A (en) * | 2019-08-13 | 2019-10-25 | 中电科技德清华莹电子有限公司 | A kind of the full wafer wafer level packaging structure and technique of microelectronic device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11024559B2 (en) | Semiconductor package with electromagnetic interference shielding structures | |
TWI488261B (en) | Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors | |
KR102562518B1 (en) | Buried Wire Bond Wire | |
US8922005B2 (en) | Methods and apparatus for package on package devices with reversed stud bump through via interconnections | |
TWI623048B (en) | Semiconductor device and method of using substrate having base and conductive posts to form vertical interconnect structure in embedded die package | |
CN109244230B (en) | Packaging structure and packaging method of acoustic surface filter chip | |
KR101607401B1 (en) | Semiconductor device and manufacturing method thereof | |
CN109244231B (en) | Packaging structure and packaging method of acoustic surface filter chip | |
KR20180054817A (en) | Wire bond wire for interference shielding | |
KR20190062243A (en) | Package structure and manufacturing method thereof | |
TW201735287A (en) | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces | |
CN109411597B (en) | Packaging structure and packaging method of acoustic surface filter chip | |
TWI541966B (en) | Package stacking structure and manufacturing method thereof | |
TWI569390B (en) | Electronic package and method of manufacture | |
US5863812A (en) | Process for manufacturing a multi layer bumped semiconductor device | |
CN209000954U (en) | Packaging structure of sound surface filtering chip | |
CN114629463A (en) | Fan-out type filter chip packaging structure of integrated inductor and manufacturing method thereof | |
TW201415589A (en) | Semiconductor package and fabrication method thereof | |
TWM455255U (en) | Package substrate having interposer and package structure having the substrate | |
WO2006008701A2 (en) | Assembly and method of placing the assembly on an external board | |
CN208848928U (en) | Packaging structure of sound surface filtering chip | |
TWI594338B (en) | Electronic stack-up structure and the manufacture thereof | |
CN208848929U (en) | Packaging structure of sound surface filtering chip | |
TW201843750A (en) | Method of packaging system in wafer-level package and semiconductor package manufactured from the same | |
CN209000955U (en) | Packaging structure of sound surface filtering chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |