CN208782980U - A kind of microwave single channel frequency demultiplier circuit and frequency demultiplier - Google Patents

Abstract

The utility model discloses a kind of microwave single channel frequency demultiplier circuits, including sequentially connected rf signal reception module, amplification module, filter module, PLL to handle chip, intermediate-freuqncy signal output module；Frequency demultiplier circuit further includes power supply circuit module；Intermediate-freuqncy signal output module is single channel output；Rf signal reception module includes horizontally-polarized antenna and vertical polarized antenna；Amplification module includes the first amplifier and the second amplifier connecting respectively with horizontally-polarized antenna and vertical polarized antenna, and amplification module further includes third amplifier, and the first amplifier and the second amplifier are connect with the input terminal of third amplifier respectively.The utility model also provides a kind of frequency demultiplier, and including frequency demultiplier cavity and the wiring board being arranged on frequency demultiplier cavity, above-mentioned frequency demultiplier circuit is provided on the wiring board.

Description

A kind of microwave single channel frequency demultiplier circuit and frequency demultiplier

Technical field

The utility model relates to communicate to use frequency demultiplier field, more particularly to a kind of microwave single channel frequency demultiplier circuit and frequency reducing Device.

Background technique

Because of the competitiveness demand of market user, the product of low noise frequency demultiplier is designed with resolution element (DRO scheme) in the past It has been unable to meet production cost-competitive；And it is affected by environment larger using the product stability of resolution element.With satellite Product is widely used, and the design of low noise frequency demultiplier is in PLL(phaselocked loop) technology in integrated processing chip solution is also increasingly Maturation, and product traction is also stepping up.How in the case where not influencing product function and characterisitic parameter, Go out the microwave single channel drop that a PCB integrated level height, function admirable, and cost are simplified in conjunction with PLL processing chip solution matched design Frequency device circuit and frequency demultiplier are those skilled in the art's problems to be solved.

Utility model content

In order to solve above-mentioned the deficiencies in the prior art, the utility model provides a kind of microwave single channel frequency demultiplier circuit, including Sequentially connected rf signal reception module, amplification module, filter module, PLL handle chip, intermediate-freuqncy signal output module；Institute Stating frequency demultiplier circuit further includes power supply circuit module；The intermediate-freuqncy signal output module is single channel output；The radiofrequency signal connects Receiving module includes horizontally-polarized antenna and vertical polarized antenna；The amplification module include respectively with horizontally-polarized antenna and vertical The first amplifier and the second amplifier of poliarizing antenna connection, the amplification module further includes third amplifier, and described first puts Big device and the second amplifier are connect with the input terminal of third amplifier respectively.

The frequency demultiplier circuit of the utility model uses PLL conceptual design, uses external two of radio frequency in rf inputs Grade amplifying circuit is better than integrated rear built-in level-one using the external amplification of two-stage from performance and amplifies, this is based on performance perspective On consideration.And the first order of amplifying circuit uses the first amplifier and the second amplifier, second level amplifying circuit has shared the Three amplifiers not only have advantage in cost price, but also can reduce the size of wiring board.

Preferably, the filter module is filter capacitor.The utility model directly carries the mode of connection with filter capacitor Substitute two-way parallel coupling microstrip bandpass filter in traditional design, it is therefore an objective to since the factor of PLL processing chip itself is easily made It is vibrated at OSC, OSC oscillation is reduced by way of using filter capacitor instead and directly carrying, can stablized very much.

Preferably, first amplifier, the second amplifier, third amplifier are respectively FET field-effect tube.

Preferably, the model RDA3566E of the PLL processing chip.

Preferably, the power supply circuit module is connect with PLL processing chip；The power supply circuit module includes voltage-stabiliser tube, The voltage-stabiliser tube is connect with intermediate-freuqncy signal output module.

Preferably, the input terminal of the PLL processing chip is also connected with clock crystal oscillator module.

The utility model provides a kind of frequency demultiplier, including frequency demultiplier cavity and the wiring board being arranged on frequency demultiplier cavity, Above-mentioned frequency demultiplier circuit is provided on the wiring board.

Preferably, the wiring board is FR4 fiberboard.

The utility model has the following beneficial effects:

A kind of microwave single channel frequency demultiplier circuit and frequency demultiplier provided by the utility model, frequency demultiplier circuit use the side PLL Case design is better than from performance in the rf inputs two-stage amplifying circuit external using radio frequency using the external amplification of two-stage Built-in level-one amplification after integrated, this is based on the consideration in performance perspective.Under the premise of performance is unaffected, route is had compressed The materials cost of plate；And the first order of amplifying circuit uses the first amplifier and the second amplifier, second level amplifying circuit shares Third amplifier not only has advantage in cost price, but also can reduce the size of wiring board.

Detailed description of the invention

Fig. 1 is the block diagram of microwave single channel frequency demultiplier circuit provided by the utility model；

Fig. 2 is the circuit diagram of microwave single channel frequency demultiplier circuit provided by the utility model；

Fig. 3 is the rf signal reception module of circuit diagram shown in Fig. 2 and the partial enlarged view of amplification module；

Fig. 4 is the filter module of circuit diagram shown in Fig. 2 and the partial enlarged view of PLL processing chip；

Fig. 5 is the intermediate-freuqncy signal output module of circuit diagram shown in Fig. 2 and the partial enlarged view of power supply circuit module.

Appended drawing reference:

1- rf signal reception module, 11- horizontally-polarized antenna, 12- vertical polarized antenna, 2- amplification module, 21- first Amplifier, the second amplifier of 22-, 23- third amplifier, 3- filter module, 4- PLL processing chip, 5- intermediate-freuqncy signal export mould Block, 6- power supply circuit module, 7- clock crystal oscillator module.

Specific embodiment

The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work Every other embodiment obtained, fall within the protection scope of the utility model.

Embodiment one

A kind of microwave single channel frequency demultiplier circuit provided by the embodiment of the utility model is discussed in detail in the present embodiment.Such as Fig. 1 ~ figure Shown in 5, microwave single channel frequency demultiplier circuit, including sequentially connected rf signal reception module 1, amplification module 2, filter module 3, PLL handles chip 4, intermediate-freuqncy signal output module 5.Rf signal reception module 1 includes horizontally-polarized antenna 11 and vertical polarization Antenna 12, horizontally-polarized antenna and vertical polarized antenna be respectively used to reception space both horizontally and vertically on ku waveband radio frequency Signal, Ku audio range frequency are the .75GHz of 10 .7 ~ 12.Amplification module 2 uses two-stage amplification module, and first order amplification module includes The first amplifier 21 and the second amplifier 22 being connect respectively with horizontally-polarized antenna and vertical polarized antenna.Amplify mould in the second level Block includes third amplifier 23, and first amplifier 21 and the second amplifier 22 connect with the input terminal of third amplifier 23 respectively It connects, the output end of third amplifier 23 connects filter module 3.Frequency demultiplier circuit its can by Ku wave band (10.7GHz~ 12.75GHz) weak radio-frequency signal that satellite transmission gets off amplify, filter, be mixed with local oscillator after export, it is final To required intermediate-freuqncy signal (950MHz~2150MHz) this section of IF frequency, the intermediate-freuqncy signal output module 5 of the utility model For single channel output.

The frequency demultiplier circuit of the utility model uses PLL conceptual design, uses external two of radio frequency in rf inputs Grade amplifying circuit is better than integrated rear built-in level-one using the external amplification of two-stage from performance and amplifies, this is based on performance perspective On consideration.And the first order of amplifying circuit uses the first amplifier 21 and the second amplifier 22, second level amplifying circuit shares Third amplifier 23 not only has advantage in cost price, but also can reduce the size of wiring board.

Preferably, filter module 3 selects filter capacitor.The utility model is directly replaced with the mode that filter capacitor carries connection For parallel coupling microstrip bandpass filter two-way in traditional design, it is therefore an objective to since the factor of PLL processing chip 4 itself easily causes OSC oscillation reduces OSC oscillation by way of using filter capacitor instead and directly carrying, and can stablize very much.

As a preferred option, first amplifier 21, the second amplifier 22, third amplifier 23 are respectively FET Effect pipe, as indicated with 2, the first amplifier 21, the second amplifier 22, third amplifier 23 are specifically respectively Q1, Q2, Q3.Amplification Module 2 further includes multiple capacitors and resistance.There is coupled capacitor between the first amplifier 21 and third amplifier 23, second There is coupled capacitor between amplifier 22 and third amplifier 23.First amplifier 21, the second amplifier 22, third amplifier 23 Front also have respectively they provide bias voltages resistance.

As a preferred option, as shown in figure 4, the model RDA3566E of PLL processing chip 4, is RDA The product of Microelectronics, Inc. company.

The frequency demultiplier circuit further includes power supply circuit module 6.Power supply circuit module 6 is connect with PLL processing chip 4, institute Stating power supply circuit module 6 includes voltage-stabiliser tube, as shown in figure 5, the input terminal connection PLL processing chip of power supply circuit module 6 POL22K foot, by PLL processing chip 4 provide 13V 18V voltage, then core handled by voltage-stabiliser tube U2 decompression access PLL The VCC foot of piece 4 handles chip for PLL and provides a low-voltage, and PLL processing chip 4 is allowed to have horizontal polarization signals and vertical polarization The function of signal switching.One end of the voltage-stabiliser tube is also connect with the output end of intermediate-freuqncy signal output module 5.

The input terminal of PLL processing chip 4 is also connected with clock crystal oscillator module 7, and clock crystal oscillator module 7 is for exciting and starting PLL handles the internal logic circuit of chip 4, and controls two-way radiofrequency signal and carry out Frequency mixing processing.When PLL processing chip 4 by when After the excitation starting of clock crystal oscillator module 7, amplified radiofrequency signal is subjected to function point, be then mixed and forms single channel intermediate frequency letter Number this section of IF frequency of 950MHz~2150MHz.

Embodiment two

The utility model provides a kind of frequency demultiplier, including frequency demultiplier cavity and the route being arranged on the frequency demultiplier cavity Plate is provided with above-mentioned frequency demultiplier circuit on the wiring board.

Preferably, the wiring board is FR4 fiberboard.

The utility model has the following beneficial effects:

A kind of microwave single channel frequency demultiplier circuit and frequency demultiplier provided by the utility model, frequency demultiplier circuit use the side PLL Case design is better than from performance in the rf inputs two-stage amplifying circuit external using radio frequency using the external amplification of two-stage Built-in level-one amplification after integrated, this is based on the consideration in performance perspective.And the first order of amplifying circuit uses the first amplifier With the second amplifier, second level amplifying circuit has shared third amplifier, not only has advantage in cost price, but also can To reduce the size of wiring board.

It should be understood that for those of ordinary skills, it can be modified or changed according to the above description, All these improvement or transformation all should belong within the protection scope of the appended claims for the utility model.

Claims (8)

1. a kind of microwave single channel frequency demultiplier circuit, including sequentially connected rf signal reception module, amplification module, filtering mould Block, PLL handle chip, intermediate-freuqncy signal output module；The frequency demultiplier circuit further includes power supply circuit module；It is characterized in that, The intermediate-freuqncy signal output module is single channel output；The rf signal reception module includes horizontally-polarized antenna and vertical polarization Antenna；The amplification module includes that the first amplifier connecting respectively with horizontally-polarized antenna and vertical polarized antenna and second are put Big device, the amplification module further include third amplifier, first amplifier and the second amplifier respectively with third amplifier Input terminal connection.

2. frequency demultiplier circuit according to claim 1, which is characterized in that the filter module is filter capacitor.

3. frequency demultiplier circuit according to claim 1, which is characterized in that first amplifier, the second amplifier, third Amplifier is respectively FET field-effect tube.

4. frequency demultiplier circuit according to claim 1, which is characterized in that the model of the PLL processing chip RDA3566E。

5. frequency demultiplier circuit according to claim 1, which is characterized in that the power supply circuit module and PLL handle chip Connection；The power supply circuit module includes voltage-stabiliser tube, and the voltage-stabiliser tube is connect with intermediate-freuqncy signal output module.

6. frequency demultiplier circuit according to claim 1, which is characterized in that the input terminal of the PLL processing chip is also connected with There is clock crystal oscillator module.

7. a kind of frequency demultiplier is arranged on the wiring board including frequency demultiplier cavity and the wiring board being arranged on frequency demultiplier cavity Have the right to require any frequency demultiplier circuit in 1-6.

8. frequency demultiplier according to claim 7, which is characterized in that the wiring board is FR4 fiberboard.