CN208706642U - Semiconductor interconnection structure - Google Patents
Semiconductor interconnection structure Download PDFInfo
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- CN208706642U CN208706642U CN201821445690.1U CN201821445690U CN208706642U CN 208706642 U CN208706642 U CN 208706642U CN 201821445690 U CN201821445690 U CN 201821445690U CN 208706642 U CN208706642 U CN 208706642U
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Abstract
The utility model provides a kind of semiconductor interconnection structure, comprising: substrate；Dielectric layer is formed with contact hole in dielectric layer positioned at the upper surface of substrate；The first metal layer is formed on the bottom and side wall of contact hole, and the first metal layer includes nucleating layer；Second metal layer is formed on the first metal layer, and to fill up contact hole, second metal layer includes seed layer, and the resistivity of second metal layer is less than the resistivity of the first metal layer.The utility model can form hole by re-forming second metal layer after forming the first metal layer prior to low temperature in contact hole to avoid the metal layer itself filled in contact hole, so as to be effectively reduced filling bulk metal layer resistance value；The resistivity of second metal layer is less than the resistivity of the first metal layer, can further decrease the resistance value of the bulk metal layer of filling.
Description
Technical field
The utility model belongs to ic manufacturing technology field, more particularly to a kind of semiconductor interconnection structure.
Background technique
In existing semiconductor company, carrying out tungsten film deposition using chemical vapor deposition process (CVD) is many semiconductors
Common technology in manufacture.In prior art, as shown in Figure 1, generally by that will be located in substrate 10 ', and internal formation
After thering is the dielectric layer 10 of contact hole 11 to be placed in vacuum chamber and be heated to technological temperature, first successively in forming adherency in contact hole 11
Behind barrier layer 12 and nucleation seed layer 13, it is in the contact hole 11 that deposition forms tungsten metal layer 14.
However, deepening continuously with device miniaturization, the size of semiconductor interconnection structure is smaller and smaller, using existing
Chemical vapor deposition process when carrying out a step to the contact hole 11 of high-aspect-ratio and filling to form the tungsten metal layer 14, hold
Hole 15 is formed easily in the tungsten metal layer 14 in the contact hole 11, the presence of described hole 15 will lead to subsequent coppersmith
There are problems of electromigration in skill, and the resistance value of filling metal layer in contact hole can be made larger, so as to cause semiconductor devices
Reliability decrease.
Utility model content
In view of the foregoing deficiencies of prior art, the purpose of this utility model is to provide a kind of semiconductors mutually to link
Structure forms the tungsten metal layer in a step in contact hole using existing chemical vapor deposition process in the prior art for solving
When can form hole in the tungsten metal layer of filling so that leading in subsequent process for copper that there are problems of electromigration, and can to connect
The resistance value of contact hole is larger, so as to cause the reliability decrease of semiconductor devices.
In order to achieve the above objects and other related objects, the utility model provides a kind of preparation side of semiconductor interconnection structure
The preparation method of method, the semiconductor interconnection structure includes the following steps:
1) substrate is provided, dielectric layer is formed in the substrate, forms contact hole in Yu Suoshu dielectric layer；
2) the first metal layer is formed to the bottom and side wall for being less than the contact hole in a manner of low temperature chemical vapor deposition,
The first metal layer includes nucleating layer；And
3) described with the plating mode that is electroplated comprising low current density in forming second metal layer on the first metal layer
Second metal layer includes seed layer, and the resistivity of the second metal layer is less than the resistivity of the first metal layer.
As a kind of preferred embodiment of the utility model, the depth-to-width ratio of the contact hole formed in step 1) is greater than 5.
As a kind of preferred embodiment of the utility model, the material of the first metal layer deposited in step 2) includes
Tungsten；The material of the second metal layer of step 3) deposition includes copper.
As a kind of preferred embodiment of the utility model, in step 2), it is used to form the reaction gas of the first metal layer
Body includes tungsten hexafluoride and monosilane.
As a kind of preferred embodiment of the utility model, in step 2), the temperature for forming the first metal layer is not higher than
300 DEG C, the thickness of the first metal layer of formation is between 500 angstroms~700 angstroms.
It is rapid 2) to include the following steps: as a kind of preferred embodiment of the utility model
2-1) nucleating layer is formed to the bottom and side wall for being less than the contact hole；And
2-2) surface of Yu Suoshu nucleating layer forms the body layer of the first metal layer, the material of the nucleating layer and institute
The main body layer material for stating the first metal layer is identical.
As a kind of preferred embodiment of the utility model, the deposition cycle of the nucleating layer is between 8~10.
As a kind of preferred embodiment of the utility model, diborane and six are used under the conditions of the temperature not higher than 300 DEG C
Tungsten fluoride deposits a deposition cycle as reaction gas；And monosilane and six are used under the conditions of the temperature not higher than 300 DEG C
Tungsten fluoride deposits 7~9 deposition cycles as reaction gas.
As a kind of preferred embodiment of the utility model, step 3) includes the following steps:
The seed layer 3-1) is formed in Yu Suoshu contact hole, the seed layer is located at the upper table of the first metal layer
Face；
It is 3-2) supreme gradually in electric in the contact hole from the upper surface of the seed layer under the first current density condition
Plate the first electroplated layer of first thickness；And
3-3) under the second current density condition in first electroplated layer upper surface and the upper surface of the dielectric layer after
Second electroplated layer of continuous plating second thickness, first current density are less than second current density；Wherein,
First electroplated layer and second electroplated layer collectively form the body layer of the second metal layer, the seed
The material of layer is identical as the main body layer material of the second metal layer.
As a kind of preferred embodiment of the utility model, step 3-2) in, first current density is between 1.5 peaces~3
Between peace, the first thickness is between 900 angstroms~1100 angstroms；Step 3-3) in, second current density is between 20 peaces~40
Between peace, the second thickness is between 3500 angstroms~4500 angstroms.
As a kind of preferred embodiment of the utility model, the thickness of the seed layer is between 150 angstroms~200 angstroms.
It further include following steps between step 1) and step 2): Yu Suoshu as a kind of preferred embodiment of the utility model
The step of bottom, side wall and the dielectric layer upper surface of contact hole form adhesion barrier layer；In step 2), first metal
Layer is formed in the surface of the adhesion barrier layer.
As a kind of preferred embodiment of the utility model, in step 2), the first metal layer is also formed into the dielectric
The upper surface of layer；It further include the first metal layer and second metal that removal is located on the dielectric layer after step 3)
The step of layer.
As a kind of preferred embodiment of the utility model, in step 2), bottom is formed in Yu Suoshu contact hole described the
It is proportional with the depth-to-width ratio of the contact hole that the thickness of one metal layer accounts for the ratio between described contact hole depth.
As a preferred embodiment of the present invention, in step 2), the first metal layer of formation in Yu Suoshu contact hole
Thickness account for it is described contact hole depth 10%~70%.
The utility model also provides a kind of semiconductor interconnection structure, and the semiconductor interconnection structure includes:
Substrate；
Dielectric layer is formed with contact hole in the dielectric layer positioned at the upper surface of the substrate；
The first metal layer is formed on bottom and the side wall of the contact hole in a manner of low temperature chemical vapor deposition, institute
Stating the first metal layer includes nucleating layer；And
Second metal layer, to be formed on the first metal layer comprising the plating mode that low current density is electroplated, to fill out
The full contact hole, the second metal layer includes seed layer, and the resistivity of the second metal layer is less than first metal
The resistivity of layer.
As a kind of preferred embodiment of the utility model, the depth-to-width ratio of the contact hole is greater than 5.
As a kind of preferred embodiment of the utility model, the first metal layer further includes body layer, is located at the nucleation
The surface of layer, the body layer of the first metal layer includes tungsten metal layer；The second metal layer further includes body layer, is located at institute
The surface of seed layer is stated, the body layer of the second metal layer includes copper metal layer.
As a kind of preferred embodiment of the utility model, the depositing temperature of the first metal layer is described not higher than 300 DEG C
The thickness of the first metal layer is between 500 angstroms~700 angstroms.
As a kind of preferred embodiment of the utility model, the body layer of the second metal layer includes the first electroplated layer and the
Two electroplated layers, first electroplated layer are located at the upper surface of the first metal layer, and second electroplated layer is located at least in described
The upper surface of first electroplated layer.
As a kind of preferred embodiment of the utility model, current density of first electroplated layer between~3 peace of 1.5 peace
It is lower plating and formed, the thickness of first electroplated layer is between 900 angstroms~1100 angstroms；Second electroplated layer in 20 pacify~
It is electroplated and is formed under current density between 40 peaces, the thickness of second electroplated layer is between 3500 angstroms~4500 angstroms.
As a kind of preferred embodiment of the utility model, the nucleating layer is located at the dielectric layer and the first metal layer
Body layer between；The material of the nucleating layer is identical as the main body layer material of the first metal layer；And
The seed layer is located between the body layer of the first metal layer and the body layer of the second metal layer；It is described
The material of seed layer is identical as the main body layer material of the second metal layer.
As a kind of preferred embodiment of the utility model, the thickness of the seed layer is between 150 angstroms~200 angstroms.
As a kind of preferred embodiment of the utility model, the semiconductor interconnection structure further includes adhesion barrier layer, at least
It is formed in bottom edge and the side wall of the contact hole, and between the dielectric layer and the first metal layer.
As a kind of preferred embodiment of the utility model, the thickness of the adhesion barrier layer between 100 angstroms~200 angstroms it
Between.
As a kind of preferred embodiment of the utility model, the first metal layer directly coats the bottom of the second metal layer
Portion and side wall, the depth-width ratio of the second metal layer are less than the depth-to-width ratio of the contact hole.
As described above, the semiconductor interconnection structure of the utility model, has the advantages that
The utility model can be kept away by re-forming second metal layer after forming the first metal layer prior to low temperature in contact hole
Exempt from the metal layer itself filled in contact hole formed hole, so as to be effectively reduced filling bulk metal layer resistance
Value；
The resistivity of second metal layer is less than the resistivity of the first metal layer, can further decrease the bulk metal of filling
The resistance value of layer；
The first metal layer may include tungsten, and second metal layer may include copper, tungsten layer be formed in present contact hole, then connecing
Layers of copper is formed in contact hole, tungsten will not be blended with copper, and tungsten can play the role of barrier layer, can be to avoid copper to Jie below tungsten
Diffusion in electric layer.
Detailed description of the invention
Fig. 1 is shown as gained after filling tungsten metal layer in contact hole using chemical vapor deposition process in the prior art and ties
The cross section structure schematic diagram of structure.
Fig. 2 is shown as the flow chart of the preparation method of the semiconductor interconnection structure provided in the utility model embodiment one.
The preparation method that Fig. 9 to Figure 10 is shown as the semiconductor interconnection structure provided in the utility model embodiment one respectively walks
Cross section structure schematic diagram in rapid；Wherein, Figure 10 is the section knot of the semiconductor interconnection structure in the utility model embodiment two
Structure schematic diagram.
Reference numerals explanation
10 ' substrates
10 dielectric layers
11 contact holes
12 adhesion barrier layers
13 nucleating layers
14 tungsten metal layers
15 holes
20 ' substrates
20 dielectric layers
21 contact holes
22 the first metal layers
The body layer of 221 the first metal layers
23 second metal layers
231 first electroplated layers
232 second electroplated layers
The body layer of 233 second metal layers
24 nucleating layers
25 seed layers
26 adhesion barrier layers
Specific embodiment
Illustrate the embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this theory
Content disclosed by bright book understands other advantages and effect of the utility model easily.The utility model can also be by addition
Different specific embodiments are embodied or practiced, and the various details in this specification can also be based on different viewpoints and answer
With carrying out various modifications or alterations under the spirit without departing from the utility model.
Fig. 2 is please referred to Figure 10.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of utility model, though it is only shown with related component in the utility model rather than when according to actual implementation in diagram
Component count, shape and size are drawn, when actual implementation form, quantity and the ratio of each component can arbitrarily change for one kind
Become, and its assembly layout form may also be increasingly complex.
Embodiment one
As shown in Fig. 2, the utility model provides a kind of preparation method of semiconductor interconnection structure, the semiconductor mutually links
The preparation method of structure includes the following steps:
1) substrate is provided, dielectric layer is formed in the substrate, forms contact hole in Yu Suoshu dielectric layer；
2) the first metal layer is formed to the bottom and side wall for being less than the contact hole in a manner of low temperature chemical vapor deposition,
The first metal layer includes nucleating layer；And
3) described with the plating mode that is electroplated comprising low current density in forming second metal layer on the first metal layer
Second metal layer includes seed layer, and the resistivity of the second metal layer is less than the resistivity of the first metal layer.
In step 1), the S1 step and Fig. 3 of Fig. 2 are please referred to, a substrate 20 ' is provided, Jie is formed in the substrate 20 '
Electric layer 20, Yu Suoshu dielectric layer 20 is interior to form contact hole 21.
As an example, the substrate 20 ' can be any one existing substrate, the material of the substrate 20 ' be can wrap
Include but be not limited to silica, gallium nitride or sapphire etc..
As an example, the dielectric layer 20 can be that can arbitrarily form the contact known to ordinary skill
The semiconductor interconnection structure that hole 21 and the contact hole 21 need to be filled can be with such as the interlayer dielectric layer of semiconductor devices
The contact hole 21 is formed, electric connection structure (for example, conductive plugs) are formed after filling, using the mutual connection as upper and lower device layer
Structure.The material of the dielectric layer 20 may include but be not limited only to silicon oxide or silicon nitride etc..
As an example, the quantity of the contact hole 21 formed in the dielectric layer 20 can be it is multiple, it is multiple described to connect
Contact hole 21 is intervally arranged in the dielectric layer 20.Multiple contact holes 21 can be equidistantly spaced in the dielectric layer 20
Arrangement, can also be equidistantly intervally arranged with non-.Fig. 3 is only formed with the contact hole 21 as showing using in the dielectric layer 20
Example, the actual quantity of the contact hole 21 are not limited.
As an example, the cross sectional shape of the contact hole 21 can be set according to actual needs, it is preferable that this implementation
In example, the cross sectional shape of the contact hole 21 may include rectangle, the trapezoidal or shape that filling arbitrarily may be implemented such as U-shaped.
As an example, the contact hole 21 is preferably the contact hole of high-aspect-ratio, it is preferable that described to connect in the present embodiment
The depth-to-width ratio of contact hole 21 can be greater than 5.
As an example, as shown in figure 4, further including following steps after step 1): the bottom of Yu Suoshu contact hole 21, side wall
And 20 upper surface of dielectric layer forms the step of adhesion barrier layer 26.The adhesion barrier layer 26 may include Ti layers, can also
It can also include Ti layers and TiN layer to include TiN layer；The thickness of the adhesion barrier layer 26 is not easy too thick, the general adherency
The thickness on barrier layer 26 is between 100 angstroms~200 angstroms.
Addressed on it should be noted that it is subsequent be previously mentioned " between ... between " refer to the numerical value model including two endpoints
It encloses, for example, above-mentioned refers to the numberical range including 100 and 200 two endpoints " between 100 angstroms~200 angstroms ".
In step 2), the S2 step and Fig. 5 to Fig. 6 in Fig. 2 are please referred to, in a manner of low temperature chemical vapor deposition at least
The first metal layer 22 is formed in the bottom and side wall of the contact hole 21, the first metal layer 22 includes nucleating layer 24.
As an example, as shown in figure 5, step 2) includes the following steps:
2-1) bottom of Yu Suoshu contact hole 21 and side wall form the nucleating layer 24；And
2-2) surface of Yu Suoshu nucleating layer 24 forms the body layer 221 of the first metal layer 22, the nucleating layer 24
Material it is identical as 221 material of body layer of the first metal layer 22.
As an example, the nucleating layer 24 is usually to be carried out in a manner of multiple deposition cycles (cycle), for example, each
The deposition cycle time is that (certainly, in other examples, the time of each deposition cycle can also set 10s according to actual needs
For other numerical value, herein without limitation), in each deposition cycle by pulsed supply mode be successively passed through reaction gas into
Row deposition, and will the discharge of discarded and byproduct of reaction after each deposition cycles.Preferably, in the present embodiment, it is described at
The deposition cycle of stratum nucleare 24 is between 8~10；Specifically, prior to being passed through diborane under the conditions of the temperature not higher than 300 DEG C
(B2H6) and tungsten hexafluoride (WF6) one deposition cycle of deposition is carried out as soakage layer, then it is the temperature not higher than 300 DEG C
Under the conditions of be passed through monosilane (SiH4) and tungsten hexafluoride (WF6) carry out 7~9 deposition cycles of deposition, reaction formula at this time are as follows:
2WF6(g)+3SiH4(g)=2W (s)+3SiF4(g)+6H2(g).In prior art, the technique of chemical gas deposition is typically in the range of 400
DEG C~1200 DEG C between, in the utility model, temperature needed for forming the low temperature chemical vapor deposition of the first metal layer 22
Less than 300 degrees Celsius.Deposited using aforesaid way the nucleating layer 24 to be formed with relatively good uniformity and crystal orientation it is good,
It can be laid for filling after the contact hole 21 good and basic.
As an example, the first metal layer 22 is also formed into the upper surface of the dielectric layer 20.
As an example, the thickness of the first metal layer 22 formed in Yu Suoshu contact hole 21 accounts for described in step 2)
The ratio between 21 depth of contact hole and the depth-to-width ratio of the contact hole 21 are proportional, i.e., the depth-to-width ratio of the described contact hole 21 is bigger, described
The ratio between the thickness of the first metal layer 22 and the depth of the contact hole 21 are smaller.Preferably, it is formed in Yu Suoshu contact hole 21
The thickness of the first metal layer 22 account for the 10%~70% of 21 depth of contact hole.For example, when the contact hole 21
When depth-to-width ratio is 5, the thickness of the first metal layer 22 formed in the contact hole 21 accounts for 21 depth of contact hole
65% or so, when the depth-to-width ratio of the contact hole 21 is 12, the first metal layer 22 of formation in the contact hole 21
Thickness accounts for 50% or so of 21 depth of contact hole.
As an example, the material of the first metal layer 22 may include tungsten；Specifically, in step 2), it can Yu Bugao
Under the conditions of 300 DEG C of temperature, the first metal layer 22 is formed using chemical vapor deposition process, is used to form described first
The reaction gas of metal layer 22 includes tungsten hexafluoride and hydrogen (H2)；The thickness of the first metal layer 22 formed can be between
Between 500 angstroms~700 angstroms.The utility model prior under cryogenic conditions in depositing the first metal layer in the contact hole 21
22, since the deposition rate of the first metal layer 22 described under cryogenic conditions is slow, what is deposited in Yu Suoshu contact hole 21 is described
In the first metal layer 22 will not hole generation；Meanwhile prior to depositing certain thickness described first in the contact hole 21
Metal layer 22, then when depositing the second metal layer 23 in the contact hole 21, the second metal layer 23 is corresponding described
The practical depth-to-width ratio that contact hole 21 is not filled by part will be obviously reduced, so as to avoid the second metal described in subsequent deposition
The generation of 23 inside aperture of second metal layer when layer 23.
In step 3), the S3 step and Fig. 7 to Fig. 9 in Fig. 2 are please referred to, with the plating side being electroplated comprising low current density
Formula on the first metal layer 22 formed second metal layer 23, the second metal layer 23 include seed layer 25, described second
The resistivity of metal layer 23 is less than the resistivity of the first metal layer 22.
As an example, step 3) includes the following steps:
The seed layer 25 3-1) is formed in Yu Suoshu contact hole 21, the seed layer 25 is located at the first metal layer 22
Upper surface, as shown in Figure 7；
It is 3-2) supreme gradually in the contact hole 21 from the upper surface of the seed layer 25 under the first current density condition
First electroplated layer 231 of interior plating first thickness；And
3-3) in 231 upper surface of the first electroplated layer and the upper table of the dielectric layer 20 under the second current density condition
The second electroplated layer 232 that second thickness is electroplated is continued in face, and first current density is less than second current density；Wherein,
First electroplated layer 231 collectively forms the body layer of the second metal layer 23 with second electroplated layer 232
233, the material of the seed layer 25 is identical as 233 material of body layer of the second metal layer 23.
As an example, the seed layer 25 can be formed using electroplating technology；Described kind in the contact hole 21
The thickness of sublayer 25 can account for 2%~3% or so of the sum of both the second metal layer 23 and the seed layer 25 thickness, excellent
Selection of land, in the present embodiment, the thickness of the seed layer 25 can be between 150 angstroms~200 angstroms.
As an example, the material of the second metal layer 23 may include copper.
As an example, step 3-2) in, between~3 peace of 1.5 peace, the first thickness is situated between first current density
In 900 angstroms~1100 angstroms；Step 3-3) in, between~40 peace of 20 peace, the second thickness is situated between second current density
In 3500 angstroms~4500 angstroms.
It should be noted that first electroplated layer 231 can fill up the contact hole 21, it can also be described in fill part
Contact hole 21.
It should be further noted that in one example, first electroplated layer 231 can be located at the contact hole 21
On the upper surface of bottom, side wall and the dielectric layer 20, at this point, being located at first electroplated layer of 21 bottom of contact hole
231 thickness is much larger than first electroplated layer on the upper surface of 231 side wall of contact hole and the dielectric layer 20
231 thickness, as shown in Figure 8；In another example, first electroplated layer 231 can also be only by the bottom of the contact hole 21
Portion is filled in the bottom of the contact hole 21 from the bottom to top, and and is not formed at the side wall and the dielectric layer of the contact hole 21
20 upper surface.
The part second metal layer 23 is formed prior to plating under lower current density, described the under low current density
The deposition rate of two metal layers 23 is slower, it is possible to prevente effectively from forming hole in the second metal layer 23 formed.
Since the resistivity of copper is significantly less than the resistivity of tungsten, filling includes first gold medal of tungsten in the contact hole 21
Belong to layer 22 and the second metal layer 23 including copper, compared to the prior art in tungsten metal is directly filled in the contact hole
The scheme of layer, the utility model significant can reduce the resistance value for the bulk metal layer filled in the contact hole 21；Meanwhile tungsten
It will not be blended with copper, tungsten can play the role of barrier layer, can spread, can subtract into the dielectric layer below tungsten to avoid copper
The use on few barrier layer.
As an example, as shown in Figure 10, after step 3) further including that removal is located at (the i.e. described dielectric on the dielectric layer 20
Above 20 upper surface of layer) the first metal layer 22 and the step of the second metal layer 23.Specifically, can use but not
It is only limitted to chemical mechanical milling tech (CMP) removal and is located at the first metal layer 22 of 20 upper surface of dielectric layer and described
Second metal layer 23.
It should be noted that being located at when being formed with the nucleating layer 24 and the seed layer 25 on the dielectric layer 20
The nucleating layer 24 on the dielectric layer 20 and the seed layer 25 on the dielectric layer 20 are also removed simultaneously.
It should be further noted that second metal layer 23 described in Figure 10 is shown do not have as a whole
Body illustrates first electroplated layer 231 and second electroplated layer 232.
Embodiment two
Incorporated by reference to Fig. 2 to Fig. 8 with continued reference to Fig. 9 to Figure 10, the utility model also provides a kind of semiconductor interconnection structure, institute
Stating semiconductor interconnection structure includes:
Substrate 20 '；
Dielectric layer 20, the dielectric layer 20 are located at the upper surface of the substrate 20 ', are formed with contact in the dielectric layer 20
Hole 21；
The first metal layer 22, the first metal layer 22 are formed on bottom and the side wall of the contact hole 21, specifically,
The first metal layer 22 is formed on bottom and the side wall of the contact hole 21 in a manner of low temperature chemical vapor deposition, described
The first metal layer 22 includes nucleating layer 24；And
Second metal layer 23, the second metal layer 23 are formed on the first metal layer 22, specifically, described second
Metal layer 23 comprising the plating mode that low current density is electroplated to be formed on the first metal layer 22, to fill up the contact
Hole 21, the second metal layer 23 include seed layer 25, and the resistivity of the second metal layer 23 is less than the first metal layer
22 resistivity.
As an example, the substrate 20 ' can be any one existing substrate, the material of the substrate 20 ' be can wrap
Include but be not limited to silica, gallium nitride or sapphire etc..
As an example, the dielectric layer 20 can be that can arbitrarily form the contact known to ordinary skill
The semiconductor interconnection structure that hole 21 and the contact hole 21 need to be filled can be with such as the interlayer dielectric layer of semiconductor devices
The contact hole 21 is formed, electric connection structure (for example, conductive plugs) are formed after filling, using the mutual connection as upper and lower device layer
Structure.The material of the dielectric layer 20 may include but be not limited only to silicon oxide or silicon nitride etc..
As an example, the quantity of the contact hole 21 formed in the dielectric layer 20 can be it is multiple, it is multiple described to connect
Contact hole 21 is intervally arranged in the dielectric layer 20.Multiple contact holes 21 can be equidistantly spaced in the dielectric layer 20
Arrangement, can also be equidistantly intervally arranged with non-.Fig. 3 is only formed with the contact hole 21 as showing using in the dielectric layer 20
Example, the actual quantity of the contact hole 21 are not limited.
As an example, the cross sectional shape of the contact hole 21 can be set according to actual needs, it is preferable that this implementation
In example, the cross sectional shape of the contact hole 21 may include rectangle, the trapezoidal or shape that filling arbitrarily may be implemented such as U-shaped.
As an example, the contact hole 21 is preferably the contact hole of high-aspect-ratio, it is preferable that described to connect in the present embodiment
The depth-to-width ratio of contact hole 21 can be greater than 5.
As an example, the thickness of the first metal layer 22 in the contact hole 21 accounts for the ratio between described 21 depth of contact hole
Proportional with the depth-to-width ratio of the contact hole 21, i.e., the depth-to-width ratio of the described contact hole 21 is bigger, the thickness of the first metal layer 22
It spends smaller with the ratio between the depth of the contact hole 21.Preferably, the thickness of the first metal layer 22 in the contact hole 21
Degree accounts for the 45%~70% of 21 depth of contact hole.For example, when the depth-to-width ratio of the contact hole 21 is 5, the contact hole
The thickness of the first metal layer 22 in 21 accounts for 65% or so of 21 depth of contact hole, when the deep width of the contact hole 21
When than being 12, the thickness of the first metal layer 22 in the contact hole 21 accounts for 50% or so of 21 depth of contact hole.
As an example, the first metal layer 22 further includes body layer 221, the body layer 221 of the first metal layer 22
Positioned at the surface of the nucleating layer 24, the body layer 221 of the first metal layer 22 may include tungsten metal layer specifically, described
The first metal layer 22 can be formed under the conditions of the temperature not higher than 300 DEG C using chemical vapor deposition process；First gold medal
The thickness for belonging to layer 22 can be between 500 angstroms~700 angstroms.The shape under cryogenic conditions of the first metal layer 22 described in the utility model
At since the deposition rate of the first metal layer 22 described under cryogenic conditions is slow, what is deposited in Yu Suoshu contact hole 21 is described
In the first metal layer 22 will not hole generation；Meanwhile prior to forming certain thickness described first in the contact hole 21
Metal layer 22, then when forming the second metal layer 23 in the contact hole 21, the second metal layer 23 is corresponding described
The practical depth-to-width ratio that contact hole 21 is not filled by part will be obviously reduced, so as to avoid the second metal described in subsequent deposition
The generation of 23 inside aperture of second metal layer when layer 23.
As an example, the second metal layer 23 further includes body layer 233, the body layer 233 of the second metal layer 23
Positioned at the surface of the seed layer 25, the body layer 233 of the second metal layer 23 includes copper metal layer；The second metal layer
23 body layer 233 includes the first electroplated layer 231 and the second electroplated layer 232, and first electroplated layer 231 is located at first gold medal
Belong to the upper surface of layer 22, second electroplated layer 232 is located at least in the upper surface of first electroplated layer 231.
As an example, be electroplated and formed under current density of first electroplated layer 231 between~3 peace of 1.5 peace, it is described
The thickness of first electroplated layer 231 is between 900 angstroms~1100 angstroms；Second electroplated layer 232 is between~40 peace of 20 peace
It is electroplated and is formed under current density, the thickness of second electroplated layer 232 is between 3500 angstroms~4500 angstroms.
It should be noted that first electroplated layer 231 can fill up the contact hole 21, it can also be described in fill part
Contact hole 21.
It should be further noted that in one example, first electroplated layer 231 can be located at the contact hole 21
On the upper surface of bottom, side wall and the dielectric layer 20, at this point, being located at first electroplated layer of 21 bottom of contact hole
231 thickness is much larger than first electroplated layer on the upper surface of 231 side wall of contact hole and the dielectric layer 20
231 thickness, as shown in Figure 8；In another example, first electroplated layer 231 can also be only by the bottom of the contact hole 21
Portion is filled in the bottom of the contact hole 21 from the bottom to top, and and is not formed at the side wall and the dielectric layer of the contact hole 21
20 upper surface.
The part second metal layer 23 is formed prior to plating under lower current density, described the under low current density
The deposition rate of two metal layers 23 is slower, it is possible to prevente effectively from forming hole in the second metal layer 23 formed.
Since the resistivity of copper is significantly less than the resistivity of tungsten, filling includes first gold medal of tungsten in the contact hole 21
Belong to layer 22 and the second metal layer 23 including copper, compared to the prior art in tungsten metal is directly filled in the contact hole
The scheme of layer, the utility model significant can reduce the resistance value for the bulk metal layer filled in the contact hole 21；Meanwhile tungsten
It will not be blended with copper, tungsten can play the role of barrier layer, can spread, can subtract into the dielectric layer below tungsten to avoid copper
The use on few barrier layer.
As an example, the nucleating layer 24 be located at the dielectric layer 20 and the first metal layer 22 body layer 221 it
Between；The material of the nucleating layer 24 is identical as the material of body layer 221 of the first metal layer 22；
The seed layer 25 is located at the body layer 221 of the first metal layer 22 and the body layer of the second metal layer 23
Between 233；The material of the seed layer 25 is identical as the material of body layer 233 of the second metal layer 23.
As an example, the seed layer 25 can be formed using electroplating technology；Described kind in the contact hole 21
The thickness of sublayer 25 can account for 2%~3% or so of the sum of both the second metal layer 23 and the seed layer 25 thickness, excellent
Selection of land, in the present embodiment, the thickness of the seed layer 25 can be between 150 angstroms~200 angstroms.
As an example, the semiconductor interconnection structure further includes adhesion barrier layer 26, the adhesion barrier layer 26 at least shape
The bottom edge of contact hole 21 and side wall described in Cheng Yu, and between the dielectric layer 20 and the first metal layer 22.
As an example, the adhesion barrier layer 26 may include Ti layers, it also may include TiN layer, can also include Ti layers
And TiN layer；The thickness of the adhesion barrier layer 26 be not easy it is too thick, the thickness of the general adhesion barrier layer 26 between 100 angstroms~
Between 200 angstroms.
Addressed on it should be noted that it is subsequent be previously mentioned " between ... between " refer to the numerical value model including two endpoints
It encloses, for example, above-mentioned refers to the numberical range including 100 and 200 two endpoints " between 100 angstroms~200 angstroms ".
In one example, as shown in figure 9, the first metal layer 22, the second metal layer 23, the nucleating layer 24,
The seed layer 25 and the adhesion barrier layer 26 are not only located in the contact hole 21, are also located at the upper table of the dielectric layer 20
On face.
In another example, as shown in Figure 10, the first metal layer 22, the second metal layer 23, the nucleating layer
24, the seed layer 25 and the adhesion barrier layer 26 are only located in the contact hole 21, i.e., the described the first metal layer 22, described
Second metal layer 23, the nucleating layer 24, the seed layer 25 and the adhesion barrier layer 26 upper surface with the dielectric
The upper surface flush of layer 20.
It should be noted that second metal layer 23 described in Figure 10 is shown as a whole, not specific signal
First electroplated layer 231 and second electroplated layer 232 out.
As an example, the first metal layer 22 directly coats the bottom and side wall of the second metal layer 23, described
The depth-width ratio of two metal layers 23 is less than the depth-to-width ratio of the contact hole 21.
In conclusion the utility model provides a kind of semiconductor interconnection structure, the preparation side of the semiconductor interconnection structure
Method includes the following steps: 1) to provide a substrate, dielectric layer is formed in the substrate, forms contact hole in Yu Suoshu dielectric layer；
2) in a manner of low temperature chemical vapor deposition to be less than the contact hole bottom and side wall formed the first metal layer, described first
Metal layer includes nucleating layer；And 3) with the plating mode that is electroplated comprising low current density in forming second on the first metal layer
Metal layer, the second metal layer include seed layer, and the resistivity of the second metal layer is less than the electricity of the first metal layer
Resistance rate.The utility model, can be to avoid by re-forming second metal layer after forming the first metal layer prior to low temperature in contact hole
The metal layer itself filled in contact hole forms hole, so as to be effectively reduced filling bulk metal layer resistance value；
The resistivity of second metal layer is less than the resistivity of the first metal layer, can further decrease the resistance of the bulk metal layer of filling
Value；The first metal layer may include tungsten, and second metal layer may include copper, tungsten layer be formed in present contact hole, then in contact hole
Interior formation layers of copper, tungsten will not be blended with copper, and tungsten can play the role of barrier layer, can be to avoid copper to the dielectric layer below tungsten
Interior diffusion.
The above embodiments are only illustrative of the principle and efficacy of the utility model, and not for limitation, this is practical new
Type.Any person skilled in the art can all carry out above-described embodiment under the spirit and scope without prejudice to the utility model
Modifications and changes.Therefore, such as those of ordinary skill in the art without departing from the revealed essence of the utility model
All equivalent modifications or change completed under mind and technical idea, should be covered by the claim of the utility model.
Claims (11)
1. a kind of semiconductor interconnection structure, which is characterized in that the semiconductor interconnection structure includes:
Substrate；
Dielectric layer is formed with contact hole in the dielectric layer positioned at the upper surface of the substrate；
The first metal layer is formed on bottom and the side wall of the contact hole, and the first metal layer includes nucleating layer；And second
Metal layer is formed on the first metal layer, and to fill up the contact hole, the second metal layer includes seed layer, described
The resistivity of second metal layer is less than the resistivity of the first metal layer.
2. semiconductor interconnection structure according to claim 1, which is characterized in that the depth-to-width ratio of the contact hole is greater than 5.
3. semiconductor interconnection structure according to claim 1, which is characterized in that the first metal layer further includes main body
Layer, positioned at the surface of the nucleating layer, the body layer of the first metal layer includes tungsten metal layer；The second metal layer is also wrapped
Body layer is included, positioned at the surface of the seed layer, the body layer of the second metal layer includes copper metal layer.
4. semiconductor interconnection structure according to claim 1, which is characterized in that the depositing temperature of the first metal layer is not
Higher than 300 DEG C, the thickness of the first metal layer is between 500 angstroms~700 angstroms.
5. semiconductor interconnection structure according to claim 3, which is characterized in that the body layer of the second metal layer includes
First electroplated layer and the second electroplated layer, first electroplated layer are located at the upper surface of the first metal layer, second plating
Layer is located at least in the upper surface of first electroplated layer.
6. semiconductor interconnection structure according to claim 5, which is characterized in that first electroplated layer is in~3 peace of 1.5 peace
Between current density under be electroplated and formed, the thickness of first electroplated layer is between 900 angstroms~1100 angstroms；Described second
Electroplated layer is electroplated and is formed under the current density between~40 peace of 20 peace, the thickness of second electroplated layer between 3500 angstroms~
4500 angstroms.
7. semiconductor interconnection structure according to claim 1, which is characterized in that
The nucleating layer is between the dielectric layer and the body layer of the first metal layer；The material of the nucleating layer and institute
The main body layer material for stating the first metal layer is identical；And
The seed layer is located between the body layer of the first metal layer and the body layer of the second metal layer；The seed
The material of layer is identical as the main body layer material of the second metal layer.
8. semiconductor interconnection structure according to claim 7, which is characterized in that the thickness of the seed layer is between 150 angstroms
Between~200 angstroms.
9. semiconductor interconnection structure according to claim 1, which is characterized in that the semiconductor interconnection structure further includes gluing
Attached barrier layer, bottom edge and side wall at least formed on the contact hole, and be located at the dielectric layer and the first metal layer it
Between.
10. semiconductor interconnection structure according to claim 9, which is characterized in that the thickness of the adhesion barrier layer between
Between 100 angstroms~200 angstroms.
11. semiconductor interconnection structure according to any one of claim 1 to 10, which is characterized in that first metal
Layer directly coats the bottom and side wall of the second metal layer, and the depth-width ratio of the second metal layer is less than the depth of the contact hole
Wide ratio.
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