CN2084642U - Non-volatile read only memory detecting device - Google Patents
Non-volatile read only memory detecting device Download PDFInfo
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- CN2084642U CN2084642U CN 90224044 CN90224044U CN2084642U CN 2084642 U CN2084642 U CN 2084642U CN 90224044 CN90224044 CN 90224044 CN 90224044 U CN90224044 U CN 90224044U CN 2084642 U CN2084642 U CN 2084642U
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Abstract
The utility model relates to a device for the detection of a non-volatile read only memory which is the peripheral of the infrared receiving microprocessor of a telecontrol TV set and a telecontrol video recorder. The utility model comprises a signal generator which is composed of an infrared receiving microprocessor IC1 and a non-volatile read only memory master slice IC2, a detection start-up circuit, a tristate buffer IC3, a K+1 system counter IC5, shift registers A and B, a comparator (1), an analog switch circuit IC6 which selects one from multi-circuits, son sheet element circuits of the measured non-volatile read only memory VM1, VM2. VMK, a test result shift register C and a light-emitting diode for the indication of the power supply circuit.
Description
The utility model relates to a kind of device that remote-controlled television set and the non-volatile ROM (read-only memory) of the infrared reception microprocessor of remote control video tape recorder peripheral hardware are detected.
Detecting the method for establishing non-volatile ROM (read-only memory) in remote-controlled television set and the infrared reception microprocessor of remote control video tape recorder place at present is that this kind storer is directly installed on the infrared receiving processing circuit of remote-controlled television set formula remote control video tape recorder, see complete machine is whether working properly and judge whether this storer is good, whether can operate as normal.This detection method is very slow, can not adapt to the needs of producing remote-controlled television set and remote control video tape recorder in enormous quantities.
The purpose of this utility model is to provide a kind of and can once detects a plurality of remote-controlled television sets and the used non-volatile ROM (read-only memory) of the infrared reception microprocessor of remote control video tape recorder; Once differentiate the device of the quality of these storer quality.
The purpose of this utility model is achieved in that by infrared reception microprocessor and non-volatile ROM (read-only memory) master slice forms signal generator, detect start-up circuit, three-state buffer, K+1 system counter, shift register A, shift register B, comparer, multichannel is selected an analog switching circuit, the sub-blade unit circuit of tested non-volatile ROM (read-only memory), and testing result shift register power circuit and indication diode are formed.
Signal generator adopts the infrared reception microprocessor IC1 and the non-volatile ROM (read-only memory) IC2 circuit of existing remote-controlled television set and remote control video tape recorder, sees Fig. 1.Signal generator produces G0, D, J0, J1, J2 and J3 pulse signal.These signal ends connect the input end of three-state buffer respectively, each output terminal of this three-state buffer links to each other with the sub-sheet of each tested non-volatile ROM (read-only memory) respectively, the connected mode all connected mode with microprocessor IC1 and non-volatile ROM (read-only memory) master slice IC2 is identical, sees Fig. 1 and Fig. 2.The 1st clock end (CLK1) of three-state buffer J3 ' signal output part and K+1 system counter and shift register A, B and permission/forbid that end (E0) links to each other, this J3 ' signal end and through a phase inverter G4 and multichannel select an analog switch IC6 forbid hold the clock end CLK of (INH) and testing result shift register to link to each other.J1 ' the output terminal of three-state buffer IC3 links to each other with the data input pin DA of shift register A through a phase inverter G3.The output terminal of K+1 system counter IC5 selects the address end of an analog switch IC6 to link to each other respectively with multichannel respectively.The number of determining to depend on the sub-sheet of the non-volatile ROM (read-only memory) of primary measured of the way that the K value of K+1 system counter IC5 and multichannel are selected an analog switch, if any 8 tested sub-sheets, then to select the way of an analog switch be 8 for K value and multichannel, the carry end Q3 of K+1 system counter IC5 and lowest order connect two input ends of two inputs and door G5, should allow/forbid to hold E2 with of the output termination three-state buffer IC3 of door G5.Multichannel selects a plurality of input ends of an analog switch IC6 to link to each other with the VMI-VMK end of a plurality of tested non-volatile ROM (read-only memory) NVROMI-NVROMK respectively, its output terminal X links to each other with the data input pin DB of shift register B, and shift register A and B are 12 bit shift register.Comparer (1) also is 12 bit comparators.12 output terminals of shift register A link to each other with one group of 12 input end of comparer (1) respectively, 12 output terminals of shift register A link to each other with one group of 12 input end of comparer (1) respectively, and 12 output terminals of shift register B link to each other with 12 input ends of another group of comparer (1) respectively.The equal output terminal (A=B) of comparer (1) meets the data input pin DC of testing result shift register C.Each output terminal of testing result shift register C links to each other with the negative pole of light emitting diode through a resistance respectively, and the positive pole of each light emitting diode connects power Vcc.
Detect starting circuit and form an end ground connection of switch S 1 by a delay circuit IC4, phase inverter G1 and G2 and switch S 1.When pressing a switch S 1, phase inverter G1 exports high level, and phase inverter G2 gives negative pulse of clear terminal of K+1 system counter IC5, and this counter is cleared.Simultaneously, give negative pulse of input end A of delay circuit IC4, its output terminal Q output low level at this moment, and make this low level postpone a period of time.This low level and make three-state buffer IC3 be in strobe state with the low level of door G5 output makes and detects beginning.At this moment K+1 system counter IC5 counts J3 ' pulse signal, the output pulse of this counter is selected the address date of an analog switch as multichannel, make this analog switch to the VM pulse signal of the tested non-volatile ROM (read-only memory) of its each input one by one gating output to the data input pin of shift register B; The permission that J3 ' pulse signal selects an analog switch through a phase inverter as the clock signal (CLK) and the multichannel of testing result shift register/forbid end (INH) signal, J1 ' pulse signal is sent into the data input pin DA of shift register A through phase inverter G3, J0 ' pulse signal is also as the clock signal of shift register A and B, like this, when shift register A and B write data respectively and when comparer compares two groups of data and comparative result sent into the enough bit register C operation of testing result, multichannel selects an analog switch to be in illegal state, when a compare operation is finished, this analog switch is the VM pulse signal of the sub-sheet of the next tested non-volatile ROM (read-only memory) of gating output again, repeats the aforesaid operations process.After last compare operation finishes, has promptly carried out K compare operation, because K+1 system counter carry output terminal Cy becomes high level,, three-state buffer is under an embargo with door G5 output high level, so far, the one-time detection process finishes automatically.
Particular circuit configurations of the present utility model is provided by following examples and accompanying drawing.
Fig. 1 is the signal generator circuit structural drawing that adopts remote-controlled television set infrared reception microprocessor M50436-560SP and the non-volatile ROM (read-only memory) M58655P of peripheral hardware thereof to form.
Fig. 2 is the sub-sheet electrical block diagrams of a plurality of non-volatile ROM (read-only memory).
Fig. 3 detects start-up circuit, three-state buffer, and K+1 device system counter and multichannel are selected the connecting circuit structural drawing between the analog switch.
Fig. 4 is the connection diagram between comparer, shift register A and B, the testing result shift register.
Describe the utility model in detail below in conjunction with accompanying drawing.
Signal generator adopts the infrared reception microprocessor IC device and the non-volatile ROM (read-only memory) IC2 circuit of existing remote-controlled television set and remote control video tape recorder, sees Fig. 1.Signal generator produces G0, D, J0, J1, J2 and J3 pulse signal.The input end of the attitude impact damper that these signal ends connect respectively, each output terminal of this three-state buffer divides in addition and links to each other with the sub-sheet of each tested non-volatile ROM (read-only memory), the connected mode all connected mode with microprocessor IC1 and non-volatile ROM (read-only memory) master slice IC2 is identical, sees Fig. 1 and Fig. 2.The 1st clock end (CLK1) of three-state buffer J3 ' signal output part and K+1 system counter and shift register A, B and permission/forbid that end (EO) links to each other, this J3 ' signal end and through a phase inverter G4 and multichannel select an analog switch IC6 forbid hold the clock end CLK of (INH) and testing result shift register to link to each other.J1 ' the output terminal of three-state buffer IC3 links to each other with the data input pin DA of shift register A through a phase inverter G3.The output terminal of K+1 system counter IC5 selects the way address of an analog switch IC6 to link to each other respectively with multichannel respectively.The number of determining to depend on the sub-sheet of the non-volatile ROM (read-only memory) of primary measured of the way that the K value of K+1 system counter IC5 and multichannel are selected an analog switch, if any 8 tested sub-sheets, then to select the way of an analog switch be 8 for K value and multichannel, the carry end Q3 of K+1 system counter IC5 and lowest order connect two input ends of two inputs and door G5, should allow/forbid to hold E2 with of the output termination three-state buffer IC3 of door G5.Multichannel selects a plurality of input ends of an analog switch IC6 to link to each other with the VMI-VMK end of a plurality of tested non-volatile ROM (read-only memory) NVROMI-NVROMK respectively, its output terminal X links to each other with the data input pin DB of shift register B, and shift register A and B are 12 bit shift register.Comparer (1) also is 12 bit comparators.12 output terminals of shift register A link to each other with one group of 12 input end of comparer (1) respectively, 12 output terminals of shift register A link to each other with one group of 12 input end of comparer (1) respectively, and 12 output terminals of shift register B link to each other with 12 input ends of another group of comparer (1) respectively.The equal output terminal (A=B) of comparer (1) meets the data input pin DC of testing result shift register C.Each output terminal of testing result shift register C links to each other with the negative pole of light emitting diode through a resistance respectively, and the positive pole of each light emitting diode connects power Vcc.
Detect starting circuit and form an end ground connection of switch S 1 by a delay circuit IC4, phase inverter G1 and G2 and switch S 1.When pressing a switch S 1, phase inverter G1 exports high level, and phase inverter G2 gives negative pulse of clear terminal of K+1 system counter IC5, and this counter is cleared.Simultaneously, give negative pulse of input end A of delay circuit IC4, its output terminal Q output low level at this moment, and make this low level postpone a period of time.This low level and make three-state buffer IC3 be in strobe state with the low level of door G5 output makes and detects beginning.
Signal generator can be used microprocessor M50436-560SP microprocessor, can also adopt other to have and M50436-560SP microprocessor and the microprocessor of the non-volatile ROM (read-only memory) master slice of its peripheral hardware M58655P to connection function end identical function end; Signal generator can adopt the non-volatile ROM (read-only memory) with M58655P, can also adopt to have the non-volatile ROM (read-only memory) identical to the connection function end with the M50436-560SP microprocessor with the non-volatile ROM (read-only memory) master slice of M58655P.
Claims (5)
1, non-volatile ROM (read-only memory) pick-up unit, it is characterized in that: this device comprises, the signal generator of forming by the non-volatile ROM (read-only memory) M58655P master slice of peripheral hardware of the infrared reception microprocessor M50436-560SP of remote-controlled television set and remote control video tape recorder and this microprocessor, detect starting circuit, three-state buffer, K+1 system counter, multichannel is selected an analog switch, shift register A, shift register B, comparer, the sub-blade unit circuit of tested non-volatile ROM (read-only memory), the testing result shift register, power circuit and indication light emitting diode pipe are formed.
2, non-volatile ROM (read-only memory) pick-up unit according to claim 1 is characterized in that: signal generator can also adopt to have and M50436--560SP microprocessor and the microprocessor of the non-volatile ROM (read-only memory) of its peripheral hardware to connection function end identical function end.
3, non-volatile ROM (read-only memory) pick-up unit according to claim 1 is characterized in that: signal generator can also adopt to have and the non-volatile ROM (read-only memory) of M58655P and the M50436-560SP microprocessor non-volatile ROM (read-only memory) to connection function end identical function end.
4, non-volatile ROM (read-only memory) pick-up unit according to claim 1 is characterized in that, shift register A and shift register B are 12 bit shift register.
5, non-volatile ROM (read-only memory) pick-up unit according to claim 1 is characterized in that comparer is 12 bit comparators.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 90224044 CN2084642U (en) | 1990-11-23 | 1990-11-23 | Non-volatile read only memory detecting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 90224044 CN2084642U (en) | 1990-11-23 | 1990-11-23 | Non-volatile read only memory detecting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2084642U true CN2084642U (en) | 1991-09-11 |
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ID=4901695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 90224044 Withdrawn CN2084642U (en) | 1990-11-23 | 1990-11-23 | Non-volatile read only memory detecting device |
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| Country | Link |
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| CN (1) | CN2084642U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100451985C (en) * | 2005-12-30 | 2009-01-14 | 英业达股份有限公司 | RAM module mounting condition detecting method and system |
-
1990
- 1990-11-23 CN CN 90224044 patent/CN2084642U/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100451985C (en) * | 2005-12-30 | 2009-01-14 | 英业达股份有限公司 | RAM module mounting condition detecting method and system |
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| CF01 | Termination of patent right due to non-payment of annual fee |