CN208445534U - The sampling trigger circuit of pwm signal - Google Patents
The sampling trigger circuit of pwm signal Download PDFInfo
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- CN208445534U CN208445534U CN201820838162.6U CN201820838162U CN208445534U CN 208445534 U CN208445534 U CN 208445534U CN 201820838162 U CN201820838162 U CN 201820838162U CN 208445534 U CN208445534 U CN 208445534U
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Abstract
The utility model discloses a kind of sampling trigger circuits of pwm signal, it is used cooperatively with charging pile logic control circuit, the logic control circuit carries out logic judgment to sampling trigger circuit, including sampling processing circuit and trigger circuit, the logic control circuit includes at least three pwm pulse interfaces, PWM1 pulse interface connects the output end of sampling processing circuit, and PWM2 pulse interface and PWM3 pulse interface are separately connected the output end of trigger circuit；The sampling processing circuit is exported by PWM1 pulse interface to logic control circuit for the pwm signal of entrance to be handled and sampled, and by the pwm signal of sampling；It include comparing unit in the trigger circuit, for the pwm signal for receiving pwm signal and the sampling to be compared, trigger signal is entered in logic control circuit by PWM2 pulse interface all the way, and another way trigger signal is entered in logic control circuit by PWM3 pulse interface.The circuit of the utility model is simple, facilitates sampling, at low cost, and accuracy is high, high reliablity.
Description
Technical field
The utility model relates to electric car charge and discharge power technologies, more particularly to a kind of sampling trigger circuit of pwm signal.
Background technique
Currently, as electric car speedup currently on the market rises, charging pile quantity is also continuously increased, if there is discontented
The charging pile of sufficient standard charges to electric car, may result in automobile charging exception, and serious damage automobile causes personnel's wealth
Casualty loss is produced, so needing to carry out detecting whether to meet standard requirements to charging pile.
According to " GB/T18487.1-2015 electric car conduction charging system part 1: General Requirement ", alternating-current charging pile
Charging guidance control with electric car is interacted by detecting the state of two points of CC and CP.CC point is that electric car is defeated
Voltage signal out, CP point are the pwm signal of charging pile output, duty ratio, the frequency, level of the PWM wave that wherein CP point issues
Amplitude, rise/fall time give strict requirements in standard, most of in the market to carry out sampling test with oscillograph, grasp
It is inconvenient to make, and is not easy to later period calculating, and not only Costco Wholesale is expensive, but also inconvenient to carry, and many functions do not need yet
It uses.
Summary of the invention
The utility model is inconvenient to the disadvantage for leading to subsequent applications inconvenience for sampling in the prior art, provides one kind
The sampling trigger circuit of pwm signal.
In order to solve the above-mentioned technical problem, the utility model is addressed by following technical proposals:
The sampling trigger circuit and charging pile logic control circuit of a kind of pwm signal are used cooperatively, the logic control electricity
Road carries out logic judgment to sampling trigger circuit, and sampling trigger circuit includes sampling processing circuit and trigger circuit, the logic
Control circuit includes at least three pwm pulse interfaces, wherein and PWM1 pulse interface connects the output end of sampling processing circuit,
PWM2 pulse interface and PWM3 pulse interface are separately connected the output end of trigger circuit；
The sampling processing circuit, for the pwm signal of entrance to be handled and sampled, and by the pwm signal of sampling
It is exported by PWM1 pulse interface to logic control circuit；
It include comparing unit in the trigger circuit, for receiving PWM2 pulse interface, PWM3 pulse interface respectively
PWM2 signal and PWM3 signal and the pwm signal of the sampling compare, and obtain timer in triggering logic control circuit
Trigger signal.
As an embodiment, the sampling processing circuit follows unit, partial pressure unit, offset single including first
Member, second follow unit and protection clipping unit, and described first follows unit, partial pressure unit, offset units, second to follow unit
It is sequentially connected with protection clipping unit；
Pwm signal follows the input terminal of unit to enter in sampling processing circuit by first, and described second follows unit
Output end connects the PWM1 pulse interface.
As an embodiment, described first follow unit for voltage follower, the model of voltage follower
TL082BCD, the input terminal of the output end connection partial pressure unit of voltage follower.
As an embodiment, the second follower unit is first voltage follower, the type of first voltage follower
It number is TL082BCD, the output end of first voltage follower connects PWM1 pulse interface, in the output end of first voltage follower
It is also connected with protection clipping unit.
As an embodiment, the protection clipping unit is monolithic biswitch diode, model BAV99LT1.
As an embodiment, the trigger circuit further includes that third follows unit, the 4th to follow unit and first
Partial pressure unit, the third follow unit, the 4th that unit and the first partial pressure unit is followed to be sequentially connected, first partial pressure unit
Connect the comparing unit.
As an embodiment, it includes first mould group and second being followed to follow mould group that third, which follows unit, first with
Follow mould group parallel with one another with mould group and second；
First to follow mould group include second voltage follower, first diode and tertiary voltage follower, second voltage with
The positive input of tertiary voltage follower, the output of tertiary voltage follower are reconnected through first diode with the output end of device
End connection comparing unit；
Second follow mould group include the 4th voltage follower, the second diode and the 5th voltage follower, the 4th voltage with
The positive input of the 5th voltage follower, the output of the 5th voltage follower are reconnected through the second diode with the output end of device
End connection comparing unit；
Second voltage follower and the 4th voltage follower distinguish AC earth, if the output end of tertiary voltage follower passes through
Dry resistance connects the output end of the 5th voltage follower.
As an embodiment, the comparing unit includes the first comparing unit and the second comparing unit, and described the
One comparing unit and the second comparing unit are in parallel；
First comparing unit includes first voltage comparator, and pwm signal enters the input terminal of first voltage comparator, and first
The output end of voltage comparator connects PWM2 pulse interface, the model LM311D of first voltage comparator；
Second comparing unit includes second voltage comparator, and pwm signal enters the input terminal of first voltage comparator, and first
The output end of voltage comparator connects PWM3 pulse interface, the model LM311D of first voltage comparator；
Tertiary voltage follower output end connection first voltage comparator negative input end, the 5th voltage follower it is defeated
Outlet connects the negative input end of second voltage comparator, and the negative input end of first voltage comparator is through capacitance connection second voltage ratio
Compared with the negative input end of device.
As an embodiment, the logic control circuit includes single-chip microcontroller, single-chip microcontroller model
STM32F107VCT6。
The utility model is due to using above technical scheme, with significant technical effect:
The circuit of the utility model is simple, and facilitates sampling, at low cost, and accuracy is high, high reliablity.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention without any creative labor, may be used also for those of ordinary skill in the art
To obtain other drawings based on these drawings.
Fig. 1 is the overall structure block diagram of the utility model；
Fig. 2 is the circuit diagram of sampling processing circuit；
Fig. 3 is the circuit diagram of trigger circuit.
Specific embodiment
The utility model is described in further detail below with reference to embodiment, following embodiment is to the utility model
Explanation and the utility model is not limited to following embodiment.
Embodiment 1:
A kind of sampling trigger circuit of pwm signal, as shown in Figure 1, being used cooperatively with charging pile logic control circuit 2, institute
It states logic control circuit 2 and logic judgment is carried out to sampling trigger circuit, sampling trigger circuit includes sampling processing circuit 1 and triggering
Circuit 3, the logic control circuit 2 include at least three pwm pulse interfaces, wherein PWM1 pulse interface connects sampling processing
The output end of circuit 1, PWM2 pulse interface and PWM3 pulse interface are separately connected the output end of trigger circuit 3；At the sampling
Circuit 1 is managed, for the pwm signal of entrance to be handled and is sampled, and the pwm signal of sampling is defeated by PWM1 pulse interface
Out in logic control circuit；It include comparing unit in the trigger circuit 3, for connecing PWM2 pulse interface, PWM3 pulse
Mouth receives PWM2 signal and PWM3 signal respectively and the pwm signal of the sampling compares, and obtains triggering logic control circuit 2
The trigger signal of middle timer.
Referring to attached drawing 2, the sampling processing circuit 1 include first follow unit, partial pressure unit, offset units, second with
With unit and protection clipping unit, described first follows unit, partial pressure unit, offset units, second to follow unit and protection limit
Width unit is sequentially connected；Pwm signal follows the input terminal of unit to enter in sampling processing circuit 1 by first, described second with
The PWM1 pulse interface is connected with the output end of unit, described first follows unit for voltage follower, voltage follower
Model TL082BCD, the input terminal of the output end connection partial pressure unit of voltage follower, the second follower unit is the first electricity
Follower is pressed, the output end connection PWM1 pulse of the model TL082BCD of first voltage follower, first voltage follower connect
Mouthful, it is also connected with protection clipping unit in the output end of first voltage follower, the protection clipping unit is monolithic biswitch two
Pole pipe, model BAV99LT1.The voltage signal that sampling processing circuit 1 is 0~3.3V for the pwm signal conditioning of general ± 12V,
It exporting to logic control circuit 2, logic control circuit 2 calculates level magnitude, more specifically, pwm signal is acquired in CP point,
The voltage follower that pwm signal follows unit i.e. operational amplifier U1B to constitute by first enters sampling processing circuit 1
In, it is then divided by partial pressure unit, that is, resistance R2 and resistance R3, general ± 12V signal becomes ± 3V signal, then passes through electricity
The offset units of resistance R4 and resistance R5 composition are deviated, and general ± 3V signal becomes 0~3.3V signal, finally enters second and follows
The voltage follower output pwm signal that unit, that is, operational amplifier U1A is constituted arrives PWM1, and there are also protect clipping list in this circuit
Member, uses monolithic biswitch diode since then, and model BAV99LT1 finally, completes pwm signal for protecting entire circuit
Sampling processing.
As shown in figure 3, the trigger circuit 3 further includes that third follows unit, the 4th to follow unit and the first partial pressure unit,
The third follows unit, the 4th that unit and the first partial pressure unit is followed to be sequentially connected, described in the first partial pressure unit connection
Comparing unit；Third follows unit to follow mould group and second to follow mould group including first, and first follows mould group and second to follow mould
Group is parallel with one another；First to follow mould group include second voltage follower, first diode and tertiary voltage follower, second voltage
The output end of follower through first diode reconnect tertiary voltage follower positive input, tertiary voltage follower it is defeated
Outlet connects comparing unit；Second follows mould group to include the 4th voltage follower, the second diode and the 5th voltage follower, the
The output end of four voltage followers reconnects the positive input of the 5th voltage follower, the 5th voltage follow through the second diode
The output end of device connects comparing unit；Second voltage follower and the 4th voltage follower distinguish AC earth, tertiary voltage with
The output end of the 5th voltage follower is connected through several resistance with the output end of device.Referring to shown in attached drawing 3, first follow mould group and
If second follows mould group to form for operational amplifier U2B, operational amplifier U2A, operational amplifier U3B, operational amplifier U3A
Dry voltage follower, the circuit that PWM wave signal is made up of operational amplifier U2B, diode D1, capacitor C1 and resistance R11
Positive peak is locked it is constant, here, capacitor C1 and resistance R11 is parallel with one another and is grounded, that is, described AC earth, into
Enter the voltage follower output of operational amplifier U2A composition, AC earth, that is, the logical exchange stopping direct current of capacitor, if capacitor
If larger, capacitive reactance very little, so exchange is just similar to be directly grounded.Because there is resistance, DC channel is simultaneously earth-free,
Thus can only allow alternating current path be grounded and DC channel is earth-free；PWM wave signal passes through operational amplifier U3B, diode D2,
The circuit that capacitor C2 and resistance R12 are constituted locks negative peak constant, and the voltage follower formed into operational amplifier U3A is defeated
Out.
Comparing unit can be passed through after pwm signal output, the comparing unit includes that the first comparing unit and second compares
Unit, first comparing unit and the second comparing unit are in parallel；First comparing unit includes first voltage comparator, PWM letter
Number enter the input terminal of first voltage comparator, the output end of first voltage comparator connects PWM2 pulse interface, first voltage
The model LM311D of comparator；Second comparing unit includes second voltage comparator, and pwm signal enters first voltage comparator
Input terminal, the output end of first voltage comparator connects PWM3 pulse interface, the model LM311D of first voltage comparator；
The negative input end of the output end connection first voltage comparator of tertiary voltage follower, the output end connection of the 5th voltage follower
The negative input end of second voltage comparator, the negative input end of first voltage comparator is through the negative of capacitance connection second voltage comparator
Input terminal.
3 emphasis of trigger circuit shown in Fig. 3 is for calculating pwm signal rise/fall time point trigger signal, when from CP
When the pwm signal of point measurement rises above 10% PWM amplitude, PWM3 signal becomes high level from low level, works as pwm signal
When rising above 90% PWM amplitude, PWM2 signal is flat to become high level from low level, and PWM3 signal and PWM2 signal become
Time difference between high level is the rise time；
When CP signal drops below 90% PWM amplitude, PWM2 signal becomes low level from high level, when under signal
When falling below 10% PWM amplitude, PWM3 signal becomes low level from high level, and PWM2 signal and PWM3 signal become low electricity
Time difference between flat is fall time；Positive negative peak voltage is generated by resistance R3, resistance R14, resistance R15 series connection partial pressure
10% and 90% amplitude voltage respectively enters the negative input end of two comparators of voltage comparator U4 and voltage comparator U5,
CP signal is directly entered voltage comparator U4 and voltage comparator U5 positive input terminal, passes through in pwm signal wave up and down process
Compare 10% and 90% amplitude voltage, causes and generate trigger signal than causing voltage comparator U4 and voltage comparator U5.
The logic control circuit includes single-chip microcontroller, and single-chip microcontroller model STM32F107VCT6 utilizes timing in single-chip microcontroller
Device is realized with ADC function exchanges stake CP voltage, frequency, duty ratio and waveform rise/fall along the detection and calculating of time.
In addition, it should be noted that, the specific embodiments described in this specification, the shape of parts and components are named
Title etc. can be different.All equivalent or simple changes done according to structure, feature and principle described in the concept of the patent of the utility model,
It is included in the protection scope of the utility model patent.Those skilled in the art of the present invention can be to being retouched
The specific embodiment stated does various modifications or additions or is substituted in a similar manner, without departing from the utility model
Structure or beyond the scope defined by this claim, all should belong to the protection range of the utility model.
Claims (9)
1. the sampling trigger circuit and charging pile logic control circuit of a kind of pwm signal are used cooperatively, the logic control circuit
Logic judgment is carried out to sampling trigger circuit, which is characterized in that sampling trigger circuit includes sampling processing circuit and trigger circuit,
The logic control circuit includes at least three pwm pulse interfaces, wherein PWM1 pulse interface connects the defeated of sampling processing circuit
Outlet, PWM2 pulse interface and PWM3 pulse interface are separately connected the output end of trigger circuit；
The sampling processing circuit for the pwm signal of entrance to be handled and sampled, and the pwm signal of sampling is passed through
PWM1 pulse interface is exported to logic control circuit；
It include comparing unit in the trigger circuit, for PWM2 pulse interface, PWM3 pulse interface to be received PWM2 letter respectively
Number and the pwm signal of PWM3 signal and the sampling compare, obtain the triggering letter of timer in triggering logic control circuit
Number.
2. the sampling trigger circuit of pwm signal according to claim 1, which is characterized in that the sampling processing circuit packet
Include first follow unit, partial pressure unit, offset units, second follow unit and protection clipping unit, described first follow unit,
Partial pressure unit, offset units, second follow unit and protection clipping unit to be sequentially connected；
Pwm signal follows the input terminal of unit to enter in sampling processing circuit by first, and described second follows the output of unit
End connects the PWM1 pulse interface.
3. the sampling trigger circuit of pwm signal according to claim 2, which is characterized in that described first follows the unit to be
Voltage follower, the model TL082BCD of voltage follower, the input terminal of the output end connection partial pressure unit of voltage follower.
4. the sampling trigger circuit of pwm signal according to claim 2, which is characterized in that the second follower unit is the
The output end of one voltage follower, the model TL082BCD of first voltage follower, first voltage follower connects PWM1 arteries and veins
Interface is rushed, is also connected with protection clipping unit in the output end of first voltage follower.
5. the sampling trigger circuit of pwm signal according to claim 4, which is characterized in that the protection clipping unit is
Monolithic biswitch diode, model BAV99LT1.
6. the sampling trigger circuit of pwm signal according to claim 1, which is characterized in that the trigger circuit further includes
Third follows unit, the 4th to follow unit and the first partial pressure unit, and the third follows unit, the 4th to follow unit and first point
Pressure unit is sequentially connected, and first partial pressure unit connects the comparing unit.
7. the sampling trigger circuit of pwm signal according to claim 6, which is characterized in that it includes that third, which follows unit,
One follows mould group and second follows mould group, and first follows mould group and second to follow mould group parallel with one another；
First to follow mould group include second voltage follower, first diode and tertiary voltage follower, second voltage follower
Output end the positive input of tertiary voltage follower is reconnected through first diode, the output end of tertiary voltage follower connects
Connect comparing unit；
Second follows mould group to include the 4th voltage follower, the second diode and the 5th voltage follower, the 4th voltage follower
Output end the positive input of the 5th voltage follower is reconnected through the second diode, the output end of the 5th voltage follower connects
Connect comparing unit；
Second voltage follower and the 4th voltage follower distinguish AC earth, and the output end of tertiary voltage follower is through several electricity
The output end of resistance the 5th voltage follower of connection.
8. the sampling trigger circuit of pwm signal according to claim 7, which is characterized in that the comparing unit includes the
One comparing unit and the second comparing unit, first comparing unit and the second comparing unit are in parallel；
First comparing unit includes first voltage comparator, and pwm signal enters the input terminal of first voltage comparator, first voltage
The output end of comparator connects PWM2 pulse interface, the model LM311D of first voltage comparator；
Second comparing unit includes second voltage comparator, and pwm signal enters the input terminal of first voltage comparator, first voltage
The output end of comparator connects PWM3 pulse interface, the model LM311D of first voltage comparator；
The negative input end of the output end connection first voltage comparator of tertiary voltage follower, the output end of the 5th voltage follower
The negative input end of second voltage comparator is connected, the negative input end of first voltage comparator is through capacitance connection second voltage comparator
Negative input end.
9. the sampling trigger circuit of pwm signal according to claim 1, which is characterized in that the logic control circuit packet
Include single-chip microcontroller, single-chip microcontroller model STM32F107VCT6.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820838162.6U CN208445534U (en) | 2018-05-31 | 2018-05-31 | The sampling trigger circuit of pwm signal |
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| CN201820838162.6U CN208445534U (en) | 2018-05-31 | 2018-05-31 | The sampling trigger circuit of pwm signal |
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| CN208445534U true CN208445534U (en) | 2019-01-29 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110789393A (en) * | 2019-10-25 | 2020-02-14 | 恒大智慧充电科技有限公司 | Signal abnormality detection method, charging device, computer device, and storage medium |
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2018
- 2018-05-31 CN CN201820838162.6U patent/CN208445534U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110789393A (en) * | 2019-10-25 | 2020-02-14 | 恒大智慧充电科技有限公司 | Signal abnormality detection method, charging device, computer device, and storage medium |
| CN110789393B (en) * | 2019-10-25 | 2021-01-15 | 恒大智慧充电科技有限公司 | Signal abnormality detection method, charging device, computer device, and storage medium |
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