CN207488440U - Pulse generating circuit and power tube test device - Google Patents
Pulse generating circuit and power tube test device Download PDFInfo
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Abstract
The utility model discloses a kind of pulse generating circuit and power tube test device, the pulse generating circuit includes key control circuit, master controller and power driving circuit, master controller has pulse signal output end mouth and I/O mouthfuls multiple, multiple push button signalling output terminals of multiple I/O mouthfuls and key control circuit connect one to one, the input terminal of pulse signal output end mouth and power driving circuit connects, and the output terminal of power driving circuit and the controlled end of power tube connect；Wherein, key control circuit receives key command input by user, and the corresponding push button signalling of key command is exported, so that master controller is according to the push button signalling received, it exports corresponding pulse signal and carrys out the work of driving power pipe, realize the parameter testing to power tube；The type of pulse signal includes at least single pulse signal, dipulse signal, continuous impulse signal.The utility model, which solves impulse generator, can only fix output dipulse signal, the problem of can not being in due course adjusted according to test case.
Description
Technical Field
The utility model relates to an electronic circuit technical field, in particular to pulse generation circuit and power tube testing arrangement.
Background
The IGBT is used as a high-power semiconductor power switch device, is widely applied to the fields of motor variable frequency speed regulation, high-performance power supplies, industrial electrical automation and the like, and has a wide market. In order to optimize the design of the IGBT device, it is very important how to accurately test each parameter of the IGBT in practical application, wherein the parameter testing method is to control the IGBT by using the pulse output by the pulse generator and then realize each test by using a testing circuit or a testing device and the like.
At present, most of pulse generators for IGBT testing are designed based on a double-pulse testing technology, the generators can only fixedly output double-pulse signals, pulses cannot be timely adjusted according to testing conditions, and functions are limited.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a pulse generation circuit and power tube testing arrangement aims at solving the pulser and can only fix output dipulse signal, can't adjust the pulse in good time according to the test condition, the limited problem of function.
In order to achieve the above object, the present invention provides a pulse generating circuit applied in a power tube testing device, the pulse generating circuit includes a key control circuit, a main controller and a power driving circuit, the main controller has a pulse signal output port and a plurality of I/O ports, the plurality of I/O ports are connected with a plurality of key signal output ports of the key control circuit in a one-to-one correspondence manner, the pulse signal output port is connected with an input terminal of the power driving circuit, and an output terminal of the power driving circuit is connected with a controlled terminal of the power tube; wherein,
the key control circuit is used for receiving a key instruction input by a user and outputting a key signal corresponding to the key instruction to the main controller;
the main controller is used for outputting corresponding pulse signals according to the received key signals, and the types of the pulse signals at least comprise single pulse signals, double pulse signals and continuous pulse signals;
and the power driving circuit is used for amplifying the pulse signal and outputting the amplified pulse signal to the controlled end of the power tube so as to drive the power tube to work and realize parameter testing of the power tube.
Preferably, the key control circuit includes a type setting key branch for setting the type of the pulse signal, an increase key branch for increasing the pulse width and/or the inter-pulse width, a decrease key branch for decreasing the pulse width and/or the inter-pulse width, and a start key branch for triggering the main controller to output the pulse signal, and the output ends of the type setting key branch, the increase key branch, the decrease key branch, and the start key branch are connected to the plurality of I/O ports in a one-to-one correspondence manner.
Preferably, the type setting key branch, the size adjusting key branch and the starting key branch all include a key switch and a pull-up resistor, a first end of each pull-up resistor is connected to a first direct current power supply, and a second end of each pull-up resistor is connected to an output end of the corresponding key switch; the input end of each key switch is grounded.
Preferably, the power driving circuit includes a driving chip, an adjustable resistor, a first capacitor and an output terminal, the input terminal of the driving chip is the input terminal of the power driving circuit, the output terminal of the driving chip is connected to the first terminal of the adjustable resistor, and the power supply terminals of the driving chip are respectively interconnected with the second dc power supply and the first terminal of the first capacitor; the grounding end of the driving chip and the second end of the first capacitor are both grounded; and the common end of the adjustable resistor is connected with the controlled end of the power tube through the output terminal.
Preferably, the pulse generating circuit further comprises a signal isolation circuit for realizing signal isolation between the main controller and the power driving circuit, and the signal isolation circuit is serially connected between the pulse signal output end of the main controller and the input end of the power driving circuit.
Preferably, the signal isolation circuit comprises an optical coupler and a first resistor, an input end of the optical coupler is connected with a pulse signal output end of the main controller, and an output end of the optical coupler is interconnected with an input end of the power driving circuit and a first end of the first resistor; a first power end of the optocoupler is connected with a first direct current power supply; the second power end of the optical coupler is connected with a third direct-current power supply, the first grounding end of the optical coupler is grounded with the main controller, and the second grounding end of the optical coupler is grounded with the driving chip.
Preferably, the pulse generating circuit further comprises an overcurrent protection circuit, a detection end of the overcurrent protection circuit is connected with an output end of the power tube, and an output end of the overcurrent protection circuit is connected with an overcurrent detection port of the main controller;
the overcurrent protection circuit is used for detecting an overcurrent signal of the power tube and outputting an overcurrent detection signal so that the main controller controls the power tube to work according to the overcurrent detection signal.
Preferably, the overcurrent protection circuit includes a comparator and an and gate, a positive phase input terminal of the comparator is used for accessing a reference voltage, a negative phase input terminal of the comparator is a detection terminal of the overcurrent protection circuit, an output terminal of the comparator is connected with a first input terminal of the and gate, a second input terminal of the and gate is connected with a status signal output terminal of the main controller, and an output terminal of the and gate is an output terminal of the overcurrent protection circuit.
Preferably, the pulse generating circuit further comprises a display circuit, and an input end of the display circuit is connected with the main controller; the main controller is also used for controlling the display circuit to work according to the key signal.
The utility model also provides a power tube testing device, which comprises the pulse generating circuit; the pulse generating circuit comprises a key control circuit, a main controller and a power driving circuit, wherein the main controller is provided with a pulse signal output port and a plurality of I/O ports, the I/O ports are connected with a plurality of key signal output ends of the key control circuit in a one-to-one correspondence manner, the pulse signal output port is connected with the input end of the power driving circuit, and the output end of the power driving circuit is connected with the controlled end of a power tube; the key control circuit is used for receiving a key instruction input by a user and outputting a key signal corresponding to the key instruction to the main controller; the main controller is used for outputting corresponding pulse signals according to the received key signals, and the types of the pulse signals at least comprise single pulse signals, double pulse signals and continuous pulse signals; and the power driving circuit is used for amplifying the pulse signal and outputting the amplified pulse signal to the controlled end of the power tube so as to drive the power tube to work and realize parameter testing of the power tube.
The utility model discloses the pulse generating circuit receives the button instruction of user's input through setting up button control circuit, and with the button signal output that the button instruction corresponds to main control unit to make main control unit according to the button signal of receiving, output a pulse signal in single pulse signal, double pulse signal, the continuous pulse signal; and the pulse signal is amplified by a power driving circuit and then output to the controlled end of the power tube so as to drive the power tube to work, thereby realizing the parameter test of the power tube. The utility model provides a pulser can only fix output dipulse signal, can't adjust the pulse in good time according to the test condition, the limited problem of function.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic diagram of a functional module of an embodiment of the pulse generating circuit applied to a power tube testing device according to the present invention;
FIG. 2 is a schematic circuit diagram of an embodiment of a key control circuit in the pulse generating circuit of FIG. 1;
fig. 3 is a schematic circuit diagram of an embodiment of the pulse generating circuit of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 10 | Key control circuit | U1 | Driving chip |
| 11 | Type setting key branch | U2 | Optical coupler |
| 12 | Enlarged key branch | U3 | ComparisonDevice for cleaning the skin |
| 13 | Turn down button branch | U4 | And gate |
| 14 | Start button branch | VCC1 | First direct current power supply |
| 20 | Main controller | VCC2 | Second DC power supply |
| 30 | Power driving circuit | VCC3 | Third DC power supply |
| 40 | Signal isolation circuit | C1 | First capacitor C1 |
| 50 | Overcurrent protection circuit | VR1 | Adjustable resistor |
| TC1 | Output terminal | R1 | A first resistor |
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that, if directional indications (such as upper, lower, left, right, front and rear … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides a pulse generating circuit is applied to in the power tube testing arrangement.
With the wide application of high-power semiconductor switching devices such as IGBTs, field effect transistors, thyristors, etc. in the fields of motor variable-frequency speed regulation, high-performance power supplies, industrial electrical automation, etc., especially, since the IGBTs have the characteristics of high switching speed, reduced on-state voltage, etc., and are used by more and more electrical equipment, how to optimize the design of the IGBT devices becomes an increasingly important research topic. Accurate testing of various parameters such as turn-off leakage current, trigger voltage and the like in practical application of the IGBT power tube is becoming more and more important, and an effective method for testing the parameters is a pulse method. At present, most of pulse generators for testing are designed based on a double-pulse testing technology, the generators can only fixedly output double-pulse signals, pulses cannot be timely adjusted according to testing conditions, and functions are limited.
Referring to fig. 1 to 3, in an embodiment of the present invention, the pulse generating circuit includes a key control circuit 10, a main controller 20 and a power driving circuit 30, the main controller 20 has a pulse signal output port and a plurality of I/O ports, the I/O ports are connected to a plurality of key signal output ports of the key control circuit 10 in a one-to-one correspondence manner, the pulse signal output port is connected to an input terminal of the power driving circuit 30, and an output terminal of the power driving circuit 30 is connected to a controlled terminal of a power transistor; wherein,
the key control circuit 10 is configured to receive a key instruction input by a user, and output a key signal corresponding to the key instruction to the main controller 20;
the main controller 20 is configured to output a corresponding pulse signal according to the received key signal, where the type of the pulse signal at least includes a single pulse signal, a double pulse signal, and a continuous pulse signal;
the power driving circuit 30 is configured to amplify the pulse signal and output the amplified pulse signal to the controlled end of the power tube to drive the power tube to work, so as to implement a parameter test on the power tube.
In this embodiment, the power transistor may be an IGBT, a field effect transistor, a thyristor, or the like, and the present embodiment takes the IGBT as an example for description. The main controller 20 may be an integrated control chip such as a DSP, an FPGA, a single chip, etc. which can output a pulse signal, in this embodiment, a single chip is preferably used, a timer is integrated in the single chip, and a corresponding pulse signal is generated by using a timer interrupt of the timer. It can be understood that the single chip microcomputer is further integrated with a memory, a data processor, and a software program and/or module stored in the memory and executable on the data processor, and the output of the pulse signal is realized by executing or executing the software program and/or module stored in the memory according to the key signal output by the key control circuit 10 and by calling the data stored in the memory.
The key control circuit 10 receives a key command input by a user and converts the key command into a corresponding key signal, so that the main controller 20 outputs a corresponding type of pulse signal according to the key signal. For example, the main controller 20 may generate a corresponding pulse signal according to the detected number of times that the user presses the key in the key control circuit 10 within a certain time, which may be embodied as: when the user is pressed down once, the main controller 20 generates a single pulse signal and outputs the signal, when the user is pressed down twice, the main controller 20 generates a double pulse signal and outputs the signal, and when the user is pressed down three times, the main controller 20 generates a continuous pulse signal and outputs the signal.
Alternatively, the main controller 20 may also detect a duration of pressing a key in the key control circuit 10 by the user to generate a corresponding pulse signal, which may be embodied as: when the key pressing duration of the user is detected to be 1-5s, the main controller 20 generates and outputs a single pulse signal, when the key pressing duration of the user is detected to be 8-10s, the main controller 20 generates and outputs a double pulse signal, and when the key pressing duration of the user is detected to be 12-14s, the main controller 20 generates and outputs a continuous pulse signal. Of course, the present embodiment is not limited to determining the type of the pulse signal by detecting the number of times of pressing the key and the duration of pressing the key, and may be specifically set according to the actual situation and the usage habit, and is not limited herein.
The pulse amplitude of the pulse signal output by the main controller 20 is generally 5V, and the load capacity is very low due to the large internal resistance ratio, and the driving voltage of the IGBT is mostly 10-35V, in order to improve the driving capability of the power tube, the power driving circuit 30 amplifies the pulse signal output by the main controller 20 and outputs the amplified pulse signal to the controlled end of the power tube, i.e., the gate of the IGBT, so as to drive the power tube to work.
The utility model discloses the pulse generating circuit receives the key command of user's input through setting up key control circuit 10, and with the key signal output that the key command corresponds to main control unit 20 to make main control unit 20 according to the key signal of receiving, output a pulse signal in single pulse signal, double pulse signal, the continuous pulse signal; and the pulse signal is amplified by the power driving circuit 30 and then output to the controlled end of the power tube to drive the power tube to work, so as to realize the parameter test of the power tube. The utility model provides a pulser can only fix output dipulse signal, can't adjust the pulse in good time according to the test condition, the limited problem of function.
Referring to fig. 1 to 3, further, the key control circuit 10 includes a type setting key branch 11 for setting the type of the pulse signal, an increasing key branch 12 for increasing the pulse width and/or the inter-pulse width, a decreasing key branch 13 for decreasing the pulse width and/or the inter-pulse width, and a starting key branch 14 for triggering the main controller 20 to output the pulse signal, where output ends of the type setting key branch 11, the increasing key branch 12, the decreasing key branch 13, and the starting key branch 14 are connected to the plurality of I/O ports in a one-to-one correspondence manner.
In this embodiment, the type setting key branch 11 outputs a type key signal corresponding to the set pulse type according to a key instruction input by the user, and after the type setting key branch 11 accesses the key instruction input by the user and correspondingly outputs the key type. The up key branch 12/down key branch 13 increases/decreases the inter-pulse width and/or the pulse width according to a key instruction input by a user under the setting of the type setting key branch 11. Thereafter, the start key branch 14 outputs a start key signal according to a key instruction input by a user to trigger the main controller 20 to output a corresponding pulse signal according to the key signals set by the type setting key branch 11 and the up/down key branch 13.
Referring to fig. 1 to 3, further, each of the type setting key branch 11, the size-adjusting key branch 12, the size-adjusting key branch 13, and the start key branch 14 includes a key switch and a pull-up resistor, a first end of each pull-up resistor is connected to a first direct current VCC1, and a second end of each pull-up resistor is connected to an output end of the corresponding key switch; the input end of each key switch is grounded.
In this embodiment, the key switches are provided with four key branches 11, 12, 13 and 14 corresponding to the types, the number of the four branches is four and is keys K1, K2, K3 and K4, and the number of the corresponding pull-up resistors is also four and is resistors R11, R12, R13 and R14. The pull-up resistor is used for pulling up the level of each I/O port of the main controller 20 when the keys K1, K2, K3 and K4 are not pressed, so that a low-level key signal can be output to each I/O port of the main controller 20 to trigger the main controller 20 to operate when the keys K1, K2, K3 and K4 are pressed.
Specifically, the keys K1, K2, K3, and K4 are respectively defined as a type setting key "SET", an UP key "UP", a DOWN key "DOWN", and a start key "RUN". Setting signal types by pressing a type setting key 'SET', wherein the types of pulse signals at least comprise single pulse, double pulse and continuous pulse, and certainly, in a program module in the main controller 20, default pulse width parameters are SET corresponding to each signal type, and at this time, if a user does not perform a next key operation, the main controller 20 is in a 'signal sending waiting state'; the main controller 20 is kept in a pulse width adjusting state by continuing to SET the key 'SET' through the type, and the pulse width and the width between pulses can be adjusted by adding the key 'UP' or subtracting the key 'DOWN'; after the pulse width is adjusted, the main controller 20 is restored to a state of waiting for sending a signal by pressing a type setting key 'SET'; in the "wait for signal" state, the start key "RUN" is pressed, and the main controller 20 outputs a corresponding pulse signal according to the type, pulse width, inter-pulse width, and the like of the pulse signal set by the above key operation.
Referring to fig. 1 to 3, in a preferred embodiment, the power driving circuit 30 includes a driving chip U1, an adjustable resistor VR1, a first capacitor C1 and an output terminal TC1, an input terminal of the driving chip U1 is an input terminal of the power driving circuit 30, an output terminal of the driving chip U1 is connected to a first terminal of the adjustable resistor VR1, and a power supply terminal of the driving chip U1 is interconnected with a second dc power VCC1 and a first terminal of the first capacitor C1, respectively; the grounding end of the driving chip U1 and the second end of the first capacitor C1 are both grounded; the common terminal of the adjustable resistor VR1 is connected with the controlled terminal of the power tube via the output terminal TC 1.
In this embodiment, the driving chip U1 is configured to amplify the input pulse signal and output the amplified pulse signal to one end of the adjustable resistor VR 1. The adjustable resistor VR1 may be implemented by a sliding type varistor or a rotary type varistor, and this embodiment is preferably implemented by a sliding type varistor, where the other end of the adjustable resistor VR1 is suspended, and the common contact is connected to the gate of the IGBT to be tested, so as to adjust the arrival time of the rising edge of the pulse signal output to the gate of the IGBT, and it can be understood that the larger the resistance value of the adjustable resistor VR1 is, the slower the arrival time of the rising edge of the pulse signal output to the gate of the IGBT is; the smaller the resistance value of the adjustable resistor VR1, the faster the arrival time of the rising edge of the pulse signal output to the IGBT gate.
Referring to fig. 1 to 3, in a preferred embodiment, the pulse generating circuit further includes a signal isolation circuit 40 for signal isolation between the main controller 20 and the power driving circuit 30, and the signal isolation circuit 40 is serially disposed between the pulse signal output terminal of the main controller 20 and the input terminal of the power driving circuit 30.
In this embodiment, the signal isolation circuit 40 enables the main controller 20 to output the pulse signal to the power driving circuit 30 in a single-direction, so as to prevent the interference signal at the power side from entering the main controller 20 through the power driving circuit 30 and affecting the normal operation of the main controller 20.
Further referring to fig. 1 to 3, the signal isolation circuit 40 includes an optocoupler U2 and a first resistor R1, an input terminal of the optocoupler U2 is connected to the pulse signal output terminal of the main controller 20, and an output terminal of the optocoupler U2 is interconnected with an input terminal of the power driving circuit 30 and a first terminal of the first resistor R1; a first power supply end of the optocoupler U2 is connected with a first direct current power supply VCC 1; the second power end of opto-coupler U2 is connected with third direct current power VCC3, the first earthing terminal of opto-coupler U2 with main controller 20 is earthed, the second earthing terminal of opto-coupler U2 with driver chip U1 is earthed.
In this embodiment, the pulse signal output by the main controller 20 is output after signal isolation is performed by the optocoupler U2 by using the unidirectional transmission characteristic of the optocoupler U2, and certainly, in other embodiments, the signal isolation circuit 40 may also be implemented by using other unidirectional conducting elements, which is not limited herein.
Referring to fig. 1 to 3, in a preferred embodiment, the pulse generating circuit further includes an overcurrent protection circuit 50, a detection end of the overcurrent protection circuit 50 is connected to an output end of the power tube, and an output end of the overcurrent protection circuit 50 is connected to an overcurrent detection port of the main controller 20;
the overcurrent protection circuit 50 is configured to detect an overcurrent signal of the power tube and output an overcurrent detection signal, so that the main controller 20 controls the power tube to operate according to the overcurrent detection signal.
In this embodiment, in order to avoid burning the power tube to be tested due to the fact that the power tube is short-circuited or the like, the output current of the power tube is detected by the overcurrent protection circuit 50, and the detected current signal is converted into a voltage signal corresponding to the magnitude of the current signal and then output to the overcurrent detection port of the main controller 20, so that the main controller 20 controls the power tube to operate according to the received overcurrent detection signal.
Further, the over-current protection circuit 50 includes a comparator U3 and an and gate U4, a positive phase input terminal of the comparator U3 is used for accessing a reference voltage Vref, a negative phase input terminal Vc of the comparator U3 is a detection terminal of the over-current protection circuit 50, an output terminal of the comparator U3 is connected to a first input terminal of the and gate U4, a second input terminal of the and gate U4 is connected to a status signal output terminal of the main controller 20, and an output terminal of the and gate U4 is an output terminal of the over-current protection circuit 50.
In this embodiment, the inverting input terminal of the comparator U3 is connected to the emitter of the IGBT through a sampling circuit, the sampling circuit converts the current of the emitter of the IGBT to be tested into a voltage signal, and when the voltage signal is greater than the reference voltage at the non-inverting input terminal of the comparator U3, the output terminal of the comparator U3 outputs a high level to an input terminal of the and gate U4. In the IGBT on state, the level of the status signal output terminal of the main controller 20 is high, and the level of the other input terminal of the and gate U4 is high, so that the and gate U4 outputs a logic 1, which indicates that the logic signal z is high, and the logic signal is fed back to the overcurrent detection port of the main controller 20. When receiving a high logic signal z, a counter integrated in the main controller 20 starts timing, when the time for maintaining a high level of the logic signal z exceeds the set overcurrent protection time, it is determined that the IGBT is in a risk state, and the main controller 20 outputs a corresponding pulse signal to control the turn-off of the IGBT to be tested, so as to implement the IGBT overcurrent protection.
Referring to fig. 1 to 3, based on the above embodiment, the pulse generating circuit further includes a display circuit (not shown), and an input terminal of the display circuit is connected to the main controller 20; the main controller 20 is further configured to control the display circuit to operate according to the key signal.
In this embodiment, the display circuit may be implemented by using display devices such as an LED display screen and an LCD liquid crystal display screen, and the main controller 20 outputs a corresponding display driving signal according to a key signal input by the key controller circuit to drive the display circuit to work, so as to display the current user operating state in real time.
The utility model discloses still provide a power tube testing arrangement, power tube testing arrangement includes as above pulse generation circuit. The detailed structure of the pulse generating circuit can refer to the above embodiments, and is not described herein; it can be understood that, because the utility model discloses used above-mentioned pulse generation circuit among the power tube testing arrangement, consequently, the utility model discloses power tube testing arrangement's embodiment includes all technical scheme of the whole embodiments of above-mentioned pulse generation circuit, and the technical effect who reaches is also identical, no longer gives unnecessary details here.
The above only be the preferred embodiment of the utility model discloses a not consequently restriction the utility model discloses a patent range, all are in the utility model discloses a conceive, utilize the equivalent structure transform of what the content was done in the description and the attached drawing, or direct/indirect application all is included in other relevant technical field the utility model discloses a patent protection within range.
Claims (10)
1. A pulse generating circuit is applied to a power tube testing device and is characterized by comprising a key control circuit, a main controller and a power driving circuit, wherein the main controller is provided with a pulse signal output port and a plurality of I/O ports, the I/O ports are connected with a plurality of key signal output ends of the key control circuit in a one-to-one correspondence manner, the pulse signal output port is connected with the input end of the power driving circuit, and the output end of the power driving circuit is connected with a controlled end of a power tube; wherein,
the key control circuit is used for receiving a key instruction input by a user and outputting a key signal corresponding to the key instruction to the main controller;
the main controller is used for outputting corresponding pulse signals according to the received key signals, and the types of the pulse signals at least comprise single pulse signals, double pulse signals and continuous pulse signals;
and the power driving circuit is used for amplifying the pulse signal and outputting the amplified pulse signal to the controlled end of the power tube so as to drive the power tube to work and realize parameter testing of the power tube.
2. The pulse generating circuit according to claim 1, wherein the key control circuit comprises a type setting key branch for setting a type of the pulse signal, an increasing key branch for increasing a pulse width and/or an inter-pulse width, a decreasing key branch for decreasing the pulse width and/or the inter-pulse width, and a starting key branch for triggering the main controller to output the pulse signal, wherein output ends of the type setting key branch, the increasing key branch, the decreasing key branch, and the starting key branch are connected to the plurality of I/O ports in a one-to-one correspondence manner.
3. The pulse generating circuit according to claim 2, wherein the type-setting key branch, the up-key branch, the down-key branch and the start-up key branch each include a key switch and a pull-up resistor, a first end of each pull-up resistor is connected to a first dc power supply, and a second end of each pull-up resistor is connected to an output end of the corresponding key switch; the input end of each key switch is grounded.
4. The pulse generating circuit according to claim 1, wherein the power driving circuit comprises a driving chip, an adjustable resistor, a first capacitor and an output terminal, the input terminal of the driving chip is the input terminal of the power driving circuit, the output terminal of the driving chip is connected with the first terminal of the adjustable resistor, and the power supply terminals of the driving chip are respectively interconnected with a second direct current power supply and the first terminal of the first capacitor; the grounding end of the driving chip and the second end of the first capacitor are both grounded; and the common end of the adjustable resistor is connected with the controlled end of the power tube through the output terminal.
5. The pulse generating circuit of claim 4, further comprising a signal isolation circuit for signal isolation of the main controller from the power driver circuit, the signal isolation circuit being disposed in series between a pulse signal output of the main controller and an input of the power driver circuit.
6. The pulse generating circuit according to claim 5, wherein the signal isolation circuit comprises an optical coupler and a first resistor, an input end of the optical coupler is connected with a pulse signal output end of the main controller, and an output end of the optical coupler is interconnected with an input end of the power driving circuit and a first end of the first resistor; a first power end of the optocoupler is connected with a first direct current power supply; the second power end of the optical coupler is connected with a third direct-current power supply, the first grounding end of the optical coupler is grounded with the main controller, and the second grounding end of the optical coupler is grounded with the driving chip.
7. The pulse generating circuit according to claim 1, further comprising an overcurrent protection circuit, wherein a detection end of the overcurrent protection circuit is connected with the output end of the power tube, and an output end of the overcurrent protection circuit is connected with an overcurrent detection port of the main controller;
the overcurrent protection circuit is used for detecting an overcurrent signal of the power tube and outputting an overcurrent detection signal so that the main controller controls the power tube to work according to the overcurrent detection signal.
8. The pulse generating circuit according to claim 7, wherein the over-current protection circuit comprises a comparator and an and gate, a positive input terminal of the comparator is used for connecting a reference voltage, a negative input terminal of the comparator is a detection terminal of the over-current protection circuit, an output terminal of the comparator is connected with a first input terminal of the and gate, a second input terminal of the and gate is connected with the status signal output terminal of the main controller, and an output terminal of the and gate is an output terminal of the over-current protection circuit.
9. The pulse generating circuit according to any one of claims 1 to 8, further comprising a display circuit, an input terminal of the display circuit being connected to the main controller; the main controller is also used for controlling the display circuit to work according to the key signal.
10. A power tube testing apparatus comprising a pulse generating circuit according to any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721667299.1U CN207488440U (en) | 2017-12-04 | 2017-12-04 | Pulse generating circuit and power tube test device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201721667299.1U CN207488440U (en) | 2017-12-04 | 2017-12-04 | Pulse generating circuit and power tube test device |
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| CN207488440U true CN207488440U (en) | 2018-06-12 |
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| CN201721667299.1U Expired - Fee Related CN207488440U (en) | 2017-12-04 | 2017-12-04 | Pulse generating circuit and power tube test device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108776313A (en) * | 2018-06-15 | 2018-11-09 | 广东美的制冷设备有限公司 | Dynamic characteristic test circuit and IPM test devices |
| CN109839581A (en) * | 2019-03-21 | 2019-06-04 | 王举贵 | A kind of semiconductor device testing apparatus and system |
| CN111426927A (en) * | 2018-12-24 | 2020-07-17 | 东南大学 | Dynamic electrical stress applying device and testing method for power semiconductor device |
-
2017
- 2017-12-04 CN CN201721667299.1U patent/CN207488440U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108776313A (en) * | 2018-06-15 | 2018-11-09 | 广东美的制冷设备有限公司 | Dynamic characteristic test circuit and IPM test devices |
| CN111426927A (en) * | 2018-12-24 | 2020-07-17 | 东南大学 | Dynamic electrical stress applying device and testing method for power semiconductor device |
| CN111426927B (en) * | 2018-12-24 | 2022-06-21 | 东南大学 | Dynamic electrical stress applying device and testing method for power semiconductor device |
| CN109839581A (en) * | 2019-03-21 | 2019-06-04 | 王举贵 | A kind of semiconductor device testing apparatus and system |
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Granted publication date: 20180612 |