CN109839581A - A kind of semiconductor device testing apparatus and system - Google Patents

A kind of semiconductor device testing apparatus and system Download PDF

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Publication number
CN109839581A
CN109839581A CN201910218627.7A CN201910218627A CN109839581A CN 109839581 A CN109839581 A CN 109839581A CN 201910218627 A CN201910218627 A CN 201910218627A CN 109839581 A CN109839581 A CN 109839581A
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China
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connect
semiconductor device
resistance
testing apparatus
resistor
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CN201910218627.7A
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Inventor
王举贵
林敏之
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王举贵
林敏之
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Priority to CN201910218627.7A priority Critical patent/CN109839581A/en
Publication of CN109839581A publication Critical patent/CN109839581A/en
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Abstract

The embodiment of the invention discloses a kind of semiconductor device testing apparatus and systems.The semiconductor device testing apparatus includes dipulse synthesis unit, driving unit, first resistor and second resistance;The first end of dipulse synthesis unit is connect with signal generator, and the second end of dipulse synthesis unit and the first end of driving unit connect;The second end of driving unit is connect with the grid of tested semiconductor devices;The first end of first resistor is connect with the first power supply, and the second end of first resistor is connect with the drain electrode of tested semiconductor devices;The first end of second resistance is connect with the source electrode of tested semiconductor devices;The second end of second resistance is grounded;The grid of the second end of first resistor, the first end of the second resistance and tested semiconductor devices is connect with oscillograph respectively.Semiconductor device testing apparatus provided in an embodiment of the present invention may be implemented to reduce volume, reduce cost, reduces interference and improves the effect of measuring accuracy.

Description

A kind of semiconductor device testing apparatus and system
Technical field
The present embodiments relate to technical field of semiconductors more particularly to a kind of semiconductor device testing apparatus and systems.
Background technique
Semiconductor devices is almost used for all electronics manufacturings, for example, laptop, display, mobile phone etc..Due to Demand of the user to electronic product is continuously improved, and the requirement of performance of semiconductor device is also higher and higher.
Currently, the test device of semiconductor devices dynamic property is the test machine of one big three-door refrigerator size, all portions Part all solidstate is in test device.
However, the test device volume of performance of semiconductor device is big in the prior art, expensive, customizable degree It is low, and the signal between each component can generate mutual interference, reduce measuring accuracy.
Summary of the invention
The present invention provides a kind of semiconductor device testing apparatus and system, to realize reduction volume, reduces cost, reduces dry Disturb and improve the effect of measuring accuracy.
In a first aspect, the embodiment of the invention provides a kind of semiconductor device testing apparatus, semiconducter device testing dress Set includes: dipulse synthesis unit, driving unit, first resistor and second resistance;
The first end of the dipulse synthesis unit is connect with signal generator, the second end of the dipulse synthesis unit It is connect with the first end of the driving unit;
The second end of the driving unit is connect with the grid of tested semiconductor devices;
The first end of the first resistor is connect with the first power supply, and the second end of the first resistor is partly led with described be tested The drain electrode of body device connects;
The first end of the second resistance is connect with the source electrode of the tested semiconductor devices;
The second end of the second resistance is grounded;
The grid of the second end of the first resistor, the first end of the second resistance and the tested semiconductor devices It is connect respectively with oscillograph.
Further, the semiconductor device testing apparatus further include: isolating chip;
The second end of the dipulse synthesis unit is connect by the isolating chip with the first end of the driving unit.
Further, semiconductor device testing apparatus further include: capacitor;
The first end of the capacitor is connect with the first end of the first resistor, the second end of the capacitor and described second The second end of resistance connects.
Further, the capacitor includes noninductive storage capacitor.
Further, semiconductor device testing apparatus further include: grid resistance;
The second end of the driving unit is connect by the grid resistance with the grid of the tested semiconductor devices.
Further, semiconductor device testing apparatus further include: circuit board;
The capacitor is located at the first surface of the circuit board, the dipulse synthesis unit, the first resistor, described Second resistance and the driving unit are located at the second surface of the circuit board;
The first surface is oppositely arranged with the second surface.
Further, semiconductor device testing apparatus further include: the first power supply, second source, oscillograph and signal hair Raw device;
The first end of first power supply is connect with the first end of the first resistor, the second end of first power supply with The second end of the second resistance connects;
The second source is connect with the driving unit;
The oscillograph respectively with the second end of the first resistor, the first end of the second resistance and described tested The grid of semiconductor devices connects.
Further, first power supply and the second source include voltage adjustable source.
Second aspect, the embodiment of the invention also provides a kind of semiconductor device test system, the semiconducter device testings System includes semiconductor device testing apparatus described in first aspect.
Further, semiconductor device test system further include: control unit and LAN switch;
Described control unit is connect by the LAN switch with the semiconductor device testing apparatus;Alternatively,
Further include: control unit and pci bus;
Described control unit is connect by the pci bus with the semiconductor device testing apparatus.
Semiconductor device testing apparatus provided in an embodiment of the present invention includes: dipulse synthesis unit, driving unit, first Resistance and second resistance;The first end of dipulse synthesis unit is connect with signal generator, the second end of dipulse synthesis unit It is connect with the first end of driving unit;The second end of driving unit is connect with the grid of tested semiconductor devices;First resistor First end is connect with the first power supply, and the second end of first resistor is connect with the drain electrode of tested semiconductor devices;The of second resistance One end is connect with the source electrode of tested semiconductor devices;The second end of second resistance is grounded;Second end, the second resistance of first resistor First end and the grid of tested semiconductor devices connect respectively with oscillograph, signal is occurred by dipulse synthesis unit The two-way single pulse signal that device generates is converted to dipulse signal all the way, and then driving unit amplifies dipulse signal Afterwards, it is input to the grid of tested semiconductor devices, when the voltage of grid is increased to threshold voltage value, the tested semiconductor devices of realization Conducting realize the disconnected of tested semiconductor devices when the voltage of grid is from when being higher than threshold voltage and being reduced to lower than threshold voltage It opens, by the voltage value of the grid of test first resistor second end, second resistance first end and tested semiconductor devices, realizes The performance test of semiconductor devices, the test device volume for solving performance of semiconductor device in the prior art is big, expensive, can The problem of customization degree is low, and the signal between each component can generate mutual interference, reduces measuring accuracy, realizes and reduces body Product reduces cost, reduces interference and improves the effect of measuring accuracy.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of semiconductor device testing apparatus provided in an embodiment of the present invention;
Fig. 2 is a kind of structural schematic diagram of semiconductor device test system provided in an embodiment of the present invention;
Fig. 3 is the structural schematic diagram of another semiconductor device test system provided in an embodiment of the present invention.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.
Fig. 1 is a kind of structural schematic diagram of semiconductor device testing apparatus provided in an embodiment of the present invention, as shown in Figure 1, Semiconductor device testing apparatus provided in an embodiment of the present invention includes: dipulse synthesis unit 10, driving unit 11, first resistor 12 and second resistance 13;The first end of dipulse synthesis unit 10 is connect with signal generator 21, dipulse synthesis unit 10 Second end is connect with the first end of driving unit 11;The grid of the second end of driving unit 11 and tested semiconductor devices 30 connects It connects;The first end of first resistor 12 is connect with the first power supply 18, the second end of first resistor 12 and tested semiconductor devices 30 Drain electrode connection;The first end of second resistance 13 is connect with the source electrode of tested semiconductor devices 30;Second termination of second resistance 13 Ground;The grid of the second end of first resistor 12, the first end of second resistance 13 and tested semiconductor devices 30 respectively with oscillography Device 20 connects.
Wherein, two-way single pulse signal can be synthesized two pulse signals all the way by dipulse synthesis unit 10.Driving Unit 11 for example may include high-speed driving chip, the arteries and veins double all the way for synthesizing dipulse synthesis unit by high-speed driving chip Rush signal from rising edge and failing edge be nanosecond rank to become rising edge and failing edge be picosecond rank, improve the resolution of test Rate.By oscillograph 20 respectively with the second end of first resistor 12, the first end of second resistance 13 and tested semiconductor devices 30 grid connection, so that its second end, the first end of second resistance 13 and tested semiconductor device for monitoring first resistor 12 The situation of change of the grid voltage of part 30 and corresponding time.Remembered by the voltage change of the first end of second resistance 13 Record the variation of the electric current between tested 30 Drain-Source of semiconductor devices.Pass through the voltage change of the second end of first resistor 12 To record the variation of the voltage between tested 30 Drain-Source of semiconductor devices.
Specifically, the first end of dipulse synthesis unit 10 is connect with signal generator 21, is received signal generator 21 and is sent out Two-way single pulse signal out, and two-way single pulse signal is synthesized into dipulse signal all the way, it is double that driving unit 11 receives this After pulse signal, dipulse signal is amplified into processing, while making dipulse signal by rising edge and failing edge nanosecond Do not become rising edge and failing edge is picosecond rank, i.e., when the rising edge of dipulse signal arrives, to tested semiconductor devices 30 one strong driving capability of grid, so that the voltage rapid increase of the grid of tested semiconductor devices 30, relatively strong there are one Gate capacitance charges from electric current to tested semiconductor devices 30, when the voltage of grid rises to threshold voltage by zero, be tested The grid of semiconductor devices 30 is opened.After the grid of tested semiconductor devices 30 is opened, it is tested the drain electrode-of semiconductor devices 30 By liter above freezing, dram-source voltage is reduced electric current between source electrode by shutdown voltage, when the drain electrode-of tested semiconductor devices 30 When electric current between source electrode is increased to open electric current, such as dram-source voltage value (the at this time can be recorded by oscillograph 20 The voltage value of the second end of one resistance 12) and when the electric current between the Drain-Source of tested semiconductor devices 30 be increased to it is open-minded The time of electric current, the service time of as tested semiconductor devices 30;When the voltage of dipulse signal drops to 0V, grid is driven Moving cell 11 turns off, the decline of the voltage of the grid of measured device, when being decreased below threshold voltage, at this time Drain-Source it Between electric current start to reduce, voltage between Drain-Source rises, hereafter, be tested the voltage of the grid of semiconductor devices 30 after It is continuous to reduce, when the electric current between Drain-Source becomes zero, the time of this section is recorded, as tested semiconductor devices 30 Turn-off time.
Semiconductor device testing apparatus provided in an embodiment of the present invention includes: dipulse synthesis unit, driving unit, first Resistance and second resistance;The first end of dipulse synthesis unit is connect with signal generator, the second end of dipulse synthesis unit It is connect with the first end of driving unit;The second end of driving unit is connect with the grid of tested semiconductor devices;First resistor First end is connect with the first power supply, and the second end of first resistor is connect with the drain electrode of tested semiconductor devices;The of second resistance One end is connect with the source electrode of tested semiconductor devices;The second end of second resistance is grounded;Second end, the second resistance of first resistor First end and the grid of tested semiconductor devices connect respectively with oscillograph, signal is occurred by dipulse synthesis unit The two-way single pulse signal that device generates is converted to dipulse signal all the way, and then driving unit amplifies dipulse signal Afterwards, it is input to the grid of tested semiconductor devices, the voltage of grid rises from zero toward operating voltage, when the grid for surveying semiconductor devices When the voltage of pole is more than threshold voltage value, the conducting of tested semiconductor devices is realized;The voltage of the grid of tested semiconductor devices Tested semiconductor is realized when the voltage of the grid of tested semiconductor devices is less than threshold voltage from operating voltage toward zero-down The disconnection of device passes through the electricity of the grid of test first resistor second end, second resistance first end and tested semiconductor devices Pressure value realizes the performance test of semiconductor devices, and the test device volume for solving performance of semiconductor device in the prior art is big, valence The problem of lattice are expensive, and customizable degree is low, and the signal between each component can generate mutual interference, reduce measuring accuracy, It realizes and reduces volume, reduce cost, reduce interference and improve the effect of measuring accuracy.
Based on the above technical solution, optionally, with continued reference to Fig. 1, semiconductor device testing apparatus further include: every Off-chip piece 14;The second end of dipulse synthesis unit 10 is connect by isolating chip 14 with the first end of driving unit 11.
Wherein, isolating chip 14 for example may include high-speed isolated chip, and isolating chip 14 for example can be isolation telecommunications Number, but can be with propagating optical signal or the isolating chip of magnetic signal.Specifically, if tested semiconductor devices 30 is damaged, by High voltage or big electric energy are isolated by isolating chip 14 for the high voltage caused by damaging or big electric energy, make high voltage Or big electric energy will not be communicated back to signal generator 21, play the role of protecting signal generator 21.But isolating chip Dipulse signal can be transferred to driving unit again by 14, the reason is that isolating chip 14 is first by dipulse signal by inter-process Light or magnetic signal are converted to, light or magnetic signal are by the way that after isolating chip 14, isolating chip 14 is again converted to light or magnetic signal double Pulse signal in this way, not only dipulse signal can be made to pass through, but also can protect signal generator 21.In addition to this, pass through high speed Isolating chip guarantees the complete propagation for the dipulse signal that reduction high speed dipulse synthesis unit 10 synthesizes, otherwise dipulse signal It will be distorted, influence test effect.
Based on the above technical solution, optionally, with continued reference to Fig. 1, semiconductor device testing apparatus further include: electricity Hold 15;The first end of capacitor 15 is connect with the first end of first resistor 12, the second end of capacitor 15 and the second of second resistance 13 End connection.
Wherein it is possible to be that the charging of capacitor 15 passes through electricity when needing tested semiconductor devices 30 to be tested by power supply Hold 15 to be powered to tested semiconductor devices 30.If power supply is powered directly to tested semiconductor devices 30, because electric Source, which is lasting, is that tested semiconductor devices 30 is powered, thus when user due to accidentally touching is by electricity when, be lasting electric, and If capacitor 15 is used to be powered for tested semiconductor devices 30 because capacitor 15 be quickly discharge, if user by It can be comparatively safe when accidentally touching is by electricity.
Based on the above technical solution, optionally, capacitor 15 includes noninductive storage capacitor.
It will be understood by those skilled in the art that capacitor 15 includes but is not limited to noninductive storage capacitor, those skilled in the art The type that capacitor 15 can be voluntarily chosen according to needed for product, in the present invention without concrete restriction.
Based on the above technical solution, optionally, with continued reference to Fig. 1, semiconductor device testing apparatus further include: grid Electrode resistance 16;The second end of driving unit 11 is connect by grid resistance 16 with the grid of tested semiconductor devices 30.
Wherein, grid resistance 16 can be matched according to the type of tested semiconductor devices 30, i.e. grid resistance 16 Resistance value depends on the input capacitance of tested semiconductor devices 30, grid of the grid resistance 16 to alleviate tested semiconductor devices 30 The oscillation of pole.
Based on the above technical solution, optionally, semiconductor device testing apparatus further include: circuit board is (in figure not It shows);Capacitor 15 is located at the first surface of circuit board, dipulse synthesis unit 10, first resistor 12, second resistance 13 and drive Moving cell 11 is located at the second surface of circuit board;First surface is oppositely arranged with second surface.
Wherein, capacitor 15 and tested semiconductor devices 30 are respectively arranged to the upper and lower surface of circuit board, pass through circuit The arrangement of each original part and circuit on plate, so that the outflow sense of current and tested semiconductor devices 30 when capacitor 15 discharges are connected When current direction on the contrary, capacitor 15 and tested semiconductor devices 30 are respectively arranged at the upper and lower surface of circuit board, by 15 discharge current of capacitor generate magnetic direction and tested 30 conducting electric current of semiconductor devices generate magnetic direction on the contrary, so Magnetic field at tested semiconductor devices 30 is cancelled out each other with the magnetic field inside capacitor 15, so that the magnetic flux in entire space is approximately 0, that is, the magnetic effect of electric current is significantly reduced, to reduce shadow of the magnetic effect to tested semiconductor devices 30 and circuit of electric current It rings, improves measuring accuracy.
Based on the above technical solution, optionally, with continued reference to Fig. 1, semiconductor device testing apparatus further include: the One power supply 18, second source 19, oscillograph 20 and signal generator 21;The first end of first power supply 18 and first resistor 12 First end connection, the second end of the first power supply 12 are connect with the second end of second resistance 13;Second source 19 and driving unit 11 Connection;Oscillograph 20 respectively with the second end of first resistor 12, the first end of second resistance 13 and dipulse synthesis unit 10 Second end connection.
Based on the above technical solution, optionally, the first power supply 18 and second source 19 include the adjustable economize on electricity of voltage Source.
The semiconductor device testing apparatus of the embodiment of the present invention for example can be used for testing Wide Bandgap Semiconductor Power Devices, silicon Base high-speed power device etc..
Based on same inventive concept, the embodiment of the invention also provides a kind of semiconductor device test system, Fig. 2 is this The structural schematic diagram for a kind of semiconductor device test system that inventive embodiments provide, as shown in Fig. 2, the semiconducter device testing System 1000 includes semiconductor device testing apparatus 100 as described above.
Semiconductor device testing apparatus in semiconductor device test system provided in an embodiment of the present invention, passes through dipulse The two-way single pulse signal that signal generator generates is converted to dipulse signal all the way by synthesis unit, and then driving unit will be double After pulse signal amplifies, it is input to the grid of tested semiconductor devices, it is real when the voltage of grid is increased to threshold voltage value It is now tested the conducting of semiconductor devices, when the voltage of the grid of tested semiconductor devices is reduced to from threshold voltage is higher than lower than threshold When threshold voltage, realize the disconnection of tested semiconductor devices, by test first resistor second end, second resistance first end and by The voltage value for surveying the grid of semiconductor devices realizes the performance test of semiconductor devices, solves semiconductor devices in the prior art The test device volume of performance is big, expensive, and customizable degree is low, and the signal between each component can generate mutual do The problem of disturbing, reducing measuring accuracy is realized and reduces volume, and cost is reduced, and reduces interference and improves the effect of measuring accuracy.
Based on the above technical solution, optionally, continue to participate in Fig. 2, semiconductor device test system 1000 also wraps It includes: control unit 200 and LAN switch 300;Control unit 200 is surveyed by LAN switch 300 and semiconductor devices 100 connections are set in trial assembly;Or, further includes: control unit 200 and pci bus 310;Control unit 200 by pci bus 310 with Semiconductor device testing apparatus 100 connects (referring to Fig. 3).
Wherein, control unit 200 is such as may include computer, mobile phone.Control unit 200 passes through LAN switch 300 or pci bus 310 realize control to semiconductor device testing apparatus 100.Illustratively, control unit 200 can root The pulsewidth of different pulses is issued according to different 30 control signal generators 21 of tested semiconductor devices, controls the electricity of the first power supply Pressure value and the voltage value for controlling second source.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation, It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above embodiments to the present invention It is described in further detail, but the present invention is not limited to the above embodiments only, without departing from the inventive concept, also It may include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.

Claims (10)

1. a kind of semiconductor device testing apparatus characterized by comprising dipulse synthesis unit, driving unit, first resistor And second resistance;
The first end of the dipulse synthesis unit is connect with signal generator, the second end of the dipulse synthesis unit and institute State the first end connection of driving unit;
The second end of the driving unit is connect with the grid of tested semiconductor devices;
The first end of the first resistor is connect with the first power supply, the second end of the first resistor and the tested semiconductor device The drain electrode of part connects;
The first end of the second resistance is connect with the source electrode of the tested semiconductor devices;
The second end of the second resistance is grounded;
The grid of the second end of the first resistor, the first end of the second resistance and the tested semiconductor devices is distinguished It is connect with oscillograph.
2. semiconductor device testing apparatus according to claim 1, which is characterized in that further include: isolating chip;
The second end of the dipulse synthesis unit is connect by the isolating chip with the first end of the driving unit.
3. semiconductor device testing apparatus according to claim 1, which is characterized in that further include: capacitor;
The first end of the capacitor is connect with the first end of the first resistor, the second end of the capacitor and the second resistance Second end connection.
4. semiconductor device testing apparatus according to claim 3, which is characterized in that the capacitor includes noninductive energy storage electricity Hold.
5. semiconductor device testing apparatus according to claim 1, which is characterized in that further include: grid resistance;
The second end of the driving unit is connect by the grid resistance with the grid of the tested semiconductor devices.
6. semiconductor device testing apparatus according to claim 3, which is characterized in that further include: circuit board;
The capacitor is located at the first surface of the circuit board, the dipulse synthesis unit, the first resistor, described second Resistance and the driving unit are located at the second surface of the circuit board;
The first surface is oppositely arranged with the second surface.
7. semiconductor device testing apparatus according to claim 1, which is characterized in that further include: the first power supply, the second electricity Source, oscillograph and signal generator;
The first end of first power supply is connect with the first end of the first resistor, the second end of first power supply with it is described The second end of second resistance connects;
The second source is connect with the driving unit;
The oscillograph is partly led with the second end of the first resistor, the first end of the second resistance and described be tested respectively The grid of body device connects.
8. semiconductor device testing apparatus according to claim 7, which is characterized in that first power supply and described second Power supply includes voltage adjustable source.
9. a kind of semiconductor device test system, which is characterized in that including the described in any item semiconductor devices of claim 1-8 Test device.
10. semiconductor device test system according to claim 9, which is characterized in that further include: control unit and local Network switch;
Described control unit is connect by the LAN switch with the semiconductor device testing apparatus;Alternatively,
Further include: control unit and pci bus;
Described control unit is connect by pci bus with the semiconductor device testing apparatus.
CN201910218627.7A 2019-03-21 2019-03-21 A kind of semiconductor device testing apparatus and system Pending CN109839581A (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104267271A (en) * 2014-08-27 2015-01-07 华北电力大学 Circuit and method for quickly obtaining dynamic parameters of power electronic device
CN106680686A (en) * 2016-12-29 2017-05-17 浙江大学 Method of improving picosecond-level superfast electrical property testing accuracy of semiconductor device
CN106936297A (en) * 2017-05-16 2017-07-07 重庆大学 A kind of Automatic adjusument drives the SiC MOSFET drive circuits of resistance
CN107102211A (en) * 2016-12-31 2017-08-29 徐州中矿大传动与自动化有限公司 IGBT module internal stray inductance measurement device and measuring method
CN207488440U (en) * 2017-12-04 2018-06-12 广东美的制冷设备有限公司 Pulse generating circuit and power tube test device
CN208506175U (en) * 2018-08-07 2019-02-15 深圳市英威腾电气股份有限公司 A kind of short-circuit test device and short-circuit test circuit
CN109450418A (en) * 2018-11-12 2019-03-08 成都法姆科技有限公司 A kind of the IGBT isolated drive circuit and its control method of belt switch control unit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104267271A (en) * 2014-08-27 2015-01-07 华北电力大学 Circuit and method for quickly obtaining dynamic parameters of power electronic device
CN106680686A (en) * 2016-12-29 2017-05-17 浙江大学 Method of improving picosecond-level superfast electrical property testing accuracy of semiconductor device
CN107102211A (en) * 2016-12-31 2017-08-29 徐州中矿大传动与自动化有限公司 IGBT module internal stray inductance measurement device and measuring method
CN106936297A (en) * 2017-05-16 2017-07-07 重庆大学 A kind of Automatic adjusument drives the SiC MOSFET drive circuits of resistance
CN207488440U (en) * 2017-12-04 2018-06-12 广东美的制冷设备有限公司 Pulse generating circuit and power tube test device
CN208506175U (en) * 2018-08-07 2019-02-15 深圳市英威腾电气股份有限公司 A kind of short-circuit test device and short-circuit test circuit
CN109450418A (en) * 2018-11-12 2019-03-08 成都法姆科技有限公司 A kind of the IGBT isolated drive circuit and its control method of belt switch control unit

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