CN208190515U - A kind of charge pump - Google Patents
A kind of charge pump Download PDFInfo
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- CN208190515U CN208190515U CN201820668028.6U CN201820668028U CN208190515U CN 208190515 U CN208190515 U CN 208190515U CN 201820668028 U CN201820668028 U CN 201820668028U CN 208190515 U CN208190515 U CN 208190515U
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- 239000004065 semiconductor Substances 0.000 claims abstract description 247
- 239000003990 capacitor Substances 0.000 claims description 64
- 239000000758 substrate Substances 0.000 claims description 6
- 230000005611 electricity Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
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Abstract
The utility model discloses a kind of charge pumps, including radio-frequency voltage input terminal, metal-oxide-semiconductor booster circuit, inverter circuit, charging circuit and High Level DC Voltage output end；The input terminal of the metal-oxide-semiconductor booster circuit is connect with the radio-frequency voltage input terminal, the output end of the metal-oxide-semiconductor booster circuit is connect with the High Level DC Voltage output end, the control terminal of the metal-oxide-semiconductor booster circuit is connect with the output end of the inverter circuit, the input terminal of the inverter circuit is connect with the output end of the charging circuit, and the input terminal of the charging circuit is connect with the radio-frequency voltage input terminal.Using the utility model embodiment, the boosting efficiency of charge pump, start quickly speed can be improved.
Description
Technical field
The utility model relates to charge pumping technique field more particularly to a kind of charge pumps.
Background technique
Passive RFID tags convert DC voltage for radio-frequency voltage using charge pump, and are increased to the normal work of label chip
Voltage amplitude required for making.When RFID chip works at a distance, input power is very low, on the one hand needs using various design sides
The AFE(analog front end) and digital baseband power consumption of method reduction chip；On the other hand need to optimize the energy conversion circuit of chip, to obtain to the greatest extent
Energy more than possible.Charge pump obtains the exclusive source of work capacity as chip, and efficiency is even more to directly affect late-class circuit
It can be obtained the Key Performance Indicators such as the identification distance of energy size and chip.
Charge pump in the prior art generally uses four diodes and four capacitors to turn the radio-frequency voltage RF_IN of input
Its height of Amplitude Ration is turned to close to four times of DC voltage Vref_out, specific conversion formula is Vref_out=4 (Vrf-
Von), wherein Vrf is the amplitude of radio-frequency voltage RF_IN, and Von is the conducting voltage of a diode.And the electric conduction of diode
It presses Von larger, can greatly reduce the voltage Vref_out of output, and consume power, reduce charge pump charge efficiency.
Utility model content
The utility model embodiment proposes a kind of charge pump, can be improved the boosting efficiency of charge pump, start quickly speed.
The utility model embodiment provides a kind of charge pump, including radio-frequency voltage input terminal, metal-oxide-semiconductor booster circuit, reverse phase
Device circuit, charging circuit and High Level DC Voltage output end；
The input terminal of the metal-oxide-semiconductor booster circuit is connect with the radio-frequency voltage input terminal, the metal-oxide-semiconductor booster circuit
Output end is connect with the High Level DC Voltage output end, control terminal and the inverter circuit of the metal-oxide-semiconductor booster circuit
Output end connection, the input terminal of the inverter circuit connect with the output end of the charging circuit, the charging circuit it is defeated
Enter end to connect with the radio-frequency voltage input terminal.
Further, the metal-oxide-semiconductor booster circuit includes the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the 4th MOS
Pipe, first capacitor, the second capacitor and third capacitor；
The source electrode of first metal-oxide-semiconductor is grounded, and the drain electrode of first metal-oxide-semiconductor passes through the first capacitor and the radio frequency
Voltage input end connection, the grid of first metal-oxide-semiconductor are connect with the grid of second metal-oxide-semiconductor；The leakage of second metal-oxide-semiconductor
Pole is connect with the drain electrode of first metal-oxide-semiconductor, and the source electrode of second metal-oxide-semiconductor passes through second capacity earth；The third
The source electrode of metal-oxide-semiconductor is connect with the source electrode of second metal-oxide-semiconductor, the grid of the grid of the third metal-oxide-semiconductor and the 4th metal-oxide-semiconductor
Connection, the drain electrode of the third metal-oxide-semiconductor are connect by the third capacitor with the radio-frequency voltage input terminal；4th MOS
The drain electrode of pipe is connect with the drain electrode of the third metal-oxide-semiconductor, and the source electrode and the High Level DC Voltage output end of the 4th metal-oxide-semiconductor connect
It connects.
Further, first metal-oxide-semiconductor and the third metal-oxide-semiconductor are NMOS tube, second metal-oxide-semiconductor and the 4th
Metal-oxide-semiconductor is PMOS tube.
Further, the metal-oxide-semiconductor booster circuit further includes the 4th capacitor；
One end of 4th capacitor is connect with the source electrode of the 4th metal-oxide-semiconductor, the other end ground connection of the 4th capacitor.
Further, the inverter circuit includes the first phase inverter and the second phase inverter；
The input terminal of first phase inverter is connect with the drain electrode of second metal-oxide-semiconductor, the output of first phase inverter
End is connect with the grid of the 4th metal-oxide-semiconductor, and the power end of first phase inverter is connect with the charging circuit；
The input terminal of second phase inverter is connect with the drain electrode of the third metal-oxide-semiconductor, the output of second phase inverter
End is connect with the grid of first metal-oxide-semiconductor, and the power end of second phase inverter is connect with the charging circuit.
Further, the charging circuit includes the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, the 5th
Capacitor, the 6th capacitor, the 7th capacitor and the 8th capacitor；
The drain and gate of 5th metal-oxide-semiconductor is grounded respectively, and the source electrode of the 5th metal-oxide-semiconductor passes through the 5th capacitor
It is connect with the radio-frequency voltage input terminal；The drain electrode of 6th metal-oxide-semiconductor, grid connect with the source electrode of the 5th metal-oxide-semiconductor respectively
It connecing, the source electrode of the 6th metal-oxide-semiconductor is connect with one end of the power end of the first phase inverter, the 6th capacitor respectively, and described
The other end of six capacitors is grounded；The drain electrode of 7th metal-oxide-semiconductor, grid are connect with the source electrode of the 5th metal-oxide-semiconductor respectively, described
The source electrode of 6th metal-oxide-semiconductor is connect with the radio-frequency voltage input terminal；The drain electrode of 8th metal-oxide-semiconductor, grid are respectively with described
The source electrodes of seven metal-oxide-semiconductors connects, the source electrode of the 8th metal-oxide-semiconductor respectively with the power end of second phase inverter, the 8th electricity
One end of appearance connects, the other end ground connection of the 8th capacitor.
Further, the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor and the 8th metal-oxide-semiconductor difference
For NMOS tube.
Further, each metal-oxide-semiconductor is all made of individual trap, and the substrate of each metal-oxide-semiconductor and its grid connect
It connects.
Implement the utility model embodiment, has the following beneficial effects:
Charge pump provided by the embodiment of the utility model, the conduction device using metal-oxide-semiconductor as charge pump, passes through control
The radio-frequency voltage of input is converted to High Level DC Voltage output by the on and off of metal-oxide-semiconductor, and the driving voltage of metal-oxide-semiconductor is larger,
So that metal-oxide-semiconductor resistance in conducting is smaller, conducting voltage is smaller, to reduce the voltage loss of charge pump, improves charge pump
Boosting efficiency, start quickly speed.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of one embodiment of charge pump provided by the utility model；
Fig. 2 is the output electricity of radio-frequency voltage and the first phase inverter, the second phase inverter in charge pump provided by the utility model
The waveform relationship figure of pressure.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without creative efforts
Every other embodiment obtained, fall within the protection scope of the utility model.
Referring to Fig. 1, the structural schematic diagram of one embodiment of charge pump provided by the utility model, including radio-frequency voltage are defeated
Enter to hold RF_IN, High Level DC Voltage output end Vref_out, metal-oxide-semiconductor booster circuit 1, inverter circuit 2 and charging circuit 3；
The input terminal of metal-oxide-semiconductor booster circuit 1 is connect with radio-frequency voltage input terminal RF_IN, the output of metal-oxide-semiconductor booster circuit 1
End is connect with High Level DC Voltage output end Vref_out, the control terminal of metal-oxide-semiconductor booster circuit 1 and the output end of inverter circuit 2
Connection, the input terminal of inverter circuit 2 are connect with the output end of charging circuit 3, and the input terminal and radio-frequency voltage of charging circuit 3 are defeated
Enter RF_IN is held to connect.
It should be noted that charging control circuit input radio frequency voltage is started to work, when its is working properly to phase inverter
Circuit with stable DC power supply, inverter circuit and metal-oxide-semiconductor booster circuit just work normally at this time.When normal work, metal-oxide-semiconductor
The input terminal input radio frequency voltage of booster circuit, the low and high level of control terminal input inverter circuit output, wherein radio-frequency voltage
For alternating voltage, inverter circuit is according to the output of radio-frequency voltage switch level.Metal-oxide-semiconductor in metal-oxide-semiconductor booster circuit is according to penetrating
The variation on or off of frequency voltage and inverter circuit output level realizes the boosting to radio-frequency voltage, general to pass through two
In the period, metal-oxide-semiconductor booster circuit, which can be converted to radio-frequency voltage, meets voltage amplitude required for RFID label chip works normally
Degree.
Further, the metal-oxide-semiconductor booster circuit includes four metal-oxide-semiconductors, first capacitor, the second capacitor and third electricity
Hold, four metal-oxide-semiconductors are the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the 4th metal-oxide-semiconductor；The amplitude of the radio-frequency voltage
For Vrf, the conducting voltage of the metal-oxide-semiconductor is Von；
In a cycle, when the radio-frequency voltage is negative, the first capacitor is given in the first metal-oxide-semiconductor conducting
Charging, makes the first capacitor both end voltage Vrf-Von；When the radio-frequency voltage is timing, first metal-oxide-semiconductor ends,
The second metal-oxide-semiconductor conducting, gives second capacitor charging, makes the second capacitor both end voltage 2 (Vrf-Von)；
In second period, when the radio-frequency voltage is negative, first metal-oxide-semiconductor and third metal-oxide-semiconductor conducting,
Second metal-oxide-semiconductor and the 4th metal-oxide-semiconductor cut-off, give the third capacitor charging, make the third capacitor both end voltage 3
(Vrf-Von)；When the radio-frequency voltage is timing, first metal-oxide-semiconductor and third metal-oxide-semiconductor cut-off, second metal-oxide-semiconductor
It is connected with the 4th metal-oxide-semiconductor, makes metal-oxide-semiconductor booster circuit output High Level DC Voltage 4 (Vrf-Von).
Further, the inverter circuit includes the first phase inverter and the second phase inverter；
When the radio-frequency voltage is negative, first phase inverter and second phase inverter are respectively to the metal-oxide-semiconductor liter
Volt circuit exports high level, and when the radio-frequency voltage is timing, first phase inverter and second phase inverter are respectively to institute
Metal-oxide-semiconductor booster circuit output low level is stated, to control the on or off of the metal-oxide-semiconductor.
It should be noted that in the present embodiment, first metal-oxide-semiconductor and the third metal-oxide-semiconductor are preferably NMOS tube, institute
Stating the second metal-oxide-semiconductor and the 4th metal-oxide-semiconductor is preferably PMOS tube.
In a cycle, radio-frequency voltage is first negative, the voltage of the drain electrode of the drain electrode and the second metal-oxide-semiconductor of the first metal-oxide-semiconductor
It is-Vrf, the second phase inverter exports high level to the grid of the first metal-oxide-semiconductor and the grid of the second metal-oxide-semiconductor, and the first metal-oxide-semiconductor
The source electrode of source electrode and the second metal-oxide-semiconductor is 0V, and the gate source voltage Vgs of the first metal-oxide-semiconductor is made to be greater than threshold V T h, the first metal-oxide-semiconductor
Conducting, first capacitor are charged, and the gate source voltage Vgs of the second metal-oxide-semiconductor is less than threshold V T h, and the second metal-oxide-semiconductor ends, this
When first capacitor voltage difference of the two ends be Vrf-Von.Then, radio-frequency voltage switchs to just, since capacitor both end voltage cannot be mutated, because
The voltage of the drain electrode of the drain electrode and the second metal-oxide-semiconductor of this first metal-oxide-semiconductor is elevated as 2Vrf-Von, and the drain electrode of third metal-oxide-semiconductor
It raises with the voltage of the drain electrode of the 4th metal-oxide-semiconductor as Vrf, the second phase inverter is to the grid of the first metal-oxide-semiconductor and the grid of the second metal-oxide-semiconductor
Low level is exported, the first metal-oxide-semiconductor is ended, the second metal-oxide-semiconductor is connected, at this time the voltage of the second metal-oxide-semiconductor source electrode, i.e. the second capacitor two
The voltage at end is 2 (Vrf-Von).
And so on, in second period, radio-frequency voltage is first negative, grid from the second phase inverter to the first metal-oxide-semiconductor and
The grid of second metal-oxide-semiconductor exports high level, and the first phase inverter exports high to the grid of third metal-oxide-semiconductor and the grid of the 4th metal-oxide-semiconductor
The first metal-oxide-semiconductor and third metal-oxide-semiconductor is connected in level, the second metal-oxide-semiconductor and the cut-off of the 4th metal-oxide-semiconductor, third metal-oxide-semiconductor drain electrode at this time
Voltage is 2Vrf-3Von, and the voltage difference at third capacitor both ends is 3 (Vrf-Von).Then, radio-frequency voltage switchs to just, and second is anti-
Phase device exports low level, grid of first phase inverter to third metal-oxide-semiconductor to the grid of the first metal-oxide-semiconductor and the grid of the second metal-oxide-semiconductor
Low level is exported with the grid of the 4th metal-oxide-semiconductor, ends the first metal-oxide-semiconductor and third metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are led
Logical, the voltage of the 4th metal-oxide-semiconductor drain electrode at this time is elevated as 4Vrf-3Von, so that the voltage of the 4th metal-oxide-semiconductor source electrode is 4 (Vrf-
Von), i.e., 4 (Vrf-Von) voltages are exported by High Level DC Voltage output end.
Further, as shown in Figure 1, the metal-oxide-semiconductor booster circuit 1 includes four metal-oxide-semiconductors, first capacitor C1, the second electricity
Hold C2 and third capacitor C3, the first metal-oxide-semiconductor M1 and third metal-oxide-semiconductor M3 in four metal-oxide-semiconductors are NMOS tube, the second metal-oxide-semiconductor M2
It is PMOS tube with the 4th metal-oxide-semiconductor M4；
The source electrode of the first metal-oxide-semiconductor M1 is grounded, and the drain electrode of the first metal-oxide-semiconductor M1 passes through the first capacitor C1 and institute
The RF_IN connection of radio-frequency voltage input terminal is stated, the grid of the first metal-oxide-semiconductor M1 is connect with the grid of the second metal-oxide-semiconductor M2；Institute
The drain electrode for stating the second metal-oxide-semiconductor M2 is connect with the drain electrode of the first metal-oxide-semiconductor M1, and the source electrode of the second metal-oxide-semiconductor M2 passes through described
Second capacitor C2 ground connection；The source electrode of the third metal-oxide-semiconductor M3 is connect with the source electrode of the second metal-oxide-semiconductor M2, the third metal-oxide-semiconductor
The grid of M3 is connect with the grid of the 4th metal-oxide-semiconductor M4, the drain electrode of the third metal-oxide-semiconductor M3 by the third capacitor C3 with
The radio-frequency voltage input terminal RF_IN connection；The drain electrode of the 4th metal-oxide-semiconductor M4 is connect with the drain electrode of the third metal-oxide-semiconductor M3,
The source electrode of the 4th metal-oxide-semiconductor M4 is connect with the High Level DC Voltage output end Vref_out.
Further, the metal-oxide-semiconductor booster circuit 1 further includes the 4th capacitor C4；
One end of the 4th capacitor C4 is connect with the source electrode of the 4th metal-oxide-semiconductor M4, and the 4th capacitor C4's is another
End ground connection.
Further, as shown in Figure 1, the inverter circuit includes the first phase inverter N1 and the second phase inverter N2；
The input terminal of the first phase inverter N1 is connect with the drain electrode of the second metal-oxide-semiconductor M2, the first phase inverter N1
Output end connect with the grid of the 4th metal-oxide-semiconductor M4, the power end of the first phase inverter N1 and the charging circuit 3 connect
It connects；
The input terminal of the second phase inverter N2 is connect with the drain electrode of the third metal-oxide-semiconductor M3, the second phase inverter N2
Output end connect with the grid of the first metal-oxide-semiconductor M1, the power end of the second phase inverter N2 and the charging circuit 3 connect
It connects.
It should be noted that as shown in Figure 1, when RF_IN is negative, V1=-Vrf, N2 output are electric in a cycle
Pressure Vg2 is high level, and the source of M1 is 0V, and the source of M2 is 0V, and M1 is connected, and M2 cut-off, C1 is charged, at this time the both ends C1
Voltage difference is Vrf-Von.When RF_IN is timing, since capacitor both end voltage cannot be mutated, so V1 raises as 2Vrf-Von,
Since V3 is also elevated as Vrf, leading to Vg2 is low level, so that M1 ends, M2 conducting, V2=2 (Vrf-Von).
And so on, in second period, when RF_IN is negative, V1=-Von, V3=-Vrf, and Vg2 is high electricity
Flat, Vg1 is high level, so that M1 and M3 conducting, M2 and M4 cut-off, V3=V2-Von=2Vrf-3Von, C3 are charged, this
When C3 both end voltage be 2Vrf-3Von+Vrf=3Vrf-3Von.When RF_IN is timing, Vg2 is low level, and Vg1 is low level,
M1 and M3 cut-off, M2 and M4 conducting, V3 are lifted to 4Vrf-3Von, therefore Vref_out=V3-Von=4Vrf-4Von.
Further, as shown in Figure 1, the charging circuit 3 includes the 5th metal-oxide-semiconductor M5, the 6th metal-oxide-semiconductor M6, the 7th metal-oxide-semiconductor
M7, the 8th metal-oxide-semiconductor M8, the 5th capacitor C5, the 6th capacitor C6, the 7th capacitor C7 and the 8th capacitor C8；
The drain and gate of the 5th metal-oxide-semiconductor M5 is grounded respectively, and the source electrode of the 5th metal-oxide-semiconductor M5 passes through the described 5th
Capacitor C5 is connect with the radio-frequency voltage input terminal RF_IN；The drain electrode of the 6th metal-oxide-semiconductor M6, grid are respectively with the described 5th
The source electrode of metal-oxide-semiconductor M5 connects, the source electrode of the 6th metal-oxide-semiconductor M6 respectively with the power end of the first phase inverter N1, the 6th electricity
Hold one end connection of C6, the other end ground connection of the 6th capacitor C6；The drain electrode of the 7th metal-oxide-semiconductor M7, grid respectively with institute
The source electrode connection of the 5th metal-oxide-semiconductor M5 is stated, the source electrode of the 6th metal-oxide-semiconductor M6 is connect with the radio-frequency voltage input terminal RF_IN；Institute
State the drain electrode of the 8th metal-oxide-semiconductor M8, grid is connect with the source electrode of the 7th metal-oxide-semiconductor M7 respectively, the source electrode of the 8th metal-oxide-semiconductor M8
It is connect respectively with one end of the power end of the second phase inverter N2, the 8th capacitor C8, the 8th capacitor C8's is another
End ground connection.
Further, the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor and the 8th metal-oxide-semiconductor difference
For NMOS tube.
It should be noted that the power supply circuit is similar with the front-end circuit of charge pump in the prior art, but the power supply circuit
Diode is replaced to adapt to CMOS technology using NMOS tube.Power supply circuit takes the voltage output Vbias_1, Vbias_ of two nodes
2 as phase inverter supply voltage.Wherein, as shown in Fig. 2, Vbias1 and Vbias2 respectively indicate Vg1 and Vg2 is attainable
Maximum value, Vbias1 and Vbias2 can be considered always fixed value.
Further, each metal-oxide-semiconductor is all made of individual trap, and the substrate of each metal-oxide-semiconductor and its grid connect
It connects.
It should be noted that each metal-oxide-semiconductor in the present embodiment can use individual trap, the independent N trap of PMOS tube,
NMOS tube can generate individual p-well with deep N-well technique.So, the substrate of whole metal-oxide-semiconductors can connect different
Then the substrate of each metal-oxide-semiconductor is connected to its grid by level, so that the substrate of metal-oxide-semiconductor is equivalent to second end gate, into
The conducting resistance of one step reduction metal-oxide-semiconductor.
The utility model embodiment uses conduction device of the metal-oxide-semiconductor as charge pump, by controlling the conducting of metal-oxide-semiconductor and cutting
Only, the radio-frequency voltage of input is converted into High Level DC Voltage output, and the driving voltage of metal-oxide-semiconductor is larger, so that metal-oxide-semiconductor is being connected
When resistance it is smaller, conducting voltage is smaller, to reduce the voltage loss of charge pump, improves the boosting efficiency of charge pump, accelerates to open
Dynamic speed.
The above is preferred embodiments of the present invention, it is noted that for the ordinary skill of the art
For personnel, without departing from the principle of this utility model, several improvements and modifications can also be made, these are improved and profit
Decorations are also considered as the protection scope of the utility model.
Claims (8)
1. a kind of charge pump, which is characterized in that including radio-frequency voltage input terminal, metal-oxide-semiconductor booster circuit, inverter circuit, charging
Circuit and High Level DC Voltage output end；
The input terminal of the metal-oxide-semiconductor booster circuit is connect with the radio-frequency voltage input terminal, the output of the metal-oxide-semiconductor booster circuit
End is connect with the High Level DC Voltage output end, the control terminal of the metal-oxide-semiconductor booster circuit and the output of the inverter circuit
End connection, the input terminal of the inverter circuit are connect with the output end of the charging circuit, the input terminal of the charging circuit
It is connect with the radio-frequency voltage input terminal.
2. charge pump as described in claim 1, which is characterized in that the metal-oxide-semiconductor booster circuit includes the first metal-oxide-semiconductor, second
Metal-oxide-semiconductor, third metal-oxide-semiconductor, the 4th metal-oxide-semiconductor, first capacitor, the second capacitor and third capacitor；
The source electrode of first metal-oxide-semiconductor is grounded, and the drain electrode of first metal-oxide-semiconductor passes through the first capacitor and the radio-frequency voltage
Input terminal connection, the grid of first metal-oxide-semiconductor are connect with the grid of second metal-oxide-semiconductor；The drain electrode of second metal-oxide-semiconductor with
The drain electrode of first metal-oxide-semiconductor connects, and the source electrode of second metal-oxide-semiconductor passes through second capacity earth；The third metal-oxide-semiconductor
Source electrode connect with the source electrode of second metal-oxide-semiconductor, the grid of the third metal-oxide-semiconductor is connect with the grid of the 4th metal-oxide-semiconductor,
The drain electrode of the third metal-oxide-semiconductor is connect by the third capacitor with the radio-frequency voltage input terminal；The leakage of 4th metal-oxide-semiconductor
Pole is connect with the drain electrode of the third metal-oxide-semiconductor, and the source electrode of the 4th metal-oxide-semiconductor is connect with the High Level DC Voltage output end.
3. charge pump as claimed in claim 2, which is characterized in that first metal-oxide-semiconductor and the third metal-oxide-semiconductor are NMOS
Pipe, second metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are PMOS tube.
4. charge pump as claimed in claim 2, which is characterized in that the metal-oxide-semiconductor booster circuit further includes the 4th capacitor；
One end of 4th capacitor is connect with the source electrode of the 4th metal-oxide-semiconductor, the other end ground connection of the 4th capacitor.
5. charge pump as claimed in claim 2, which is characterized in that the inverter circuit includes that the first phase inverter and second are anti-
Phase device；
The input terminal of first phase inverter is connect with the drain electrode of second metal-oxide-semiconductor, the output end of first phase inverter with
The grid of 4th metal-oxide-semiconductor connects, and the power end of first phase inverter is connect with the charging circuit；
The input terminal of second phase inverter is connect with the drain electrode of the third metal-oxide-semiconductor, the output end of second phase inverter with
The grid of first metal-oxide-semiconductor connects, and the power end of second phase inverter is connect with the charging circuit.
6. charge pump as claimed in claim 5, which is characterized in that the charging circuit include the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor,
7th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, the 5th capacitor, the 6th capacitor, the 7th capacitor and the 8th capacitor；
The drain and gate of 5th metal-oxide-semiconductor is grounded respectively, and the source electrode of the 5th metal-oxide-semiconductor passes through the 5th capacitor and institute
State the connection of radio-frequency voltage input terminal；The drain electrode of 6th metal-oxide-semiconductor, grid are connect with the source electrode of the 5th metal-oxide-semiconductor respectively, institute
The source electrode for stating the 6th metal-oxide-semiconductor is connect with one end of the power end of the first phase inverter, the 6th capacitor respectively, the 6th capacitor
The other end ground connection；The drain electrode of 7th metal-oxide-semiconductor, grid are connect with the source electrode of the 5th metal-oxide-semiconductor respectively, and the described 6th
The source electrode of metal-oxide-semiconductor is connect with the radio-frequency voltage input terminal；The drain electrode of 8th metal-oxide-semiconductor, grid respectively with the 7th MOS
The source electrode of pipe connects, the source electrode of the 8th metal-oxide-semiconductor respectively with the power end of second phase inverter, the 8th capacitor one
End connection, the other end ground connection of the 8th capacitor.
7. charge pump as claimed in claim 6, which is characterized in that the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the described 7th
Metal-oxide-semiconductor and the 8th metal-oxide-semiconductor are respectively NMOS tube.
8. charge pump as claimed in claim 2, which is characterized in that each metal-oxide-semiconductor is all made of individual trap, and each metal-oxide-semiconductor
Substrate connect with its grid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820668028.6U CN208190515U (en) | 2018-05-04 | 2018-05-04 | A kind of charge pump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820668028.6U CN208190515U (en) | 2018-05-04 | 2018-05-04 | A kind of charge pump |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208190515U true CN208190515U (en) | 2018-12-04 |
Family
ID=64432817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820668028.6U Active CN208190515U (en) | 2018-05-04 | 2018-05-04 | A kind of charge pump |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208190515U (en) |
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2018
- 2018-05-04 CN CN201820668028.6U patent/CN208190515U/en active Active
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