CN208141188U - A kind of pin-connected panel data interaction intelligent terminal system - Google Patents

Abstract

The utility model relates to a kind of pin-connected panel data interaction intelligent terminal system, including data interaction smart host terminal, data/address bus, the 1st slave terminal to N slave terminal, the extension form of the 1st slave terminal to N slave terminal is tandem type；The utility model has flexibly can assembled characteristic, it is general with typography, the production again of circuit board package need not be carried out because of local improvement, with efficient, convenient and fast slave extended attribute, data interaction host terminal and data interaction extension slave terminal integrate distinctive flames of war relay module, can turn on automatically communication bus send data, improve real-time communication, anti-interference ability and stability are stronger, slave can plug and play, realize tandem type infinite expanding, the utility model is suitable for steel, petroleum, chemical industry, electric power, building materials, machine-building, automobile, light textile, communications and transportation, the all trades and professions such as environmental protection.

Description

A kind of pin-connected panel data interaction intelligent terminal system

Technical field

The utility model relates to a kind of pin-connected panel data interaction intelligent terminal systems, belong to automatic control technology field.

Background technique

The signal of some equipment is often acquired in industry or to automatically control some equipment, and what industrial equipment used Controller and signal kinds multiplicity, this just needs a kind of controller or medium that can be connect with plurality of devices, connection Signal type need to cover DI (digital quantity input), DO (digital output), AI (analog input), AO (analog output) and Various serial communication data signals（Such as 485 communication, CAN communication, Ethernet etc.）.Existing processing mode is generally as follows：

1. using PLC.Although PLC, using simple, high reliablity, its is at high cost, and its architecture be it is closed, Each PLC business men is also to let a hundred schools contend, and hardware systems are incompatible, and it is also different that programming language mentions instruction system, when user selects After a kind of PLC product, it is necessary to select its corresponding control procedure, and learn specific programming language.This is undoubtedly extended It is development cycle, particularly evident in the frequent this defect in place of flow of personnel；

2. buy some general modules carries out secondary research and development again.Although there are many signal, different controls at control scene It is different to make live emphasis, this results in a kind of control medium and is very difficult to apply in various communication situations, and controls the exploitation of medium Person also tends to need to buy different modules for different industry spots, for developing different control equipment；

Both the above mode can all cause the waste of human resources, physical resources to a certain extent.Moreover, electronic product Although easy to use, it is big to the potential hazard of environment, and the rate of recovery is low and low, in today that environmental problem is got worse, is It is unfavorable for conservation culture development.

Utility model content

The utility model is in view of the above problems, use for reference the thinking of typography, the utility model proposes a kind of assembly Formula data interaction intelligent terminal system realizes Function Decomposition while not influencing industry spot demand, and each functional module is only Self-forming carries out assembly as needed when in use, greatly improves the utilization rate of electronic product.

The technical solution adopted in the utility model is as follows：

A kind of pin-connected panel data interaction intelligent terminal system, including data interaction smart host terminal, data/address bus, the 1st Slave terminal is to N slave terminal, and wherein N is the integer greater than 1；The 1st slave terminal to N slave terminal structure phase Together, the extension form of the 1st slave terminal to N slave terminal is tandem type；The data interaction smart host terminal according to It is secondary through the 1st slave terminal, the 2nd slave terminal ..., N-1 slave terminal is connected with N slave terminal；The data interaction Smart host terminal, the 1st slave terminal to N slave terminal are connected respectively on data/address bus.

The beneficial effects of the utility model are as follows：

The utility model flexibly can assembled characteristic --- and PLC can be replaced to work, and it possesses the secondary of high flexible and opens Volatility, AI, AO, DI, DO, serial communication interface connect to flexible user's expansion module between key control unit, is provided Mouthful, user can according to actual needs, the circuit of designed, designed isolation circuit or other functions, this makes entire framework such as open source System it is the same, can easily improve；Also as typography, it is not necessary to carry out the whole series because of the improvement of part The production again of circuit board.

Efficiently, the .NET Micro Framework embedded system of powerful secondary development characteristic --- carrying, makes face It has been applied in hardware development to the design philosophy of object, software developer can be enabled to develop end from the PC of C#.Net/VB.NET It rapidly enters, hardware system is developed using the high production rate of Visual Studio, without the hardware development engineering of profession Teacher, so as to reduce cost of labor for the enterprise of secondary development；

Efficiently, easily slave extended attribute --- data interaction host terminal and data interaction extension slave terminal are integrated Distinctive flames of war relay module uses distinctive signal transfer mode（Here it is named as：Flames of war Relay Method）, it is detached from host In such a way that communication bus selects slave, slave, can turn on automatically communication bus transmission number after detecting relay signal According to propagandaing directed to communicate without host, slave is answered automatically, is mentioned in this way, original two-way response formula communication is become relay answer-mode High real-time communication；And its serviced slave terminal has not needed programmable MCU, MCU is serial relative to having, anti-interference energy Power and stability are stronger；And it need to only use 4 lines including power supply line, ground wire, can enable slave plug and play, realize Theoretic tandem type infinite expanding.

The utility model be suitable for steel, petroleum, chemical industry, electric power, building materials, machine-building, automobile, light textile, communications and transportation, The all trades and professions such as environmental protection, for switching value logic control in need, process control, data processing, communication networking automatic control It field processed can be general.

Detailed description of the invention

Fig. 1 is the utility model principle block diagram；

Fig. 2 is the functional block diagram of the data interaction smart host terminal of the utility model；

Fig. 3 is the circuit diagram of the Power Management Unit of the utility model；

Fig. 4 is the circuit diagram of the key control unit of the utility model；

Fig. 5 is the circuit diagram of the I/O expansion bus communication circuitry of the utility model；

Fig. 6 is the circuit diagram of the flames of war relay main module circuit of the utility model；

Fig. 7 is the circuit diagram of the first serial isolation card circuit of the utility model；

Fig. 8 is the circuit diagram of the first AI isolation circuit of the utility model；

Fig. 9 is the circuit diagram of the AO isolation card circuit of the utility model；

Figure 10 is the circuit diagram of the parallel-serial conversion input circuit of the utility model；

Figure 11 is the circuit diagram of the serioparallel exchange output circuit of the utility model；

Figure 12 is the circuit diagram of the first DO driving circuit of the utility model；

Figure 13 is the circuit diagram of the first DO isolation circuit of the utility model；

Figure 14 is the circuit diagram of the first DI isolation circuit of the utility model；

Figure 15 is the circuit diagram of the DIDO isolation circuit of the utility model；

Figure 16 is the circuit diagram of the PWM counter isolation board circuit of the utility model；

Figure 17 is the circuit diagram of the first human-computer interaction circuit of the utility model；

Figure 18 is the circuit diagram of the second human-computer interaction circuit of the utility model

Figure 19 is the circuit diagram of the serial port circuit of the utility model；

Figure 20 is the circuit diagram of the CAN bus circuit of the utility model；

Figure 21 is the functional block diagram of the 1st slave terminal；

Figure 22 is circuit diagram of the flames of war relay from modular circuit；

Figure 23 is the circuit diagram of bus control unit.

Specific embodiment

The embodiment as shown in Fig. 1-2 3 is it is found that it is related to a kind of pin-connected panel data interaction intelligent terminal system, including number According to interactive intelligence host terminal, data/address bus, the 1st slave terminal to N slave terminal, wherein N is the integer greater than 1；It is described The structure of 1st slave terminal to N slave terminal is identical, and the extension form of the 1st slave terminal to N slave terminal is grade Connection formula；The data interaction smart host terminal successively through the 1st slave terminal, the 2nd slave terminal ..., N-1 slave terminal with N slave terminal is connected；The data interaction smart host terminal, the 1st slave terminal to N slave terminal are connected respectively to On data/address bus.

The data interaction smart host terminal include key control unit, DIDO isolation card circuit, AI isolation card circuit, AO isolation card circuit, association processing unit interface circuit, serial ports isolation card circuit, integrated communication card circuit, human-computer interaction circuit, PWM counter isolation board circuit, I/O expansion card circuit and Power Management Unit；The key control unit is isolated with the serial ports The corresponding port of card circuit is bi-directionally connected, and the serial ports isolation card circuit is bi-directionally connected with rs 232 serial interface signal port to be measured；It is described The corresponding port of key control unit and the integrated communication card circuit is bi-directionally connected, the integrated communication card circuit and serial number Word signal port is bi-directionally connected；The corresponding port of the key control unit and the I/O expansion card circuit is bi-directionally connected, described I/O expansion card circuit is bi-directionally connected with multi-functional data interactive intelligence slave terminal prot；The key control unit and the association The corresponding port of processing unit interface circuit is bi-directionally connected, and inspection is invaded in the first input end access of association's processing unit interface circuit Input signal port is surveyed and interrupts, the first output of association's processing unit interface circuit terminates the phase of the human-computer interaction circuit Input terminal is answered, the second output terminal of association's processing unit interface circuit connects the respective input of the PWM counter isolation board circuit； The corresponding port of the human-computer interaction circuit and the key control unit is bi-directionally connected；The key control unit with it is described The corresponding port of PWM counter isolation board circuit is bi-directionally connected, pulse signal port to be measured and the PWM counter isolation board The corresponding port of circuit is bi-directionally connected；The output of the key control unit terminates the corresponding port of the AO isolation card circuit The output of input terminal, the AO isolation card circuit terminates analog control signal port；The input of the AI isolation card circuit terminates Analog signal port to be measured, the respective input of the output termination key control unit of the AI isolation card circuit；It is described DIDO isolation card circuit and the corresponding port of the key control unit are bi-directionally connected, and the DIDO isolation card circuit and switch are believed The corresponding port of number port is bi-directionally connected；The output end of the Power Management Unit connects the key control unit, DIDO respectively Isolation card circuit, AI isolation card circuit, AO isolation card circuit, association's processing unit interface circuit, serial ports isolation card circuit, synthesis are logical Letter card circuit, human-computer interaction circuit, PWM counter isolation board circuit, I/O expansion card circuit corresponding power port, power management The input of unit terminates external power supply power supply.

The data interaction smart host terminal further includes mainboard and the first to the tenth circuit board；Association's processing unit connects Mouth circuit is arranged on mainboard；The key control unit is arranged on first circuit board；The DIDO isolation card circuit setting On the second circuit board；AI isolation card circuit is arranged on tertiary circuit plate；AO isolation card circuit is arranged on the 4th circuit board； Serial ports isolation card circuit is arranged on the 5th circuit board；Integrated communication card circuit is arranged on the 6th circuit board；Human-computer interaction electricity Road is arranged on the 7th circuit board；PWM counter isolation board circuit is arranged on the 8th circuit board；The setting of I/O expansion card circuit exists On 9th circuit board；Power Management Unit is arranged on the tenth circuit board；Described first to the tenth circuit board in a plug-in manner with The mainboard is connected.

The Power Management Unit is by chip U1, chip U5, chip U8, voltage-stabiliser tube D101, inductance L101, capacitor C101- Capacitor C105, resistance R101- resistance R104 composition；The model APL117- of the model MP2403 of the chip U1, chip U5 The model SS14 of the model DC1212 of 3.3, chip U8, voltage-stabiliser tube D101；

2 foot of input pin of the chip U1 meets external power supply power supply WB；3 foot of output pin of chip U1 connects the one of inductance L101 End, the other end of inductance L101 are output end+5V；Capacitor C101 connects between 2 foot of input pin and ground of chip U1, voltage-stabiliser tube D101 connects between 3 foot of output pin and ground of chip U1, and capacitor C102 connects between 1 foot and 3 feet of chip U1, and the 4 of chip U1 Foot ground connection, 5 feet of chip U1 meet the output end+5V through resistance R102, and resistance R101 connects between 5 feet and ground of chip U1, Capacitor C104 and resistance R103, which is connected in series, to be followed by between 6 feet and ground of chip U1, and capacitor C105 connects in output end+5V and ground Between, resistance R104 connects between 7 feet and 2 feet of chip U1, and capacitor C103 connects between 8 feet and ground of chip U1；

The input terminal Vin of the chip U5 meets output end+5V, and the output end vo ut of chip U5 is output end+3.3V, chip The ground terminal of U5 is grounded；

2 foot of input pin of the chip U8 meets external power supply power supply WB, and 1 foot of chip U8 and 3 feet are grounded, and the 4 of chip U8 Foot is output end+12V；

The key control unit includes embedded chip 1U1 and its peripheral component switch 1S2, crystal oscillator 1Y101- 1Y102, resistance 1R101-1R103, capacitor 1C101-1C107, data latches 1U2-1U3 and phase inverter chip 1U8；It is described embedding Entering formula chip 1U1 is to implant the embedded core of the model STM32F103ZET6 of the miniature frame of .Net Micro Framwork The reset circuit of piece, the switch 1S2, resistance 1R103 and capacitor 1C105 composition connects 25 feet and ground in embedded chip 1U1 Between, the first crystal oscillating circuit of the crystal oscillator 1Y102, resistance 1R102 and capacitor 1C103-1C104 composition connects in embedded chip Between 23 feet and 24 feet of 1U1, the second crystal oscillator electricity of the crystal oscillator 1Y101, resistance 1R101 and capacitor 1C101-1C102 composition Road connects between 8 feet and 9 feet of embedded chip 1U1；The model 74HC573 of the data latches 1U2-1U3, the number - 85 foot of 86 foot of the embedded chip 1U1, -115 foot of 114 foot, 58 are connect respectively according to -9 foot of 2 foot of input pin of latch 1U2 - 60 foot of foot, 63 feet, the 10 feet ground connection of data latches 1U2,20 feet of data latches 1U2 meet the output end+3.3V；Institute - 9 foot of 2 foot of input pin for stating data latches 1U3 connects -68 foot of 64 foot of the embedded chip 1U1, -79 foot of 77 foot respectively, number It is grounded according to 10 feet of latch 1U3,20 feet of data latches 1U3 meet the output end+3.3V；The phase inverter chip 1U8 Model 74LVC2G04,1 foot of the phase inverter chip 1U8 connects 137 feet of the embedded chip 1U1, the phase inverter 3 feet of chip 1U8 connect 110 feet of the embedded chip 1U1, and 6 feet of the phase inverter chip 1U8 meet data latches 1U2 11 feet and data latches 1U3 11 feet, phase inverter chip 1U8 2 feet ground connection, 5 feet of phase inverter chip 1U8 connect described defeated Outlet+3.3V；

The key control unit further includes chip 1U4, chip 1U5, chip 1U7；

The model of the chip 1U4 extends out sram chip SRAM-IS62WV51216BLL, 7 feet-of the chip 1U4 10 feet, -16 foot of 13 foot, -32 foot of 29 foot, -38 foot of 35 foot connect -85 foot of 86 foot, 114 feet-of the embedded chip 1U1 respectively 115 feet, -60 foot of 58 foot, -68 foot of 63 foot, -79 foot of 77 foot；- 1 foot of 5 foot of the chip 1U4, -42 foot of 44 foot, -24 foot of 27 foot, - 19 foot of 22 foot connects -12 foot of 19 foot of output pin of the data latches 1U2,19 foot of output pin-of data latches 1U3 respectively 12 feet；18 feet, 23 feet, 28 feet of the chip 1U4 connect -82 foot of 80 foot of the embedded chip 1U1 respectively；The chip 6 feet, 17 feet, -41 foot of 39 foot of 1U4 connects 123 feet, 119 feet, -42 foot of 41 foot, 118 feet of the embedded chip 1U1 respectively； 11 foot of power end of chip 1U4 and 33 feet meet the output end+3.3V, and capacitor 1C401 connects 11 feet and ground in chip 1U4 Between, capacitor 1C402 connects between 33 feet and ground of chip 1U4, resistance 1R401 connect chip 1U4 6 feet and the output end+ Between 3.3V；

The model of the chip 1U5 extends out FLASH chip MX29LV320,29 feet, 31 feet, 33 of the chip 1U5 Foot, 35 feet, 38 feet, 40 feet, 42 feet, 44 feet, 30 feet, 32 feet, 34 feet, 36 feet, 39 feet, 41 feet, 43 feet, 45 feet connect described respectively - 85 foot of 86 foot, -115 foot of 114 foot, -60 foot of 58 foot, -68 foot of 63 foot, -79 foot of 77 foot of embedded chip 1U1；The chip - 18 foot of 25 foot, -1 foot of 8 foot of 1U5 meets -12 foot of 19 foot of output pin of the data latches 1U2, data latches 1U3 respectively - 12 foot of 19 foot of output pin；48 feet, -16 foot of 17 foot, -10 foot of 9 foot of the chip 1U5 meets the embedded chip 1U1 respectively - 82 foot of 80 foot, -3 foot of 2 foot；11 feet, 12 feet, 15 feet, 28 feet, 26 feet of the chip 1U5 connect the embedded chip respectively 119 feet, 25 feet, 122 feet, 118 feet, 125 feet of 1U1；14 feet of the chip 1U5 through resistance 1R502 connect the output end+ 15 feet of 3.3V, the chip 1U5 meet the output end+3.3V through resistance 1R501, and 37 feet of the chip 1U5 connect described defeated Outlet+3.3V, filter capacitor 1C501 connect between 37 feet and ground of chip 1U5；

The chip 1U7 is outer extension memory MT29F1G08, -32 foot of 29 foot, -44 foot of 41 foot, 26 of the chip 1U7 - 28 foot of foot, 33 feet, 40 feet, -47 foot of 45 foot connect -85 foot of 86 foot of the embedded chip 1U1, -115 foot of 114 foot, 58 respectively - 60 foot of foot, -68 foot of 63 foot, -79 foot of 77 foot；7 feet, 8 feet, 9 feet, 18 feet of the chip 1U7 connect the embedded chip respectively 122 feet, 118 feet, 124 feet, 119 feet of 1U1；- 17 foot of 16 foot of the chip 1U7 connects the embedded chip 1U1's respectively - 80 foot of 81 foot；19 feet of the chip 1U7 connect 14 feet of the chip 1U5；12 feet, 34 feet, 37 feet, 39 of the chip 1U7 Foot meets the output end+3.3V, and capacitor 1C701 connects between 12 feet and ground of chip 1U7.

The I/O expansion card circuit includes I/O expansion bus communication circuitry and flames of war relay main module circuit；The I/O expansion Bus communication circuitry is by optocoupler 2U5, NAND gate 2U6, optocoupler 2U1 to 2U4, chip 2U7 to 2U8, exclusion 2RP101 to 2RP104 It is formed with resistance 2R501 to 2R506；The model 74HC00 of the model TLP281-2 of the optocoupler 2U5, NAND gate 2U6, light The model 74HC245 of the model TLP281-4 of coupling 2U1 to 2U4, chip 2U7 to 2U8；

The flames of war relay main module circuit is by chip 12U4, amplifier 12U3, optocoupler 12U1, chip 12U2, chip 12U5, constant-current source 12U6, triode 12Q01- triode 12Q03, potentiometer 12RJ01, resistance 12R11- resistance 12R15, resistance 12R31- resistance 12R35, resistance 12R22- resistance 12R27 and capacitor 12C31- capacitor 12C33 composition；The type of the chip 12U4 Number be 74HC74, the model TLP281-4 of the model LM358 of amplifier 12U3, optocoupler 12U1, the model of chip 12U2 The model E-102T of the model CN5710 of LM393, chip 12U5, constant-current source 12U6；

The serial ports isolation card circuit includes first to fourth serial ports isolation card circuit；The first to fourth serial ports isolation Card circuit structure is identical；Wherein first serial isolation card electricity router chip 10U1 to chip 10U7, number triode 10Q3 to number Word triode 10Q5, diode 10D1, resistance 10R51 to resistance 10R59 and capacitor 10C11 to capacitor 10C21 composition；The core The model SN75179B of the model MAX485 of the model MAX232 of piece 10U1, chip 10U2, chip 10U3, chip 10U4 Model XC6401, the model ADUM1201ARZ of the model TLP281-2 of chip 10U5, chip 10U6, chip 10U7 Model DC-DC05；The triode 10Q3, triode 10Q4 are positive-negative-positive number triode, and triode 10Q5 is NPN type Digital triode；Diode 10D1 is common cathode polar form diode；The second road serial ports isolation card electricity router chip 2-10U1 is extremely Chip 2-10U7, number triode 2-10Q3 to digital triode 2-10Q5, diode 2-10D1, resistance 2-10R51 to resistance 2-10R59 and capacitor 2-10C11 to capacitor 2-10C21 composition；The third road serial ports isolation card electricity router chip 3-10U1 is extremely Chip 3-10U7, number triode 3-10Q3 to digital triode 3-10Q5, diode 3-10D1, resistance 3-10R51 to resistance 3-10R59 and capacitor 3-10C11 to capacitor 3-10C21 composition；The 4th road serial ports isolation card electricity router chip 4-10U1 is extremely Chip 4-10U7, number triode 4-10Q3 to digital triode 4-10Q5, diode 4-10D1, resistance 4-10R51 to resistance 4-10R59 and capacitor 4-10C11 to capacitor 4-10C21 composition；

The AI isolation card circuit includes the first AI isolation circuit and the 2nd AI isolation circuit；The first AI isolation circuit It is identical with the 2nd AI isolation circuit structure；The first AI isolation circuit is by amplifier 4U1, amplifier 4U2, resistance 4R11- 4R18, resistance 4R21- resistance 4R28, resistance 4R31- resistance 4R38, capacitor 4C11-4C12 and exclusion 4RP511-4RP512 group At；The amplifier 4U1, amplifier 4U2 model be LM324；

The AO isolation card electricity routing amplifier 5U1, triode 5Q1-5Q2, resistance 5R1-5R12 and capacitor 5C1-5C2 group At；The model LM324 of the amplifier 5U1；

Association's processing unit circuit is made of parallel-serial conversion input circuit and serioparallel exchange output circuit；Described and string turns Input circuit is changed by chip 6U1, chip 6U5 to chip 6U7, chip 6UA to chip 6UB, triode 6Q701-6Q702, three poles Pipe 6Q602, resistance 6R701-6R708, resistance 6R601-6R603 and capacitor 6C701-6C702, capacitor 6C601-6C605 composition； The model TLP281-2 of the chip 6U1, the model 74HC165 of the chip 6U5 to chip 6U6, the model of chip 6U7 For BL1551, the model 74HC86 of the model 74HC165 of chip 6UA, chip 6UB；

The serioparallel exchange output circuit is by chip 7U1 to chip 7U5, chip 7U8 to chip 7U9, capacitor 7C701 to electricity Hold 7C705 and capacitor 7C708 to capacitor 7C709 composition；The model of the chip 7U1 to chip 7U5, chip 7U9 74HC594, the model 74HC139 of the chip 7U8；

2 feet, 4 feet of the optocoupler 2U5 of the I/O expansion bus communication circuitry are grounded, and 6 feet and 8 feet of optocoupler 2U5 meet institute Output end+5V is stated, 5 feet, 7 feet of optocoupler 2U5 are grounded through resistance 2R504, resistance 2R503 respectively；1 foot of the NAND gate 2U6, 5 feet, 10 feet, -14 foot of 13 foot meet the output end+5V, and 3 feet of NAND gate 2U6 are connect with 12 feet, 6 feet of NAND gate 2U6 and 9 Foot connection, 2 feet of NAND gate 2U6 connect 7 feet of the optocoupler 2U5, and 4 feet of NAND gate 2U6 connect 5 feet of the optocoupler 2U5；

Optocoupler 2U1 to 2U2, chip 2U7, exclusion 2RP101 to 2RP102 form signal output apparatus；The exclusion 93 feet, 10-15 foot, 132 feet of a termination embedded chip 1U1 of 2RP101 to 2RP102, the exclusion 2RP101 is extremely The other end of 2RP102 successively connects 1 foot, 3 feet, 5 feet, 7 feet of the optocoupler 2U1,1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2U2；Institute 2 feet, 4 feet, 6 feet, 8 feet of optocoupler 2U1 are stated, 2 feet, 4 feet, 6 feet, 8 feet of 2U2 are grounded；16 feet of the optocoupler 2U1,14 feet, 12 feet, 10 feet, 16 feet, 14 feet, 12 feet, 10 feet of 2U2 meet the output end+3.3V；15 feet of the optocoupler 2U1,13 feet, 11 feet, 9 feet, 15 feet, 13 feet, 11 feet, 9 feet of 2U2 successively connect -9 foot of 2 foot of chip 2U7；1 foot and 20 feet of the chip 2U7 Output end+the 3.3V is met, 19 feet of chip 2U7 connect 6 feet of NAND gate 2U6；

Optocoupler 2U3 to 2U4, chip 2U8, exclusion 2RP103 to 2RP06 form signal input circuit；The exclusion 2RP103 - 11 foot of 18 foot of chip 2U7 is successively connect to one end of 2RP104, the other end of the exclusion 2RP103 to 2RP104 successively meets institute State 1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2U3,1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2U4；2 feet of the optocoupler 2U3,4 feet, 6 feet, 8 feet, 2 feet, 4 feet, 6 feet, 8 feet of 2U4 are grounded；16 feet, 14 feet, 12 feet, 10 feet of the optocoupler 2U3,16 feet of 2U4,14 Foot, 12 feet, 10 feet meet the output end+3.3V；15 feet, 13 feet, 11 feet, 9 feet of the optocoupler 2U3,15 feet of 2U4,13 Foot, 11 feet, 9 feet successively connect -9 foot of 2 foot of chip 2U8；1 foot and 20 feet of the chip 2U8 meets the output end+3.3V, 19 feet of chip 2U8 connect 4 feet of the chip 7U9 of the serioparallel exchange output circuit of association's processing unit interface circuit；The 18 of chip 2U8 - 11 foot of foot successively connects 93 feet, 10-15 foot, 132 feet of the embedded chip 1U1, and -9 foot of 2 foot of chip 2U8 is through exclusion 2RP105,2RP106 ground connection；

12 feet of the chip 12U4 connect 49 feet of embedded chip 1U1, and 11 feet of chip 12U4 meet embedded chip 1U1 50 feet, 5 feet of chip 12U4 are the feedback signal FHFK of flames of war relay main module circuit, 1 foot, 4 feet, 10 of chip 12U4 Foot, 13 feet, 14 feet meet the output end+3.3V, and 2 feet of chip 12U4 are grounded through resistance 12R14, and 3 feet of chip 12U4 meet institute State the collector of triode 12Q03；The collector of the triode 12Q03 meets the output end+3.3V through resistance 12R34, Base stage connects 7 feet of the amplifier 12U3, the emitter ground connection of triode 12Q03 through resistance 12R33, and capacitor 12C32 connects three Between the base stage and ground of pole pipe 12Q03；1 foot of the amplifier 12U3 meets 6 feet of the optocoupler 12U1, resistance 12R31, resistance 12R32, which is connected in series, to be followed by between the output end+3.3V and ground, the equal connecting resistance 12R31 of 2 feet and 6 feet of amplifier 12U3 with The node of resistance 12R32,7 feet of amplifier 12U3 connect 7 feet of the optocoupler 12U1；3 feet of amplifier 12U3 connect the chip 12 feet of 12U4,5 feet of amplifier 12U3 connect 11 feet of the chip 12U4；3 feet of the optocoupler 12U1 connect the chip 9 feet of 12U4,1 foot of optocoupler 12U1 meet the collector of triode 12Q02, resistance 12R25, resistance through the potentiometer 12RJ01 12R24, which is connected in series, to be followed by between 7 feet and ground of the 12U2, the base stage connecting resistance 12R25 and resistance of triode 12Q02 The node of 12R24, the emitter ground connection of triode 12Q02,2 feet of optocoupler 12U1 are grounded through constant-current source 12U6, and the 4 of optocoupler 12U1 Foot is connected with 5 feet of optocoupler 12U1, and 8 feet of optocoupler 12U1 are grounded through resistance 12R15, and 9 feet of optocoupler 12U1 are through resistance 12R13 Ground connection, 11 feet of optocoupler 12U1 are grounded through resistance 12R12, and 10 feet, 16 feet of optocoupler 12U1 meet+5V, and 15 feet of optocoupler 12U1 connect 2 feet of the chip 12U4；5 feet of the chip 12U2 connect 11 feet of the optocoupler 12U1, and 7 feet of chip 12U2 are through resistance 12R26 meets the output end+5V, and 1 foot of chip 12U2 connects the output end+5V, 6 feet of chip 12U2 and 2 through resistance 12R23 Foot is connected, and 3 feet of chip 12U2 connect 9 feet of the optocoupler 12U1；1 foot of the chip 12U5 connects the 1 of the chip 12U2 3 feet of foot, chip 12U5 are grounded through resistance 12R27, and 5 feet of chip 12U5 connect the collector of the triode 12Q02, chip 5 feet of 12U5 are the clock output port FHCLK of flames of war relay main module circuit；The base stage of the triode 12Q01 connects described 12 feet of optocoupler 12U1, resistance 12R21, resistance 12R22, which are connected in series, to be followed by between the output end+5V and ground, chip 12U2 2 foot connecting resistance 12R21 and resistance 12R22 node, the letter of the current collection of triode 12Q01 extremely flames of war relay main module circuit Number sending port FHn；

2 feet of the chip 10U7 of the first serial isolation card circuit connect the output end+5V, first serial isolation card electricity 1 foot of the chip 10U7 on road is grounded, and 3 feet of the chip 10U7 of first serial isolation card circuit are to export isolator, first serial 4 feet of the chip 10U7 of isolation card circuit are the isolated power supply of output, and 2 feet of the chip 10U4 connect the 4 of the chip 10U7 Foot, 1 foot of chip 10U4 connect 4 feet of the chip 10U7 through resistance 10R59, and the collector of digital triode 10Q5 connects chip 1 foot of 10U4, the base stage of triode 10Q5 connect 3 feet of chip 10U4, and the emitter of triode 10Q5 connects 3 feet of chip 10U7, Capacitor 10C21 connects between the collector of triode 10Q5 and 3 feet of chip 10U7；6 feet of chip 10U4 are first via output VCC1 is held, 4 feet of chip 10U4 are the second road output end VCC2, and 5 feet of chip 10U4 meet 3 feet of chip 10U7, chip 10U4 6 feet connect the first anode of the diode 10D1,4 feet of chip 10U4 connect the second plate of the diode 10D1, two poles The cathode of pipe 10D1 is output end VCC0, and capacitor 10C19 connects between 6 feet of chip 10U4 and 3 feet of chip 10U7, capacitor 10C20 connects between 4 feet of chip 10U4 and 3 feet of chip 10U7；

2 feet of the chip 10U6 connect 101 feet of the embedded chip 1U1, and 3 feet of chip 10U6 connect described embedded 102 feet of chip 1U1,1 foot of chip 10U6 meet the output end+5V, resistance 10R57 connect 2 feet of chip 10U6 and 7 feet it Between, resistance 10R58 connects between 3 feet and 6 feet of chip 10U6, and 8 feet of chip 10U6 connect the output end VCC0, capacitor 10C18 connects between 1 foot of chip 10U6 and 3 feet of chip 10U7, and capacitor 10C17 connects 8 feet and chip in chip 10U6 Between 3 feet of 10U7；The emitter of the triode 10Q3 meets the output end VCC0, and the base stage of triode 10Q3 connects the core 8 feet of piece 10U5, the collector of triode 10Q3 connect 3 feet of chip 10U7, the transmitting of the triode 10Q4 through resistance 10R53 Pole meets the output end VCC0, and the base stage of triode 10Q4 connects 6 feet of the chip 10U5, and the collector of triode 10Q4 is through electricity Resistance 10R54 connects 3 feet of chip 10U7, and the collector of triode 10Q4 connects 3 feet of the chip 10U4；The 1 of the chip 10U5 Foot connects 1 foot of 7U9 through resistance 10R55, and 3 feet of chip 10U5 connect 15 feet of 7U1, the current collection of triode 10Q3 through resistance 10R56 Pole connects 15 feet of 7U9 through resistance 10R51, and the collector of triode 10Q4 connects 15 feet of 7U1 through resistance 10R52, and the 2 of chip 10U5 Foot, 4 feet, 5 feet, 7 feet connect 3 feet of chip 10U7；1 foot of the chip 10U2 meets 7 feet of chip 10U6, the chip 10U2 2 feet be connected with 3 feet and be followed by the collector of triode 10Q3,4 feet of chip 10U2 meet 6 feet of chip 10U6, chip 10U2 8 feet meet the output end VCC2, capacitor 10C16 connects between 8 feet of chip 10U2 and 3 feet of chip 10U7；The chip 1 foot of 10U3 meets the output end VCC2, and 2 feet of chip 10U3 connect 1 foot of chip 10U2, and 3 feet of chip 10U3 connect chip 4 feet of 10U2,7 feet of chip 10U3 connect 7 feet of chip 10U2, and 8 feet of chip 10U3 connect 6 feet of chip 10U2；The chip 11 feet of 10U1 connect 3 feet of chip 10U3, and 12 feet of chip 10U1 connect 2 feet of chip 10U3, and 13 feet of chip 10U1 connect chip 7 feet of 10U3,14 feet of chip 10U1 connect 8 feet of chip 10U3, and capacitor 10C13 connects between 1 foot and 3 feet of chip 10U1, Capacitor 10C15 connects between 4 feet and 5 feet of chip 10U1, and 16 feet of chip 10U1 meet the output end VCC1, capacitor 10C11 It connects between 16 feet of chip 10U1 and 3 feet of chip 10U7, capacitor 10C12 connects 2 feet and the 3 of chip 10U7 in chip 10U1 Between foot, capacitor 10C14 is connect between 6 feet of chip 10U1 and 3 feet of chip 10U7；

2 feet of the chip 2-10U6 of the second serial isolation card circuit connect 37 feet of the embedded chip 1U1, chip 3 feet of 2-10U6 connect 36 feet of the embedded chip 1U1, and 3 feet of chip 2-10U5 connect 2 feet of 7U1, and the 1 of chip 2-10U5 Foot connects 1 foot of the 7U9；2 feet of the chip 3-10U6 of the third serial ports isolation card circuit connect the embedded chip 1U1's 70 feet, 3 feet of chip 3-10U6 connect 69 feet of the embedded chip 1U1, and 3 feet of chip 3-10U5 connect 4 feet of the 7U1, 1 foot of chip 3-10U5 connects 2 feet of the 7U9；2 feet of the chip 4-10U6 of the 4th serial ports isolation card circuit connect described embedding Enter 112 feet of formula chip 1U1,3 feet of chip 4-10U6 connect 111 feet of the embedded chip 1U1,3 feet of chip 4-10U5 6 feet of the 7U1 are connect, 1 foot of chip 4-10U5 connects 3 feet of the 7U9；

The DIDO isolation card circuit includes DIDO isolation circuit, DI isolation circuit, DO isolation circuit and DO driving circuit；

The DO driving circuit includes the first DO driving circuit to the 8th DO driving circuit, and the first DO driving circuit is extremely 8th DO driving circuit structure is identical；The first DO driving circuit is by triode Q1-Q2, light emitting diode DS1, voltage-stabiliser tube D2, resistance R2-R3 composition；The collector of the triode Q1 successively connects external drive power supply WV, three poles through resistance R3, resistance R2 The current collection of pipe Q1 extremely output pin O+ connects switching signal port, the output of transmitting extremely the first DO driving circuit of triode Q1 Foot O-, the base stage of triode Q1 connect the collector of the triode Q2；The emitter of the triode Q2 connects outside through resistance R2 The base stage of driving power WV, triode Q2 are the input pin OC+ of the first DO driving circuit；The voltage-stabiliser tube D2 connects in external drive Between power supply WV and the output pin O+, the light emitting diode DS1 connects the emitter and the input pin OC+ in triode Q2 Between；

The 2nd DO driving circuit is by triode 2-Q1 to 2-Q2, light emitting diode 2-DS1, voltage-stabiliser tube 2-D2, resistance 2-R2 to 2-R3 composition；The current collection of triode 2-Q1 extremely output pin O+, connects switching signal port, the emitter of triode 2-Q1 For the output pin O- of the 2nd DO driving circuit, the base stage of triode 2-Q2 is the input pin OC+ of the 2nd DO driving circuit；Described Three DO driving circuits are made of triode 3-Q1 to 3-Q2, light emitting diode 3-DS1, voltage-stabiliser tube 3-D2, resistance 3-R2 to 3-R3； The current collection of triode 3-Q1 extremely output pin O+ connects switching signal port, the transmitting of triode 3-Q1 extremely the 3rd DO driving electricity The base stage of the output pin O- on road, triode 3-Q2 are the input pin OC+ of the 3rd DO driving circuit；The 4th DO driving circuit by Triode 4-Q1 to 4-Q2, light emitting diode 4-DS1, voltage-stabiliser tube 4-D2, resistance 4-R2 to 4-R3 composition；The collection of triode 4-Q1 Electrode is output pin O+, connects switching signal port, the output pin O- of transmitting extremely the 4th DO driving circuit of triode 4-Q1, three The base stage of pole pipe 4-Q2 is the input pin OC+ of the 4th DO driving circuit；The 5th DO driving circuit is by triode 5-Q1 to 5- Q2, light emitting diode 5-DS1, voltage-stabiliser tube 5-D2, resistance 5-R2 to 5-R3 composition；The current collection of triode 5-Q1 extremely output pin O +, connect switching signal port, the output pin O- of transmitting extremely the 5th DO driving circuit of triode 5-Q1, the base of triode 5-Q2 The extremely input pin OC+ of the 5th DO driving circuit；The 6th DO driving circuit is by triode 6-Q1 to 6-Q2, light emitting diode 6-DS1, voltage-stabiliser tube 6-D2, resistance 6-R2 to 6-R3 composition；The current collection of triode 6-Q1 extremely output pin O+, connects switching signal end Mouthful, the base stage of the output pin O- of transmitting extremely the 6th DO driving circuit of triode 6-Q1, triode 6-Q2 are the 6th DO driving The input pin OC+ of circuit；The 7th DO driving circuit is by triode 7-Q1 to 7-Q2, light emitting diode 7-DS1, voltage-stabiliser tube 7- D2, resistance 7-R2 to 7-R3 composition；The current collection of triode 7-Q1 extremely output pin O+, meets switching signal port, triode 7-Q1 Transmitting extremely the 7th DO driving circuit output pin O-, the base stage of triode 7-Q2 is the input pin OC of the 7th DO driving circuit +；The 8th DO driving circuit by triode 8-Q1 to 8-Q2, light emitting diode 8-DS1, voltage-stabiliser tube 8-D2, resistance 8-R2 extremely 8-R3 composition；The current collection of triode 8-Q1 extremely output pin O+ connects switching signal port, the transmitting of triode 8-Q1 the extremely the 8th The base stage of the output pin O- of DO driving circuit, triode 8-Q2 are the input pin OC+ of the 8th DO driving circuit；

The DO isolation circuit includes the first DO isolation circuit and the 2nd DO isolation circuit；The 2nd DO isolation circuit with The structure of first DO isolation circuit is identical；The first DO isolation circuit is by optocoupler 3U1, exclusion 3RP1, light emitting diode 3DO1- 3DO4 composition；2 feet of optocoupler 3U1,4 feet, 6 feet, 8 feet are grounded after being connected, and 1 foot of optocoupler 3U1,3 feet, 5 feet, 7 feet are respectively through sending out Optical diode 3DO1-3DO4, which runs in, hinders one end of 3RP1, and the other end of exclusion 3RP1 is the input terminal of the first DO isolation circuit 16 feet, 14 feet, 12 feet, 10 feet of 3MDKI0 ~ 3MDKI3, optocoupler 3U1 connect the first DO driving circuit to the 4th DO driving electricity respectively 15 feet, 13 feet, 11 feet, 9 feet of the input pin OC+ on road, optocoupler 3U1 connect the first DO driving circuit to the 4th DO driving circuit respectively Output pin O-；

The 2nd DO isolation circuit is by optocoupler 2-3U1, exclusion 2-3RP1, light emitting diode 2-3DO1 to 2-3DO4 group At；1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2-3U1 run in through light emitting diode 2-3DO1 to 2-3DO4 respectively hinders the one of 2-3RP1 End, the other end of exclusion 2-3RP1 are input terminal 3MDKI0 ~ 3MDKI3 of the 2nd DO isolation circuit, the 16 of the optocoupler 2-3U1 Foot, 14 feet, 12 feet, 10 feet meet the input pin OC+ of the 5th DO driving circuit to the 8th DO driving circuit respectively, optocoupler 2-3U1's 15 feet, 13 feet, 11 feet, 9 feet meet the output pin O- of the 5th DO driving circuit to the 8th DO driving circuit respectively；

The DI isolation circuit includes the first DI isolation circuit and the 2nd DI isolation circuit；The 2nd DI isolation circuit with The structure of first DI isolation circuit is identical；The first DI isolation circuit is by optocoupler 3U5, exclusion 3RP3-3RP4, light emitting diode 3DI1-3DI4 composition；2 feet, 4 feet, 6 feet, 8 feet of optocoupler 3U5, which are connected, is followed by the common end of switching signal, 1 foot of optocoupler 3U5,3 Foot, 5 feet, 7 feet connect four-way switch signal port through exclusion 3RP4, light emitting diode 3D11-3D14 respectively, 10 feet of optocoupler 3U5, 12 feet, 14 feet, 16 feet, which are connected, is followed by the output end+3.3V, and 15 feet, 13 feet, 11 feet, 9 feet of optocoupler 3U5 connect through exclusion 3RP3 Ground, 15 feet, 13 feet, 11 feet, 9 feet of optocoupler 3U5, respectively signal output end 3MDKO0 ~ 3MDKO3 of the first DI isolation circuit； The 2nd DI isolation circuit is by optocoupler 2-3U5, exclusion 2-3RP3 to 2-3RP4, light emitting diode 2-3DI1 to 2-3DI4 group At；15 feet, 13 feet, 11 feet, 9 feet of the optocoupler 2-3U5, the respectively signal output end 3MDKO0 of the 2nd DI isolation circuit ~ 3MDKO3；

The DIDO isolation circuit is made of chip 3U2-3U3, digital triode 3Q1, resistance 3R1, capacitor 3C1-3C2, 20 feet of chip 3U2-3U3 meet the output end+3.3V, and 10 feet of chip 3U2-3U3 are grounded, and 19 feet of chip 3U2 connect 11 feet of chip 7U8, -11 foot of 18 foot of chip 3U2 connect -9 foot of 2 foot of chip 3U3, and -11 foot of 18 foot of chip 3U2 meets institute respectively 56-57 foot, the 87-92 foot of embedded chip 1U1 are stated, 1 foot of chip 3U2 connects 5 feet of chip 7U9, -5 foot of 2 foot of chip 3U2 Signal output end 3MDKO0 ~ 3MDKO3 of the first DI isolation circuit is met, -9 foot of 6 foot of chip 3U2 connects the 2nd DI isolation circuit Signal output end 3MDKO0 ~ 3MDKO3；1 foot of chip 3U3 connects 3 feet of chip 7U5, and 11 feet connect the current collection of digital triode 3Q1 Pole, -16 foot of 19 foot of chip 3U3 connect input terminal 3MDKI0 ~ 3MDKI3 of the first DO isolation circuit, -12 foot of 15 foot of chip 3U3 Input terminal 3MDKI0 ~ 3MDKI3 of the 2nd DO isolation circuit is met, the base stage of digital triode 3Q1 connects 1 foot of chip 3U2, number The emitter of triode 3Q1 connects 19 feet of chip 3U2, and resistance 3R1 connects between 11 feet and ground of chip 3U3, and capacitor 3C1 connects Between 20 feet and ground of chip 3U2, capacitor 3C2 is connect between 20 feet and ground of chip 3U3；

The amplifier 4U1 of the first AI isolation circuit, the model of amplifier 4U2 are LM324, the amplifier 4U1 3 foot of noninverting input analog signal port to be measured, 3 foot of noninverting input of amplifier 4U1 is grounded through resistance 4R31, puts 2 foot of reverse input end of big device 4U1 is grounded through resistance 4R12, and 1 foot of output end of amplifier 4U1 connects amplification through feedback resistance 4R11 2 foot of reverse input end of device 4U1；The analog signal port of 5 foot of the noninverting input reception measurement of the amplifier 4U1, amplification 5 foot of noninverting input of device 4U1 is grounded through resistance 4R32, and 6 foot of reverse input end of amplifier 4U1 is grounded through resistance 4R14, is put 7 foot of output end of big device 4U1 connects 6 foot of reverse input end of amplifier U1 through feedback resistance 4R13；The amplifier 4U1's is in the same direction The analog signal port of 10 foot of input terminal reception measurement, 10 foot of noninverting input of amplifier 4U1 are grounded through resistance 4R33, amplify 9 foot of reverse input end of device 4U1 is grounded through resistance 4R16, and 8 foot of output end of amplifier 4U1 connects amplifier through feedback resistance 4R15 9 foot of reverse input end of 4U1；The analog signal port of 12 foot of the noninverting input reception measurement of the amplifier 4U1, amplifier 12 foot of noninverting input of 4U1 is grounded through resistance 4R34, and 13 foot of reverse input end of amplifier 4U1 is grounded through resistance 4R18, is put 14 foot of output end of big device 4U1 connects 13 foot of reverse input end of amplifier 4U1 through resistance 4R17；4 feet of the amplifier 4U1 connect Output end+the 5V, the capacitor 4C11 connect between 4 feet and ground of amplifier 4U1；

The analog signal port of 3 foot of the noninverting input reception measurement of the amplifier 4U2, amplifier 4U2's is in the same direction defeated Enter 3 feet of end to be grounded through resistance 4R35,2 foot of reverse input end of amplifier 4U2 is grounded through resistance 4R22, the output of amplifier 4U2 1 foot is held to connect 2 foot of reverse input end of amplifier 4U2 through feedback resistance 4R21；5 foot of noninverting input of the amplifier 4U2 connects 5 foot of noninverting input of analog signal port to be measured, amplifier 4U2 is grounded through resistance 4R36, and amplifier 4U2's is reversed defeated Enter 6 feet of end to be grounded through resistance 4R24,7 foot of output end of amplifier 4U2 connects the reversed input of amplifier 4U2 through feedback resistance 4R23 Hold 6 feet；The analog signal port of 10 foot of the noninverting input reception measurement of the amplifier 4U2, the input in the same direction of amplifier 4U2 10 feet are held to be grounded through resistance 4R37,9 foot of reverse input end of amplifier 4U2 is grounded through resistance 4R26, the output end of amplifier 4U2 8 feet connect 9 foot of reverse input end of amplifier 4U2 through feedback resistance 4R25；12 foot of noninverting input of the amplifier 4U2 is received 12 foot of noninverting input of the analog signal port of measurement, amplifier 4U2 is grounded through resistance 4R38, and amplifier 4U2's is reversed defeated Enter 13 feet of end to be grounded through resistance 4R28,14 foot of output end of amplifier 4U2 connects the reversed defeated of amplifier 4U2 through feedback resistance 4R27 Enter 13 feet of end；4 feet of the amplifier 4U2 meet the output end+5V, and the capacitor 4C12 connects 4 feet and ground in amplifier 4U2 Between；

1 foot of output end, 7 feet, 8 feet, 14 feet of the amplifier 4U1 connect the embedded chip through exclusion 4RP511 respectively 34 feet, 35 feet, 42 feet, 43 feet of 1U1；1 foot of output end of the amplifier 4U2,7 feet, 8 feet, 14 feet are respectively through exclusion 4RP512 connects 46 feet, 47 feet, 26 feet, 27 feet of the embedded chip 1U1；

The 2nd AI isolation circuit is identical as the first AI isolation circuit structure, by amplifier 2-4U1, amplifier 2-4U2, Resistance 2-4R11 to 2-4R18, resistance 2-4R21 to resistance 2-4R28, resistance 2-4R31 to resistance 2-4R38, capacitor 2-4C11 extremely 2-4C12 and exclusion 2-4RP511 to 2-4RP512 composition；1 foot of output end, 7 feet, 8 feet, 14 feet point of the amplifier 2-4U1 28 feet, 29 feet, 44 feet, 45 feet of the embedded chip 1U1 are not connect through exclusion 2-4RP511；The amplifier 2-4U2's is defeated 1 foot of outlet, 7 feet, 8 feet, 14 feet connect 18 feet, 19 feet, 20 feet, 21 of the embedded chip 1U1 through exclusion 2-4RP512 respectively Foot；3 foot of noninverting input, 5 feet, 10 feet, 12 feet of amplifier 2-4U1 and 2-4U2 receive the analog signal end of measurement respectively Mouthful；

The resistance 5R4 and resistance 5R11 of the AO isolation card circuit are connected in series the input terminal 5 being followed by the amplifier 5U1 Between foot and ground, resistance 5R1 and resistance 5R12 are connected in series and are followed by between 10 foot of input terminal and ground of the amplifier 5U1, institute The node for stating resistance 5R4 and resistance 5R11 connects 41 feet of the embedded chip 1U1, the section of the resistance 5R1 and resistance 5R12 Point connects 40 feet of the embedded chip 1U1；1 foot of the amplifier 5U1 through resistance 5R2 meets amplifier 5U1 after being connected with 2 feet 5 feet, 7 feet of the amplifier 5U1 connect the base stage of the triode 5Q2, and 6 feet of amplifier 5U1 connect triode through resistance 5R5 The emitter of 5Q2, resistance 5R7 connect between 6 feet and ground of amplifier 5U1, and capacitor 5C1 connects 7 feet and ground in amplifier 5U1 Between；The collector of the triode 5Q2 meets the output end+12V, and emitter connects the 3 of amplifier 5U1 through resistance 5R10 Foot；13 feet of the amplifier 5U1 connect 10 feet of amplifier 5U1 through resistance 5R3 after being connected with 14 feet, and the 8 of the amplifier 5U1 Foot connects the base stage of the triode 5Q6, and 9 feet of amplifier 5U1 connect the emitter of triode 5Q1 through resistance 5R6, and resistance 5R8 connects Between 9 feet and ground of amplifier 5U1, capacitor 5C2 is connect between 8 feet and ground of amplifier 5U1；The collection of the triode 5Q1 Electrode meets the output end+12V, and emitter connects 12 feet of amplifier 5U1 through resistance 5R9；

1 foot, 4 feet of the chip 6U1 of the parallel-serial conversion input circuit connect through resistance 6R702, resistance 6R701 respectively Intrusion detection and interruption input signal, 6 feet and 8 feet of the chip 6U1 connect through resistance 6R703 and resistance 6R704 described respectively Output end+3.3V, 5 feet of the chip 6U1 are grounded through resistance 6R708, and capacitor 6C701 is in parallel with resistance 6R708, the chip 7 feet of 6U1 are grounded through resistance 6R707, and capacitor 6C702 is in parallel with resistance 6R702, and the base stage of the triode 6Q701 connects chip 5 feet of 6U1, the emitter ground connection of triode 6Q701, the collector of triode 6Q701 through resistance 6R706 connect the output end+ The base stage of 3.3V, the triode 6Q702 meet 7 feet of chip 6U1, the emitter ground connection of triode 6Q702, triode 6Q702 Collector meet the output end+3.3V through resistance 6R705, the collector of triode 6Q702 connects the embedded chip 1U1's 7 feet；The chip 6U5 to chip 6U6, chip 6UA 2 feet meet 133 feet of the embedded chip 1U1, triode 6Q602 Collector meet the output end+3.3V through resistance 6R601, the base stage of triode 6Q602 connects the chip through resistance 6R602 6 feet of 6U7, the emitter ground connection of triode 6Q602, resistance 6R603 is in parallel with capacitor 6C601 to be followed by triode 6Q602's Between base stage and ground；The chip 6U5 to chip 6U6, chip 6UA 1 foot meet the collector of triode 6Q602, chip 6U6 3 feet connect the collector of the triode 6Q701,14 feet of chip 6U6 connect 5 feet of the chip 12U4；The chip 6U7's 4 feet connect 134 feet of the embedded chip 1U1, and 1 foot of the chip 6UB connects 3 feet of chip 6U6,2 feet of the chip 6UB 4 feet of chip 6U6 are connect, 4 feet, 5 feet of the chip 6UB connect 13 feet of chip 6U5,12 feet, 11 feet of the chip 6UB respectively Connecing 54 feet of the embedded chip 1U1,3 feet of the chip 6UB connect 13 feet of the chip 6UB, and the 6 of the chip 6UB Foot connects 12 feet of the chip 6UB；

11 feet of the chip 7U1 to chip 7U5 of the serioparallel exchange output circuit connect the embedded chip 1U1's 133 feet；14 feet of the chip 7U1 connect 135 feet of the embedded chip 1U1,15 feet, 2 feet, 4 feet, 6 feet point of chip 7U1 3 feet of the chip 10U6 of first serial isolation card circuit, 3 feet of the chip 2-10U6 of second serial isolation card circuit, are not connect 3 feet of 3 feet of the chip 3-10U6 of three serial ports isolation card circuits, the chip 4-10U6 of the 4th serial ports isolation card circuit；

14 feet of the chip 7U5 connect 9 feet of chip 7U2, and 14 feet of the chip 7U3 connect 9 feet of the chip 7U5； 14 feet of the chip 7U4 connect 9 feet of the chip 7U3；

15 feet of the chip 7U8 connect 15 feet of chip 7U5, and -3 foot of 1 foot of chip 7U8 meets embedded chip 1U1 respectively 110 feet, 55 feet, 126 feet, 4 feet of chip 7U8 connect 6 feet of 12 feet of chip 7U1 to chip 7U5, chip 6U7；

- 7 foot of 6 foot of the chip 7U9 connects -13 foot of 14 foot of chip 7U8, and -12 foot of 11 foot, 14 feet of chip 7U9 meet institute 75 feet, 76 feet, 74 feet of embedded chip 1U1 are stated, 15 feet, -3 foot of 1 foot of chip 7U9 distinguishes first serial isolation card circuit 1 foot of chip 10U5,1 foot of the chip 2-10U5 of second serial isolation card circuit, third serial ports isolation card circuit chip 3- 1 foot of 10U5, the 4th serial ports isolation card circuit chip 4-10U5 1 foot；3 feet of chip 7U5 connect the light through resistance 2R501 1 foot of coupling 2U5,4 feet of chip 7U9 connect 3 feet of optocoupler 2U5 through resistance 2R502.

The PWM counter isolation board electricity router chip 8U4-8U7, optocoupler 8U2-8U3, transistor 8Q201-8Q204, crystalline substance Body pipe 8Q301-8Q308, exclusion 8RP101, exclusion 8RP201, exclusion 8RP202, light emitting diode 8D301-8D304, luminous two Pole pipe 8D201-8D204 and resistance 8R301-8R304 composition；The model simulant electronic switch of the chip 8U4-8U7 The model TLP281-4 of the model TLP521-4 of BL1551, optocoupler 8U3, optocoupler 8U4；The input of the chip 8U4-8U7 4 foot of foot connects 96 feet, 97 feet, 100 feet, 136 feet of the embedded chip 1U1 respectively；The input pin 6 of the chip 8U4-8U7 Foot connects -5 foot of 2 foot of the 7U2 in the serioparallel exchange output circuit respectively, and 3 foot of output pin of chip 8U4-8U7 is respectively through exclusion 8RP101, light emitting diode 8D301-8D304 connect 1 foot of input pin, 3 feet, 5 feet, 7 feet of optocoupler 8U3, and the 2 of the optocoupler 8U3 Foot, 4 feet, 6 feet, 8 feet ground connection；

- 16 foot of 9 foot of the optocoupler 8U3 has connect the identical impulse output circuit of four line structures；First via pulse output electricity Route transistor 8Q301, transistor 8Q305 and resistance 8R301 composition；16 feet of the optocoupler 8U3 connect pulse signal port Corresponding port, 16 feet of optocoupler 8U3 connect the collector of transistor 8Q301, the emitter connecting resistance 8R301's of transistor 8Q301 One end, the emitter of transistor 8Q305 connect 15 feet of optocoupler 8U3, and the collector of transistor 8Q305 connects the base of transistor 8Q301 Pole, the other end of the base stage connecting resistance 8R301 of transistor 8Q305；Second road impulse output circuit by transistor 8Q302, Transistor 8Q306 and resistance 8R302 composition；The collector of the transistor 8Q302 connects 14 feet of optocoupler 8U3, and the 14 of optocoupler 8U3 Foot connects the corresponding port of pulse signal port, and the emitter of transistor 8Q306 connects 13 feet of optocoupler 8U3；Third road pulse Output circuit is made of transistor 8Q303, transistor 8Q307 and resistance 8R303；The collector of the transistor 8Q303 connects light 12 feet of coupling 8U3,12 feet of optocoupler 8U3 connect the corresponding port of pulse signal port, and the emitter of transistor 8Q307 connects optocoupler 11 feet of 8U3；The 4th road impulse output circuit is made of transistor 8Q304, transistor 8Q308 and resistance 8R304；It is described The collector of transistor 8Q304 connects 10 feet of optocoupler 8U3, and 10 feet of optocoupler 8U3 connect the corresponding port of pulse signal port, crystal The emitter of pipe 8Q308 connects 9 feet of optocoupler 8U3；

The optocoupler 8U2, digital transistor 8Q201-8Q204, exclusion 8RP201, exclusion 8RP202, light emitting diode The PWM counter isolation board circuit pulse input circuit of 8D201-8D204 composition；The light emitting diode 8D201-8D204's Anode distinguishes the emitter of transistor 8Q301-8Q304, and the cathode of the light emitting diode 8D201-8D204 connects optocoupler respectively 1 foot, 3 feet, 5 feet, 7 feet of 8U2,2 feet, 4 feet, 6 feet, 8 feet of the optocoupler 8U2 connect optocoupler 8U3's through exclusion 8RP201 respectively 16 feet, 14 feet, 12 feet, 10 feet, 16 feet, 14 feet, 12 feet, 10 feet of the optocoupler 8U2 connect transistor 8Q201-8Q204's respectively Base stage, 15 feet, 13 feet, 11 feet, 9 feet of the optocoupler 8U2 are grounded；The collector of the transistor 8Q201-8Q204 is distinguished It is grounded through exclusion 8RP202, the collector of transistor 8Q201-8Q204 connects 1 foot, the core of 1 foot of chip 8U4, chip 8U5 respectively 1 foot of 1 foot of piece 8U6, chip 8U7, the emitter of transistor 8Q201-8Q204 meet the output end+3.3V；

The human-computer interaction circuit includes the first human-computer interaction circuit and the second human-computer interaction circuit；

The first human-computer interaction electricity routing resistance 9R1-9R8 and light emitting diode 9D1-9D8 composition；The resistance 9R1 It is connected in series and is followed by between 3 feet and ground of the chip 7U4 in the serioparallel exchange output circuit with light emitting diode 9D1；It is described Resistance 9R2 and light emitting diode 9D2 are connected in series 2 feet and ground of the chip 7U4 being followed by the serioparallel exchange output circuit Between；The resistance 9R3 and light emitting diode 9D3 are connected in series 1 foot of the chip 7U4 being followed by the serioparallel exchange output circuit Between ground；The resistance 9R4 and light emitting diode 9D4 are connected in series the chip being followed by the serioparallel exchange output circuit Between 15 feet and ground of 7U4；The resistance 9R5 and light emitting diode 9D5, which is connected in series, to be followed by the serioparallel exchange output circuit In chip 7U4 5 feet and ground between；The resistance 9R6 and light emitting diode 9D6 be connected in series be followed by it is defeated in the serioparallel exchange Out between 4 feet and ground of the chip 7U4 in circuit；The resistance 9R7 and light emitting diode 9D7, which is connected in series, to be followed by going here and there simultaneously described Between 7 feet and ground for converting the chip 7U4 in output circuit；The resistance 9R8 and light emitting diode 9D8, which is connected in series, to be followed by institute It states between 6 feet and ground of the chip 7U4 in serioparallel exchange output circuit；

The second human-computer interaction electricity routing resistance 9R11-9R18, switch 9S1-9S8 and capacitor 9C1-9C8 composition；It is described Resistance 9R11 connects with switch 9S1 and is followed by between the output end+3.3V and ground, the section of the resistance 9R11 and switch 9S1 Point connects 11 feet of the chip 6UA in the parallel-serial conversion input circuit；The resistance 9R12 connects with switch 9S2 to be followed by described Between output end+3.3V and ground, the node of the resistance 9R12 and switch 9S2 connect the chip in the parallel-serial conversion input circuit 12 feet of 6UA；The resistance 9R13 connects with switch 9S3 to be followed by between the output end+3.3V and ground, the resistance 9R13 13 feet of the chip 6UA in the parallel-serial conversion input circuit are connect with the node of switch 9S3；The resistance 9R14 and switch 9S4 Series connection is followed by between the output end+3.3V and ground, and it is defeated that the node of the resistance 9R14 and switch 9S4 connects the parallel-serial conversion Enter 14 feet of the chip 6UA in circuit；The resistance 9R15 connects with switch 9S5 to be followed by the output end+3.3V and ground Between, the node of the resistance 9R15 and switch 9S5 connect 3 feet of the chip 6UA in the parallel-serial conversion input circuit；The resistance 9R16 connects with switch 9S6 and is followed by between the output end+3.3V and ground, and the node of the resistance 9R16 and switch 9S6 connects 4 feet of chip 6UA in the parallel-serial conversion input circuit；The resistance 9R17 connects with switch 9S7 to be followed by the output Between end+3.3V and ground, the node of the resistance 9R17 and switch 9S7 meet the chip 6UA in the parallel-serial conversion input circuit 5 feet；The resistance 9R18 connects with switch 9S8 to be followed by between the output end+3.3V and ground, the resistance 9R18 with open The node for closing 9S8 connects 6 feet of the chip 6UA in the parallel-serial conversion input circuit；The capacitor 9C1-9C8 respectively with switch 9S1-9S8 is in parallel；

The integrated communication card circuit includes serial port circuit and CAN bus circuit；The serial port circuit is by serial port chip 11U11, resistance 11R1-11R2 and capacitor hair 11C1-11C5 composition；The model MAX232 of the serial port chip 11U11, it is described 11 feet, 12 feet of serial port chip 11U11 connect 113 feet of the embedded chip 1U1,116 feet respectively, serial port chip 11U11's 11 feet, 12 feet connect external corresponding rs 232 serial interface signal respectively, and resistance 11R1 connects between 10 feet and 12 feet of serial port chip 11U11, Resistance 11R2 connects between 9 feet and 11 feet of serial port chip 11U11, and capacitor 11C3 connects 4 feet and 5 feet in serial port chip 11U11 Between, capacitor 11C5 connects between 1 foot and 3 feet of serial port chip 11U11, and capacitor 11C1 connects 16 feet in serial port chip 11U11 Between ground, 16 feet of serial port chip 11U11 meet the output end+5V, capacitor 11C2 connect 2 feet in serial port chip 11U11 with Between ground, capacitor 11C4 is connect between 6 feet and ground of serial port chip 11U11；

The CAN bus circuit is made of isolating chip 11U21 and capacitor hair 11C6-11C7；The isolating chip The model ISO1050 of 11U21；1 foot of the isolating chip 11U21 meets the output end+5V, and 2 feet connect described embedded 140 feet of chip 1U1,3 feet of isolating chip 11U21 connect 139 feet of the embedded chip 1U1, and the 4 of isolating chip 11U21 Foot is grounded with 5 feet, and 6 feet and 7 feet of isolating chip 11U21 are CAN control bus output end, and 8 feet of isolating chip 11U21 connect Output end+the 5V, capacitor 11C6 connect between 1 foot and ground of isolating chip 11U21, and capacitor 11C7 connects in isolating chip Between 8 feet and ground of 11U21.

The data/address bus includes the first data/address bus DWKZ0 to the 8th data/address bus DWKZ7, the 9th data/address bus WKWRZ, the tenth data/address bus WKOEZ, data bus power line and data/address bus ground wire；Data bus power line connects+5V power supply, Data/address bus is ground wire grounded；

The 1st slave terminal includes slave key control unit, slave isolation card, slave Power Management Unit, the 1st total Lane controller and the 1st flames of war relay are from modular circuit；

Slave key control unit is identical as the key control unit structure of the data interaction smart host terminal；It is described Slave Power Management Unit is identical as the Power Management Unit structure of data interaction smart host terminal；

The slave isolation card, the 1st bus control unit and the 1st flames of war relay from modular circuit respectively with the slave core The corresponding port of heart control unit is connected；

External power supply power supply is by slave Power Management Unit to slave key control unit, slave isolation card, the 1st bus Controller and the 1st flames of war relay are powered from modular circuit；

1st bus control unit is made of chip 13U7 and resistance 13R1；The model of the chip 13U7 1 foot of 74HC245, chip 13U7 are connected on the 9th data/address bus WKWRZ of data/address bus；- 9 foot of 2 foot of chip 13U7 is distinguished Connect 93 feet, 10 feet to 15 feet, 132 feet of the embedded chip 1U1；10 feet of chip 13U7 are grounded；18 feet of chip 13U7 On the first data/address bus DWKZ0 to the 8th data line DWKZ7 for being coupled with data/address bus to 11 feet；20 feet of chip 13U7 connect + 5V power supply；The resistance 13R1 connects between 19 feet and 20 feet of chip 13U7；

The 1st flames of war relay is from modular circuit by optocoupler 13U1, chip 13U2, chip 13U3, chip 13U4, constant-current source 13D1-13D2, triode 13Q01, potentiometer 13RJ01, resistance 13R11-13R13, resistance 13R21-13R25 and capacitor 13C11-13C14 composition；The model LM393 of the model TLP281-4 of the optocoupler 13U1, chip 13U2, chip 13U3's The model S-102T of the model 74HB74 of model CN5710, chip 13U4, constant-current source 13D1-13D2, triode 13Q1 Model 8550；5 feet of the optocoupler 13U1 are signal input part of the 1st flames of war relay from modular circuit through constant-current source 13D2 FHn-1,7 feet of optocoupler 13U1 connect the input terminal of constant-current source 13D1 through potentiometer 13RJ01, and the output end of constant-current source 13D1 is the 1st Flames of war relay connects from the input end of clock CLK of modular circuit, the 1st flames of war relay from the input end of clock CLK of modular circuit The clock output port FHCLK of the flames of war relay main module circuit；1 foot of optocoupler 13U1 connects the chip through resistance 13R13 2 feet of 5 feet of 13U4, optocoupler 13U1 are connected with 3 feet, 4 feet of optocoupler 13U1,6 feet, 8 feet ground connection, the 9 feet warp of optocoupler 13U1 Resistance 13R11 ground connection, 11 feet of optocoupler 13U1 are grounded through resistance 13R12,10 feet, 12 feet of optocoupler 13U1 connect the output end+ 5V, capacitor 13C12 connect between 9 feet and 12 feet of optocoupler 13U1, capacitor 13C11 connect 11 feet of optocoupler 13U1 and 12 feet it Between, 15 feet, 16 feet of optocoupler 13U1 connect 13 feet, 14 feet of optocoupler 12U1 in the flames of war relay main module circuit respectively； 15 feet of optocoupler 13U1 connect 10 feet of chip 13U7, and 16 feet of the optocoupler 13U1 connect 19 feet of chip 13U7；The chip 2 feet, 3 feet of 13U4 connect 11 feet of optocoupler 13U1,9 feet respectively, 1 foot, 4 feet, 14 feet of chip 13U4 connect the output end+ 5V；The node of resistance 13R22 and resistance 13R21 connects 7 feet of chip 13U2, and 7 feet of chip 13U2 connect the 1 of the chip 13U3 5 feet of foot, chip 13U2 are grounded through resistance 13R24, and 5 feet of chip 13U2 connect 13 feet of optocoupler 13U1,2 feet of chip 13U2,3 Foot, 4 feet are grounded；3 feet of the chip 13U3 are grounded through resistance 13R25, and 5 feet of chip 13U3 are that flames of war relay is electric from module The output terminal of clock CLK on road, the flames of war relay connect the input terminal of constant-current source 13D1 from the output terminal of clock CLK of modular circuit； The base stage of the triode 13Q01 connects 14 feet of optocoupler 13U1, and the emitter of triode 13Q01 connects the output end+5V, three poles The extremely flames of war relay of the current collection of pipe 13Q01 is from the signal output end CFHn of modular circuit, and the 1st flames of war relay is from modular circuit Signal output end CFHn connect the flames of war relay of the 2nd slave terminal from the signal input part of modular circuit；

18 feet of the chip 2U7 of I/O expansion bus communication circuitry to 11 feet are distinguished in the data interaction smart host terminal It is connected on the first data/address bus DWKZ0 to the 8th data/address bus DWKZ7 of data/address bus；The data interaction smart host terminal 8 feet and 11 feet of the 2U6 of middle I/O expansion bus communication circuitry are coupled with the 9th data/address bus WKWRZ and the tenth of data/address bus On data/address bus WKOEZ.

The slave isolation card includes slave AI isolation card circuit and slave AO isolation card circuit, the slave AI isolation card Circuit is identical as AI isolation card circuit structure, and the slave AO isolation card circuit is identical as AO isolation card circuit structure；It is described from Machine AI isolation card circuit is connected with analog signal port to be measured, and the output of slave AI isolation card circuit singly connects slave core The respective input of control unit, the output of slave key control unit terminate the corresponding input of the slave AO isolation card circuit The output at end, slave AO isolation card circuit terminates analog control signal port；The corresponding output of the slave Power Management Unit End connects the power input of slave AI isolation card circuit, slave AO isolation card circuit respectively.

The slave isolation card includes slave DIDO isolation card circuit, and the slave DIDO isolation card circuit is isolated with DIDO Card circuit structure is identical；Slave DIDO isolation card circuit is bi-directionally connected with slave key control unit；The slave DIDO isolation Card circuit is bi-directionally connected with switching signal port；The corresponding output end of the slave Power Management Unit connect the slave DIDO every Power input from card circuit.

The working principle of the present embodiment is as follows：

Circuit theory in relation to control unit：This circuit using address bus and data/address bus multiplex mode, The output end of 1U2,1U3 and the low 16 bit address input terminal (A0 ~ A15) of 1U4 connect, and 1U1 exports read/write address first, and leads to Cross/ADV (137 foot) control 1U2,1U3 be by low 16 bit address（IO0~1O15）It latches, can then be transmitted on IO0 ~ 1O15 pair The data to be read and write of 1U4.Control gating is carried out by 1U1,1U4,1U5,1U7 cannot be used simultaneously；

Key is to provide the function of similar keyboard, can be named as key 1, key 2, and so on, concrete function is by two Determine when secondary exploitation, be only responsible for key code value passing to the application program in system just as Windows system it is the same, as Application program is used to What for, unrelated with Windows system.

The problem of technical problem to be solved in the utility model is the above-mentioned wasting of resources referred to, using a kind of flexible Assembled intelligent terminal meets the various demands of industry spot.

The utility model will realize the interface of transmitting, the acquisition of various signals as basic unit, by core processing unit and The hardware processing element separation of various types of signal is independent component, then carries out the assembly of selectivity according to different needs.This Utility model includes data interaction host terminal and data interaction extension slave terminal.Collect on the mainboard of data interaction host terminal At AI interface, AO interface, DIDO interface, power interface, association's processing unit；Wherein man-machine interaction unit, core processing unit, AI Isolation card, AO isolation card, DIDO isolation card, isolated from power card, serial port expanding module, integrated communication interface card, PWM/ counter every It is connect in a manner of pluggable with mainboard from card, I/O expansion card, in addition to I/O expansion card, can carry out secondary development as needed. Mainboard is that the motherboard of each interface board is integrated with multiple interfaces as computer main board, for carrying various modules.Thereon It is integrated with AI interface, AO interface, DIDO interface, power interface, association's processing unit.Wherein association's processing unit is mainly used for internal letter Number detection and transmitting, man-machine interaction unit for being interacted with user, upgrade procedure etc..The core processing unit with The mode that can be patched is connect with mainboard.The AI isolation card, AO isolation card, DIDO isolation card are for being isolated outer signals.Power supply Isolation card i.e. Power Management Unit, for providing required isolation DC power supply for host.Serial port expanding module is more for providing The serial line interface of function.Integrated communication interface card is for outwardly providing RS232 interface, CAN interface, Ethernet interface, channel radio Believe interface.PWM/ counter isolation card is for providing pwm signal or counting to the pulse signal of input.I/O expansion card is used It is connect in the data/address bus.

Each slave terminal inner includes a flames of war relay from module, which can control total line traffic control from module Device processed, and then the on-off of data interaction slave terminal and data/address bus is controlled, and pass through industrial siding between each flames of war relay module Road communication, to transmit gating signal, thus guarantee that each slave terminal can access data/address bus according to the wish of host terminal, into And data interaction is realized with it.Each flames of war relay module shares clock line, and module select signal line is the cascade of level-one level-one , as relay race, gating signal just as relay baton, be only responsible for relay baton passing to the 1st by peak fire relay main module A flames of war relay is from module, after the data for having handled the 1st slave terminal, sends transmitting signal instruction, the 1st flames of war relay Next flames of war relay is passed to from module from module by relay baton, and so on.And relay baton is transmitting last After a module or relay baton fails and passes to next module, and clock bus can generate termination signal, and main module can be examined The termination signal is surveyed, polling system is determined according to the slave module number set in the quantity and module of the transmitting signal instruction of sending Whether work normally.

Data interaction extends slave terminal by from mainboard, AI isolation card, AO isolation card, DIDO isolation card, bus marco Device, flames of war relay are formed from module.From mainboard be integrated with AI interface, AO interface, DI interface, DO interface, data bus interface, Flames of war relay is from module input interface and output interface；The AI isolation card, AO isolation card, DIDO isolation card are the same as data interaction master Substance of the same name described in machine terminal；

Bus control unit is used to cut off or connect the channel of data interactive expanding slave terminal and data/address bus, most simple Single realization is the power supply for controlling data interaction extension slave terminal data Bus Interface Chip（Only limit the chip when power is off with The case where high-impedance state is presented in the pin of data/address bus docking）.

Claims (9)

1. a kind of pin-connected panel data interaction intelligent terminal system, it is characterised in that：Including data interaction smart host terminal, data Bus, the 1st slave terminal to N slave terminal, wherein N is the integer greater than 1；The 1st slave terminal is to N slave terminal Structure it is identical, the extension form of the 1st slave terminal to N slave terminal is tandem type；The data interaction is intelligently main Machine terminal successively through the 1st slave terminal, the 2nd slave terminal ..., N-1 slave terminal is connected with N slave terminal；It is described Data interaction smart host terminal, the 1st slave terminal to N slave terminal are connected respectively on data/address bus.

2. a kind of pin-connected panel data interaction intelligent terminal system according to claim 1, it is characterised in that：The data are handed over Mutual smart host terminal includes key control unit, DIDO isolation card circuit, AI isolation card circuit, AO isolation card circuit, Xie Chu Manage unit interface circuit, serial ports isolation card circuit, integrated communication card circuit, human-computer interaction circuit, PWM counter isolation board electricity Road, I/O expansion card circuit and Power Management Unit；The corresponding port of the key control unit and the serial ports isolation card circuit It is bi-directionally connected, the serial ports isolation card circuit is bi-directionally connected with rs 232 serial interface signal port to be measured；The key control unit and institute The corresponding port for stating integrated communication card circuit is bi-directionally connected, the integrated communication card circuit and the two-way company in serial digital signal port It connects；The corresponding port of the key control unit and the I/O expansion card circuit is bi-directionally connected, the I/O expansion card circuit and more Performance data interactive intelligence slave terminal prot is bi-directionally connected；The key control unit and association's processing unit interface circuit Corresponding port be bi-directionally connected, it is described association processing unit interface circuit first input end connect intrusion detection and interrupt input signal First output of port, association's processing unit interface circuit terminates the respective input of the human-computer interaction circuit, association's processing The second output terminal of unit interface circuit connects the respective input of the PWM counter isolation board circuit；The human-computer interaction electricity Road and the corresponding port of the key control unit are bi-directionally connected；The key control unit and the PWM counter isolation board The corresponding port of circuit is bi-directionally connected, the corresponding port of pulse signal port to be measured and the PWM counter isolation board circuit It is bi-directionally connected；The output of the key control unit terminates the corresponding port input terminal of the AO isolation card circuit, the AO The output of isolation card circuit terminates analog control signal port；The simulation letter of the input terminal reception measurement of the AI isolation card circuit Number port, the respective input of the output termination key control unit of the AI isolation card circuit；The DIDO isolation card circuit It is bi-directionally connected with the corresponding port of the key control unit, the respective end of the DIDO isolation card circuit and switching signal port Mouth is bi-directionally connected；The output end of the Power Management Unit connect respectively the key control unit, DIDO isolation card circuit, AI every From card circuit, AO isolation card circuit, association processing unit interface circuit, serial ports isolation card circuit, integrated communication card circuit, man-machine friendship The mutually corresponding power port of circuit, PWM counter isolation board circuit, I/O expansion card circuit, the input termination of Power Management Unit External power supply power supply.

3. a kind of pin-connected panel data interaction intelligent terminal system according to claim 2, it is characterised in that：The data are handed over Mutual smart host terminal further includes mainboard and the first to the tenth circuit board；Association's processing unit interface circuit is arranged in mainboard On；The key control unit is arranged on first circuit board；The DIDO isolation card circuit setting is on the second circuit board；AI Isolation card circuit is arranged on tertiary circuit plate；AO isolation card circuit is arranged on the 4th circuit board；Serial ports isolation card circuit is set It sets on the 5th circuit board；Integrated communication card circuit is arranged on the 6th circuit board；Human-computer interaction circuit is arranged in the 7th circuit On plate；PWM counter isolation board circuit is arranged on the 8th circuit board；I/O expansion card circuit is arranged on the 9th circuit board；Electricity Source control unit is arranged on the tenth circuit board；Described first to the tenth circuit board is connected with the mainboard in a plug-in manner.

4. a kind of pin-connected panel data interaction intelligent terminal system according to claim 3, it is characterised in that：The power supply pipe Unit is managed by chip U1, chip U5, chip U8, diode D101, inductance L101, capacitor C101- capacitor C105, resistance R101- Resistance R104 composition；The model APL117-3.3 of the model MP2403 of the chip U1, chip U5, the model of chip U8 The model SS14 of DC1212, diode D101；

2 foot of input pin of the chip U1 meets external power supply power supply WB；3 foot of output pin of chip U1 connects one end of inductance L101, The other end of inductance L101 is output end+5V；Capacitor C101 connects between 2 foot of input pin and ground of chip U1, diode D101 It connects between 3 foot of output pin and ground of chip U1, capacitor C102 connects between 1 foot and 3 feet of chip U1, and 4 feet of chip U1 connect 5 feet on ground, chip U1 meet the output end+5V through resistance R102, and resistance R101 connects between 5 feet and ground of chip U1, capacitor C104 and resistance R103, which is connected in series, to be followed by between 6 feet and ground of chip U1, and capacitor C105 connects between output end+5V and ground, Resistance R104 connects between 7 feet and 2 feet of chip U1, and capacitor C103 connects between 8 feet and ground of chip U1；

The input terminal Vin of the chip U5 meets output end+5V, and the output end vo ut of chip U5 is output end+3.3V, chip U5's Ground terminal ground connection；

2 foot of input pin of the chip U8 meets external power supply power supply WB, and 1 foot of chip U8 and 3 feet are grounded, and 4 feet of chip U8 are Output end+12V；

The key control unit includes embedded chip 1U1 and its peripheral component switch 1S2, crystal oscillator 1Y101-1Y102, electricity Hinder 1R101-1R103, capacitor 1C101-1C107, data latches 1U2-1U3 and phase inverter chip 1U8；The embedded chip 1U1 is to implant the embedded chip of the model STM32F103ZET6 of the miniature frame of .Net Micro Framwork, described The reset circuit of switch 1S2, resistance 1R103 and capacitor 1C105 composition connects between 25 feet and ground of embedded chip 1U1, institute The first crystal oscillating circuit for stating crystal oscillator 1Y102, resistance 1R102 and capacitor 1C103-1C104 composition connects the 23 of embedded chip 1U1 Between foot and 24 feet, the second crystal oscillating circuit of the crystal oscillator 1Y101, resistance 1R101 and capacitor 1C101-1C102 composition is connect embedding Enter between 8 feet and 9 feet of formula chip 1U1；The model 74HC573 of the data latches 1U2-1U3, the data latches - 9 foot of 2 foot of input pin of 1U2 connects -85 foot of 86 foot, -115 foot of 114 foot, -60 foot of 58 foot, 63 of the embedded chip 1U1 respectively Foot, the 10 feet ground connection of data latches 1U2,20 feet of data latches 1U2 meet the output end+3.3V；The data latch - 9 foot of 2 foot of input pin of device 1U3 connects -68 foot of 64 foot of the embedded chip 1U1, -79 foot of 77 foot, data latches respectively 10 feet of 1U3 are grounded, and 20 feet of data latches 1U3 meet the output end+3.3V；The model of the phase inverter chip 1U8 74LVC2G04,1 foot of the phase inverter chip 1U8 meet 137 feet of the embedded chip 1U1, the phase inverter chip 1U8 3 feet connect 110 feet of the embedded chip 1U1,6 feet of the phase inverter chip 1U8 connect data latches 1U2 11 feet and 11 feet of data latches 1U3, phase inverter chip 1U8 2 feet ground connection, 5 feet of phase inverter chip 1U8 connect the output end+ 3.3V；

The key control unit further includes chip 1U4, chip 1U5, chip 1U7；

The model of the chip 1U4 extends out sram chip SRAM-IS62WV51216BLL, -10 foot of 7 foot of the chip 1U4, - 16 foot of 13 foot, -32 foot of 29 foot, -38 foot of 35 foot connect respectively -85 foot of 86 foot of the embedded chip 1U1, -115 foot of 114 foot, - 60 foot of 58 foot, -68 foot of 63 foot, -79 foot of 77 foot；- 1 foot of 5 foot, -42 foot of 44 foot, -24 foot of 27 foot, 22 feet-of the chip 1U4 19 feet connect -12 foot of 19 foot of output pin of the data latches 1U2, -12 foot of 19 foot of output pin of data latches 1U3 respectively； 18 feet, 23 feet, 28 feet of the chip 1U4 connect -82 foot of 80 foot of the embedded chip 1U1 respectively；The 6 of the chip 1U4 Foot, 17 feet, -41 foot of 39 foot connect 123 feet, 119 feet, -42 foot of 41 foot, 118 feet of the embedded chip 1U1 respectively；Chip 1U4 11 foot of power end and 33 feet meet the output end+3.3V, capacitor 1C401 connects between 11 feet and ground of chip 1U4, capacitor 1C402 connects between 33 feet and ground of chip 1U4, resistance 1R401 connect chip 1U4 6 feet and the output end+3.3V it Between；

The model of the chip 1U5 extends out FLASH chip MX29LV320,29 feet, 31 feet, 33 feet, 35 of the chip 1U5 Foot, 38 feet, 40 feet, 42 feet, 44 feet, 30 feet, 32 feet, 34 feet, 36 feet, 39 feet, 41 feet, 43 feet, 45 feet connect the insertion respectively - 85 foot of 86 foot, -115 foot of 114 foot, -60 foot of 58 foot, -68 foot of 63 foot, -79 foot of 77 foot of formula chip 1U1；The chip 1U5's - 18 foot of 25 foot, -1 foot of 8 foot connect -12 foot of 19 foot of output pin of the data latches 1U2, the output of data latches 1U3 respectively - 12 foot of 19 foot of foot；48 feet, -16 foot of 17 foot, -10 foot of 9 foot of the chip 1U5 connects the 80 of the embedded chip 1U1 respectively - 82 foot of foot, -3 foot of 2 foot；11 feet, 12 feet, 15 feet, 28 feet, 26 feet of the chip 1U5 meet the embedded chip 1U1 respectively 119 feet, 25 feet, 122 feet, 118 feet, 125 feet；14 feet of the chip 1U5 meet the output end+3.3V through resistance 1R502, 15 feet of the chip 1U5 meet the output end+3.3V through resistance 1R501,37 feet of the chip 1U5 connect the output end+ 3.3V, filter capacitor 1C501 connect between 37 feet and ground of chip 1U5；

The chip 1U7 is outer extension memory MT29F1G08, -32 foot of 29 foot, -44 foot of 41 foot, 26 feet -28 of the chip 1U7 Foot, 33 feet, 40 feet, -47 foot of 45 foot connect -85 foot of 86 foot of the embedded chip 1U1, -115 foot of 114 foot, 58 feet -60 respectively Foot, -68 foot of 63 foot, -79 foot of 77 foot；7 feet, 8 feet, 9 feet, 18 feet of the chip 1U7 connect the embedded chip 1U1's respectively 122 feet, 118 feet, 124 feet, 119 feet；- 17 foot of 16 foot of the chip 1U7 connects 81 feet-of the embedded chip 1U1 respectively 80 feet；19 feet of the chip 1U7 connect 14 feet of the chip 1U5；12 feet, 34 feet, 37 feet, 39 feet of the chip 1U7 are equal Output end+the 3.3V is met, capacitor 1C701 connects between 12 feet and ground of chip 1U7.

5. a kind of pin-connected panel data interaction intelligent terminal system according to claim 4, it is characterised in that：

The I/O expansion card circuit includes I/O expansion bus communication circuitry and flames of war relay main module circuit；The I/O expansion bus Telecommunication circuit is by optocoupler 2U5, NAND gate 2U6, optocoupler 2U1 to 2U4, chip 2U7 to 2U8, exclusion 2RP101 to 2RP104 and electricity Hinder 2R501 to 2R506 composition；The model 74HC00 of the model TLP281-2 of the optocoupler 2U5, NAND gate 2U6, optocoupler The model 74HC245 of the model TLP281-4 of 2U1 to 2U4, chip 2U7 to 2U8；

The flames of war relay main module circuit is by chip 12U4, amplifier 12U3, optocoupler 12U1, chip 12U2, chip 12U5, perseverance Stream source 12U6, triode 12Q01- triode 12Q03, potentiometer 12RJ01, resistance 12R11- resistance 12R15, resistance 12R31- Resistance 12R35, resistance 12R22- resistance 12R27 and capacitor 12C31- capacitor 12C33 composition；The model of the chip 12U4 The model TLP281-4 of the model LM358 of 74HC74, amplifier 12U3, optocoupler 12U1, the model of chip 12U2 The model E-102T of the model CN5710 of LM393, chip 12U5, constant-current source 12U6；

The serial ports isolation card circuit includes first to fourth serial ports isolation card circuit；The first to fourth serial ports isolation card electricity Line structure is identical；Wherein first serial isolation card electricity router chip 10U1 to chip 10U7, number triode 10Q3 to number three Pole pipe 10Q5, diode 10D1, resistance 10R51 to resistance 10R59 and capacitor 10C11 to capacitor 10C21 composition；The chip The model SN75179B of the model MAX485 of the model MAX232 of 10U1, chip 10U2, chip 10U3, chip 10U4's The model ADUM1201ARZ of the model TLP281-2 of model XC6401, chip 10U5, chip 10U6, chip 10U7's Model DC-DC05；The triode 10Q3, triode 10Q4 are positive-negative-positive number triode, and triode 10Q5 is NPN type number Word triode；Diode 10D1 is common cathode polar form diode；The second road serial ports isolation card electricity router chip 2-10U1 is to core Piece 2-10U7, number triode 2-10Q3 to digital triode 2-10Q5, diode 2-10D1, resistance 2-10R51 to resistance 2- 10R59 and capacitor 2-10C11 to capacitor 2-10C21 composition；The third road serial ports isolation card electricity router chip 3-10U1 is to core Piece 3-10U7, number triode 3-10Q3 to digital triode 3-10Q5, diode 3-10D1, resistance 3-10R51 to resistance 3- 10R59 and capacitor 3-10C11 to capacitor 3-10C21 composition；The 4th road serial ports isolation card electricity router chip 4-10U1 is to core Piece 4-10U7, number triode 4-10Q3 to digital triode 4-10Q5, diode 4-10D1, resistance 4-10R51 to resistance 4- 10R59 and capacitor 4-10C11 to capacitor 4-10C21 composition；

The AI isolation card circuit includes the first AI isolation circuit and the 2nd AI isolation circuit；The first AI isolation circuit and Two AI isolation circuit structures are identical；The first AI isolation circuit is by amplifier 4U1, amplifier 4U2, resistance 4R11-4R18, electricity Hinder 4R21- resistance 4R28, resistance 4R31- resistance 4R38, capacitor 4C11-4C12 and exclusion 4RP511-4RP512 composition；It is described to put Big device 4U1, amplifier 4U2 model be LM324；

The AO isolation card electricity routing amplifier 5U1, triode 5Q1-5Q2, resistance 5R1-5R12 and capacitor 5C1-5C2 composition； The model LM324 of the amplifier 5U1；

Association's processing unit circuit is made of parallel-serial conversion input circuit and serioparallel exchange output circuit；The parallel-serial conversion is defeated Enter electric router chip 6U1, chip 6U5 to chip 6U7, chip 6UA to chip 6UB, triode 6Q701-6Q702, triode 6Q602, resistance 6R701-6R708, resistance 6R601-6R603 and capacitor 6C701-6C702, capacitor 6C601-6C605 composition；Institute State the model TLP281-2 of chip 6U1, the model 74HC165 of the chip 6U5 to chip 6U6, the model of chip 6U7 The model 74HC86 of the model 74HC165 of BL1551, chip 6UA, chip 6UB；

The serioparallel exchange output circuit is by chip 7U1 to chip 7U5, chip 7U8 to chip 7U9, capacitor 7C701 to capacitor 7C705 and capacitor 7C708 to capacitor 7C709 composition；The model 74HC594 of the chip 7U1 to chip 7U5, chip 7U9, The model 74HC139 of the chip 7U8；

2 feet, 4 feet of the optocoupler 2U5 of the I/O expansion bus communication circuitry are grounded, and 6 feet and 8 feet of optocoupler 2U5 connect described defeated 5 feet, 7 feet of outlet+5V, optocoupler 2U5 are grounded through resistance 2R504, resistance 2R503 respectively；1 foot of the NAND gate 2U6,5 feet, 10 feet, -14 foot of 13 foot meet the output end+5V, and 3 feet of NAND gate 2U6 are connect with 12 feet, and 6 feet of NAND gate 2U6 and 9 feet connect It connects, 2 feet of NAND gate 2U6 connect 7 feet of the optocoupler 2U5, and 4 feet of NAND gate 2U6 connect 5 feet of the optocoupler 2U5；

Optocoupler 2U1 to 2U2, chip 2U7, exclusion 2RP101 to 2RP102 form signal output apparatus；The exclusion 2RP101 is extremely 93 feet, 10-15 foot, 132 feet of a termination embedded chip 1U1 of 2RP102, the exclusion 2RP101 is to 2RP102's The other end successively connects 1 foot, 3 feet, 5 feet, 7 feet of the optocoupler 2U1,1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2U2；The optocoupler 2U1 2 feet, 4 feet, 6 feet, 8 feet, 2 feet, 4 feet, 6 feet, 8 feet of 2U2 are grounded；16 feet, 14 feet, 12 feet, 10 of the optocoupler 2U1 Foot, 16 feet, 14 feet, 12 feet, 10 feet of 2U2 meet the output end+3.3V；15 feet, 13 feet, 11 feet, 9 of the optocoupler 2U1 Foot, 15 feet, 13 feet, 11 feet, 9 feet of 2U2 successively connect -9 foot of 2 foot of chip 2U7；1 foot and 20 feet of the chip 2U7 meets institute Output end+3.3V is stated, 19 feet of chip 2U7 connect 6 feet of NAND gate 2U6；

Optocoupler 2U3 to 2U4, chip 2U8, exclusion 2RP103 to 2RP06 form signal input circuit；The exclusion 2RP103 is extremely One end of 2RP104 successively connects -11 foot of 18 foot of chip 2U7, and the other end of the exclusion 2RP103 to 2RP104 successively connects described 1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2U3,1 foot, 3 feet, 5 feet, 7 feet of optocoupler 2U4；2 feet, 4 feet, 6 feet, 8 of the optocoupler 2U3 Foot, 2 feet, 4 feet, 6 feet, 8 feet of 2U4 are grounded；16 feet, 14 feet, 12 feet, 10 feet of the optocoupler 2U3,16 feet of 2U4,14 Foot, 12 feet, 10 feet meet the output end+3.3V；15 feet, 13 feet, 11 feet, 9 feet of the optocoupler 2U3,15 feet of 2U4,13 Foot, 11 feet, 9 feet successively connect -9 foot of 2 foot of chip 2U8；1 foot and 20 feet of the chip 2U8 meets the output end+3.3V, 19 feet of chip 2U8 connect 4 feet of the chip 7U9 of the serioparallel exchange output circuit of association's processing unit interface circuit；The 18 of chip 2U8 - 11 foot of foot successively connects 93 feet, 10-15 foot, 132 feet of the embedded chip 1U1, and -9 foot of 2 foot of chip 2U8 is through exclusion 2RP105,2RP106 ground connection；

12 feet of the chip 12U4 connect 49 feet of embedded chip 1U1, and 11 feet of chip 12U4 connect the 50 of embedded chip 1U1 Foot, 5 feet of chip 12U4 are the feedback signal FHFK of flames of war relay main module circuit, 1 foot, 4 feet, 10 feet, 13 of chip 12U4 Foot, 14 feet meet the output end+3.3V, and 2 feet of chip 12U4 are grounded through resistance 12R14, and 3 feet of chip 12U4 connect three pole The collector of pipe 12Q03；The collector of the triode 12Q03 connects the output end+3.3V, base stage warp through resistance 12R34 Resistance 12R33 connects 7 feet of the amplifier 12U3, the emitter ground connection of triode 12Q03, and capacitor 12C32 connects in triode Between the base stage and ground of 12Q03；1 foot of the amplifier 12U3 meets 6 feet of the optocoupler 12U1, resistance 12R31, resistance 12R32, which is connected in series, to be followed by between the output end+3.3V and ground, the equal connecting resistance 12R31 of 2 feet and 6 feet of amplifier 12U3 with The node of resistance 12R32,7 feet of amplifier 12U3 connect 7 feet of the optocoupler 12U1；3 feet of amplifier 12U3 connect the chip 12 feet of 12U4,5 feet of amplifier 12U3 connect 11 feet of the chip 12U4；3 feet of the optocoupler 12U1 connect the chip 9 feet of 12U4,1 foot of optocoupler 12U1 meet the collector of triode 12Q02, resistance 12R25, resistance through the potentiometer 12RJ01 12R24, which is connected in series, to be followed by between 7 feet and ground of the 12U2, the base stage connecting resistance 12R25 and resistance of triode 12Q02 The node of 12R24, the emitter ground connection of triode 12Q02,2 feet of optocoupler 12U1 are grounded through constant-current source 12U6, and the 4 of optocoupler 12U1 Foot is connected with 5 feet of optocoupler 12U1, and 8 feet of optocoupler 12U1 are grounded through resistance 12R15, and 9 feet of optocoupler 12U1 are through resistance 12R13 Ground connection, 11 feet of optocoupler 12U1 are grounded through resistance 12R12, and 10 feet, 16 feet of optocoupler 12U1 meet+5V, and 15 feet of optocoupler 12U1 connect 2 feet of the chip 12U4；5 feet of the chip 12U2 connect 11 feet of the optocoupler 12U1, and 7 feet of chip 12U2 are through resistance 12R26 meets the output end+5V, and 1 foot of chip 12U2 connects the output end+5V, 6 feet of chip 12U2 and 2 through resistance 12R23 Foot is connected, and 3 feet of chip 12U2 connect 9 feet of the optocoupler 12U1；1 foot of the chip 12U5 connects the 1 of the chip 12U2 3 feet of foot, chip 12U5 are grounded through resistance 12R27, and 5 feet of chip 12U5 connect the collector of the triode 12Q02, chip 5 feet of 12U5 are the clock output port FHCLK of flames of war relay main module circuit；The base stage of the triode 12Q01 connects described 12 feet of optocoupler 12U1, resistance 12R21, resistance 12R22, which are connected in series, to be followed by between the output end+5V and ground, chip 12U2 2 foot connecting resistance 12R21 and resistance 12R22 node, the letter of the current collection of triode 12Q01 extremely flames of war relay main module circuit Number sending port FHn；

2 feet of the chip 10U7 of the first serial isolation card circuit meet the output end+5V, first serial isolation card circuit 1 foot of chip 10U7 is grounded, and 3 feet of the chip 10U7 of first serial isolation card circuit are to export isolator, first serial isolation 4 feet of the chip 10U7 of card circuit are the isolated power supply of output, and 2 feet of the chip 10U4 connect 4 feet of the chip 10U7, core 1 foot of piece 10U4 connects 4 feet of the chip 10U7 through resistance 10R59, and the collector of digital triode 10Q5 connects the 1 of chip 10U4 Foot, the base stage of triode 10Q5 connect 3 feet of chip 10U4, and the emitter of triode 10Q5 connects 3 feet of chip 10U7, capacitor 10C21 connects between the collector of triode 10Q5 and 3 feet of chip 10U7；6 feet of chip 10U4 are first via output end 4 feet of VCC1, chip 10U4 are the second road output end VCC2, and 5 feet of chip 10U4 connect 3 feet of chip 10U7, the 6 of chip 10U4 Foot connects the first anode of the diode 10D1, and 4 feet of chip 10U4 connect the second plate of the diode 10D1, diode The cathode of 10D1 is output end VCC0, and capacitor 10C19 connects between 6 feet of chip 10U4 and 3 feet of chip 10U7, capacitor 10C20 connects between 4 feet of chip 10U4 and 3 feet of chip 10U7；

2 feet of the chip 10U6 connect 101 feet of the embedded chip 1U1, and 3 feet of chip 10U6 connect the embedded chip 102 feet of 1U1,1 foot of chip 10U6 meet the output end+5V, and resistance 10R57 connects between 2 feet and 7 feet of chip 10U6, Resistance 10R58 connects between 3 feet and 6 feet of chip 10U6, and 8 feet of chip 10U6 meet the output end VCC0, and capacitor 10C18 connects Between 1 foot of chip 10U6 and 3 feet of chip 10U7, capacitor 10C17 connects 3 feet of 8 feet and chip 10U7 in chip 10U6 Between；The emitter of the triode 10Q3 meets the output end VCC0, and the base stage of triode 10Q3 connects the 8 of the chip 10U5 Foot, the collector of triode 10Q3 connect 3 feet of chip 10U7 through resistance 10R53, and the emitter of the triode 10Q4 connects described Output end VCC0, the base stage of triode 10Q4 connect 6 feet of the chip 10U5, and the collector of triode 10Q4 is through resistance 10R54 3 feet of chip 10U7 are connect, the collector of triode 10Q4 connects 3 feet of the chip 10U4；1 foot of the chip 10U5 is through resistance 10R55 connects 1 foot of 7U9, and 3 feet of chip 10U5 connect 15 feet of 7U1 through resistance 10R56, and the collector of triode 10Q3 is through resistance 10R51 connects 15 feet of 7U9, and the collector of triode 10Q4 connects 15 feet of 7U1,2 feet, 4 feet, 5 of chip 10U5 through resistance 10R52 Foot, 7 feet connect 3 feet of chip 10U7；1 foot of the chip 10U2 connects 7 feet of chip 10U6,2 feet and 3 of the chip 10U2 Foot, which is connected, is followed by the collector of triode 10Q3, and 4 feet of chip 10U2 connect 6 feet of chip 10U6, and 8 feet of chip 10U2 meet institute Output end VCC2 is stated, capacitor 10C16 connects between 8 feet of chip 10U2 and 3 feet of chip 10U7；1 foot of the chip 10U3 The output end VCC2 is met, 2 feet of chip 10U3 connect 1 foot of chip 10U2, and 3 feet of chip 10U3 connect 4 feet of chip 10U2, core 7 feet of piece 10U3 connect 7 feet of chip 10U2, and 8 feet of chip 10U3 connect 6 feet of chip 10U2；11 feet of the chip 10U1 connect 3 feet of chip 10U3,12 feet of chip 10U1 connect 2 feet of chip 10U3, and 13 feet of chip 10U1 connect 7 feet of chip 10U3, core 14 feet of piece 10U1 connect 8 feet of chip 10U3, and capacitor 10C13 connects between 1 foot and 3 feet of chip 10U1, and capacitor 10C15 connects Between 4 feet and 5 feet of chip 10U1,16 feet of chip 10U1 meet the output end VCC1, and capacitor 10C11 connects chip 10U1's Between 16 feet and 3 feet of chip 10U7, capacitor 10C12 is connect between 2 feet of chip 10U1 and 3 feet of chip 10U7, capacitor 10C14 connects between 6 feet of chip 10U1 and 3 feet of chip 10U7；

2 feet of the chip 2-10U6 of the second serial isolation card circuit meet 37 feet of the embedded chip 1U1, chip 2- 3 feet of 10U6 connect 36 feet of the embedded chip 1U1, and 3 feet of chip 2-10U5 connect 2 feet of 7U1,1 foot of chip 2-10U5 Connect 1 foot of the 7U9；2 feet of the chip 3-10U6 of the third serial ports isolation card circuit connect the 70 of the embedded chip 1U1 Foot, 3 feet of chip 3-10U6 connect 69 feet of the embedded chip 1U1, and 3 feet of chip 3-10U5 connect 4 feet of the 7U1, core 1 foot of piece 3-10U5 connects 2 feet of the 7U9；2 feet of the chip 4-10U6 of the 4th serial ports isolation card circuit connect the insertion 112 feet of formula chip 1U1,3 feet of chip 4-10U6 connect 111 feet of the embedded chip 1U1, and 3 feet of chip 4-10U5 connect 1 foot of 6 feet of the 7U1, chip 4-10U5 connects 3 feet of the 7U9；

The DIDO isolation card circuit includes DIDO isolation circuit, DI isolation circuit, DO isolation circuit and DO driving circuit；

The DO driving circuit includes the first DO driving circuit to the 8th DO driving circuit, the first DO driving circuit to the 8th DO driving circuit structure is identical；The first DO driving circuit is by triode Q1-Q2, light emitting diode DS1, diode D2, electricity Hinder R2-R3 composition；The collector of the triode Q1 successively meets external drive power supply WV, triode Q1 through resistance R3, resistance R2 Current collection extremely output pin O+, connect switching signal port, the output pin O- of transmitting extremely the first DO driving circuit of triode Q1, The base stage of triode Q1 connects the collector of the triode Q2；The emitter of the triode Q2 connects external drive electricity through resistance R2 The base stage of source WV, triode Q2 are the input pin OC+ of the first DO driving circuit；The diode D2 connects in external driving power WV Between the output pin O+, the light emitting diode DS1 is connect between the emitter and the input pin OC+ of triode Q2；

The 2nd DO driving circuit is by triode 2-Q1 to 2-Q2, light emitting diode 2-DS1, diode 2-D2, resistance 2-R2 It is formed to 2-R3；The current collection of triode 2-Q1 extremely output pin O+ connects switching signal port, the transmitting of triode 2-Q1 extremely The base stage of the output pin O- of two DO driving circuits, triode 2-Q2 are the input pin OC+ of the 2nd DO driving circuit；3rd DO Driving circuit is made of triode 3-Q1 to 3-Q2, light emitting diode 3-DS1, diode 3-D2, resistance 3-R2 to 3-R3；Three poles The current collection of pipe 3-Q1 extremely output pin O+ connects switching signal port, transmitting extremely the 3rd DO driving circuit of triode 3-Q1 The base stage of output pin O-, triode 3-Q2 are the input pin OC+ of the 3rd DO driving circuit；The 4th DO driving circuit is by three poles Pipe 4-Q1 to 4-Q2, light emitting diode 4-DS1, diode 4-D2, resistance 4-R2 to 4-R3 composition；The collector of triode 4-Q1 For output pin O+, switching signal port, the output pin O- of transmitting extremely the 4th DO driving circuit of triode 4-Q1, triode are connect The base stage of 4-Q2 is the input pin OC+ of the 4th DO driving circuit；The 5th DO driving circuit is by triode 5-Q1 to 5-Q2, hair Optical diode 5-DS1, diode 5-D2, resistance 5-R2 to 5-R3 composition；The current collection of triode 5-Q1 extremely output pin O+, connects out OFF signal port, the output pin O- of transmitting extremely the 5th DO driving circuit of triode 5-Q1, the base stage of triode 5-Q2 are the The input pin OC+ of five DO driving circuits；The 6th DO driving circuit by triode 6-Q1 to 6-Q2, light emitting diode 6-DS1, Diode 6-D2, resistance 6-R2 to 6-R3 composition；The current collection of triode 6-Q1 extremely output pin O+, connects switching signal port, and three The output pin O- of transmitting extremely the 6th DO driving circuit of pole pipe 6-Q1, the base stage of triode 6-Q2 are the 6th DO driving circuit Input pin OC+；The 7th DO driving circuit is by triode 7-Q1 to 7-Q2, light emitting diode 7-DS1, diode 7-D2, electricity Hinder 7-R2 to 7-R3 composition；The current collection of triode 7-Q1 extremely output pin O+, connects switching signal port, the transmitting of triode 7-Q1 The base stage of the extremely output pin O- of the 7th DO driving circuit, triode 7-Q2 are the input pin OC+ of the 7th DO driving circuit；It is described 8th DO driving circuit is by triode 8-Q1 to 8-Q2, light emitting diode 8-DS1, diode 8-D2, resistance 8-R2 to 8-R3 group At；The current collection of triode 8-Q1 extremely output pin O+ connects switching signal port, the transmitting of triode 8-Q1 extremely the 8th DO driving The base stage of the output pin O- of circuit, triode 8-Q2 are the input pin OC+ of the 8th DO driving circuit；

The DO isolation circuit includes the first DO isolation circuit and the 2nd DO isolation circuit；The 2nd DO isolation circuit and first The structure of DO isolation circuit is identical；The first DO isolation circuit is by optocoupler 3U1, exclusion 3RP1, light emitting diode 3DO1-3DO4 Composition；2 feet, 4 feet, 6 feet, 8 feet of optocoupler 3U1 are grounded after being connected, and 1 foot, 3 feet, 5 feet, 7 feet of optocoupler 3U1 pass through luminous two respectively Pole pipe 3DO1-3DO4, which runs in, hinders one end of 3RP1, the other end of exclusion 3RP1 be the first DO isolation circuit input terminal 3MDKI0 ~ 16 feet, 14 feet, 12 feet, 10 feet of 3MDKI3, optocoupler 3U1 connect the input of the first DO driving circuit to the 4th DO driving circuit respectively 15 feet, 13 feet, 11 feet, 9 feet of foot OC+, optocoupler 3U1 connect the output pin of the first DO driving circuit to the 4th DO driving circuit respectively O-；

The 2nd DO isolation circuit is made of optocoupler 2-3U1, exclusion 2-3RP1, light emitting diode 2-3DO1 to 2-3DO4；Light 1 foot, 3 feet, 5 feet, 7 feet of coupling 2-3U1 run in through light emitting diode 2-3DO1 to 2-3DO4 respectively hinders one end of 2-3RP1, exclusion The other end of 2-3RP1 is input terminal 3MDKI0 ~ 3MDKI3 of the 2nd DO isolation circuit, 16 feet of the optocoupler 2-3U1,14 feet, 12 feet, 10 feet connect the input pin OC+ of the 5th DO driving circuit to the 8th DO driving circuit, 15 feet of optocoupler 2-3U1,13 respectively Foot, 11 feet, 9 feet meet the output pin O- of the 5th DO driving circuit to the 8th DO driving circuit respectively；

The DI isolation circuit includes the first DI isolation circuit and the 2nd DI isolation circuit；The 2nd DI isolation circuit and first The structure of DI isolation circuit is identical；The first DI isolation circuit is by optocoupler 3U5, exclusion 3RP3-3RP4, light emitting diode 3DI1-3DI4 composition；2 feet, 4 feet, 6 feet, 8 feet of optocoupler 3U5, which are connected, is followed by the common end of switching signal, 1 foot of optocoupler 3U5,3 Foot, 5 feet, 7 feet connect four-way switch signal port through exclusion 3RP4, light emitting diode 3D11-3D14 respectively, 10 feet of optocoupler 3U5, 12 feet, 14 feet, 16 feet, which are connected, is followed by the output end+3.3V, and 15 feet, 13 feet, 11 feet, 9 feet of optocoupler 3U5 connect through exclusion 3RP3 Ground, 15 feet, 13 feet, 11 feet, 9 feet of optocoupler 3U5, respectively signal output end 3MDKO0 ~ 3MDKO3 of the first DI isolation circuit； The 2nd DI isolation circuit is by optocoupler 2-3U5, exclusion 2-3RP3 to 2-3RP4, light emitting diode 2-3DI1 to 2-3DI4 group At；15 feet, 13 feet, 11 feet, 9 feet of the optocoupler 2-3U5, the respectively signal output end 3MDKO0 of the 2nd DI isolation circuit ~ 3MDKO3；

The DIDO isolation circuit is made of chip 3U2-3U3, digital triode 3Q1, resistance 3R1, capacitor 3C1-3C2, chip 20 feet of 3U2-3U3 meet the output end+3.3V, and 10 feet of chip 3U2-3U3 are grounded, and 19 feet of chip 3U2 connect chip 11 feet of 7U8, -11 foot of 18 foot of chip 3U2 connect -9 foot of 2 foot of chip 3U3, and -11 foot of 18 foot of chip 3U2 connects described embedding respectively Enter 56-57 foot, the 87-92 foot of formula chip 1U1,1 foot of chip 3U2 connects 5 feet of chip 7U9, and -5 foot of 2 foot of chip 3U2 connects - 9 foot of 6 foot of signal output end 3MDKO0 ~ 3MDKO3 of one DI isolation circuit, chip 3U2 connect the signal of the 2nd DI isolation circuit Output end 3MDKO0 ~ 3MDKO3；1 foot of chip 3U3 connects 3 feet of chip 7U5, and 11 feet connect the collector of digital triode 3Q1, core - 16 foot of 19 foot of piece 3U3 meets input terminal 3MDKI0 ~ 3MDKI3 of the first DO isolation circuit, and -12 foot of 15 foot of chip 3U3 connects The base stage of the input terminal 3MDKI0 ~ 3MDKI3, digital triode 3Q1 of two DO isolation circuits connect 1 foot of chip 3U2, digital three poles The emitter of pipe 3Q1 connects 19 feet of chip 3U2, and resistance 3R1 connects between 11 feet and ground of chip 3U3, and capacitor 3C1 connects in chip Between 20 feet and ground of 3U2, capacitor 3C2 is connect between 20 feet and ground of chip 3U3；

The amplifier 4U1 of the first AI isolation circuit, the model of amplifier 4U2 are LM324, and the amplifier 4U1's is same 3 foot of noninverting input of the analog signal port to be measured to 3 foot of input terminal, amplifier 4U1 is grounded through resistance 4R31, amplifier 2 foot of reverse input end of 4U1 is grounded through resistance 4R12, and 1 foot of output end of amplifier 4U1 connects amplifier through feedback resistance 4R11 2 foot of reverse input end of 4U1；The analog signal port of 5 foot of the noninverting input reception measurement of the amplifier 4U1, amplifier 5 foot of noninverting input of 4U1 is grounded through resistance 4R32, and 6 foot of reverse input end of amplifier 4U1 is grounded through resistance 4R14, amplification 7 foot of output end of device 4U1 connects 6 foot of reverse input end of amplifier U1 through feedback resistance 4R13；The amplifier 4U1's is in the same direction defeated Enter the analog signal port of end 10 feet reception measurement, 10 foot of noninverting input of amplifier 4U1 is grounded through resistance 4R33, amplifier 9 foot of reverse input end of 4U1 is grounded through resistance 4R16, and 8 foot of output end of amplifier 4U1 connects amplifier through feedback resistance 4R15 9 foot of reverse input end of 4U1；The analog signal port of 12 foot of the noninverting input reception measurement of the amplifier 4U1, amplifier 12 foot of noninverting input of 4U1 is grounded through resistance 4R34, and 13 foot of reverse input end of amplifier 4U1 is grounded through resistance 4R18, is put 14 foot of output end of big device 4U1 connects 13 foot of reverse input end of amplifier 4U1 through resistance 4R17；4 feet of the amplifier 4U1 connect Output end+the 5V, the capacitor 4C11 connect between 4 feet and ground of amplifier 4U1；

The analog signal port of 3 foot of the noninverting input reception measurement of the amplifier 4U2, the noninverting input 3 of amplifier 4U2 Foot is grounded through resistance 4R35, and 2 foot of reverse input end of amplifier 4U2 is grounded through resistance 4R22,1 foot of output end of amplifier 4U2 2 foot of reverse input end of amplifier 4U2 is connect through feedback resistance 4R21；5 foot of noninverting input of the amplifier 4U2 receives measurement Analog signal port, 5 foot of noninverting input of amplifier 4U2 is grounded through resistance 4R36, the reverse input end 6 of amplifier 4U2 Foot is grounded through resistance 4R24, and 7 foot of output end of amplifier 4U2 connects the reverse input end 6 of amplifier 4U2 through feedback resistance 4R23 Foot；The analog signal port of 10 foot of the noninverting input reception measurement of the amplifier 4U2, the noninverting input of amplifier 4U2 10 feet are grounded through resistance 4R37, and 9 foot of reverse input end of amplifier 4U2 is grounded through resistance 4R26, the output end 8 of amplifier 4U2 Foot connects 9 foot of reverse input end of amplifier 4U2 through feedback resistance 4R25；12 foot of noninverting input of the amplifier 4U2 is received 12 foot of noninverting input of the analog signal port of measurement, amplifier 4U2 is grounded through resistance 4R38, and amplifier 4U2's is reversed defeated Enter 13 feet of end to be grounded through resistance 4R28,14 foot of output end of amplifier 4U2 connects the reversed defeated of amplifier 4U2 through feedback resistance 4R27 Enter 13 feet of end；4 feet of the amplifier 4U2 meet the output end+5V, and the capacitor 4C12 connects 4 feet and ground in amplifier 4U2 Between；

1 foot of output end, 7 feet, 8 feet, 14 feet of the amplifier 4U1 meet the embedded chip 1U1 through exclusion 4RP511 respectively 34 feet, 35 feet, 42 feet, 43 feet；1 foot of output end, 7 feet, 8 feet, 14 feet of the amplifier 4U2 connect through exclusion 4RP512 respectively 46 feet, 47 feet, 26 feet, 27 feet of the embedded chip 1U1；

The 2nd AI isolation circuit is identical as the first AI isolation circuit structure, by amplifier 2-4U1, amplifier 2-4U2, resistance 2-4R11 to 2-4R18, resistance 2-4R21 are to resistance 2-4R28, resistance 2-4R31 to resistance 2-4R38, capacitor 2-4C11 to 2- 4C12 and exclusion 2-4RP511 to 2-4RP512 composition；1 foot of output end of the amplifier 2-4U1,7 feet, 8 feet, 14 feet difference 28 feet, 29 feet, 44 feet, 45 feet of the embedded chip 1U1 are connect through exclusion 2-4RP511；The output of the amplifier 2-4U2 1 foot, 7 feet, 8 feet, 14 feet are held to connect 18 feet, 19 feet, 20 feet, 21 feet of the embedded chip 1U1 through exclusion 2-4RP512 respectively； 3 foot of noninverting input, 5 feet, 10 feet, 12 feet of amplifier 2-4U1 and 2-4U2 receive the analog signal port of measurement respectively；

The resistance 5R4 and resistance 5R11 of the AO isolation card circuit be connected in series be followed by 5 foot of input terminal in the amplifier 5U1 with Between ground, resistance 5R1 and resistance 5R12 are connected in series and are followed by between 10 foot of input terminal and ground of the amplifier 5U1, the electricity The node of resistance 5R4 and resistance 5R11 connects 41 feet of the embedded chip 1U1, and the node of the resistance 5R1 and resistance 5R12 connects 40 feet of the embedded chip 1U1；1 foot of the amplifier 5U1 through resistance 5R2 connects the 5 of amplifier 5U1 after being connected with 2 feet Foot, 7 feet of the amplifier 5U1 connect the base stage of the triode 5Q2, and 6 feet of amplifier 5U1 meet triode 5Q2 through resistance 5R5 Emitter, resistance 5R7 connects between 6 feet and ground of amplifier 5U1, and capacitor 5C1 connects between 7 feet and ground of amplifier 5U1； The collector of the triode 5Q2 meets the output end+12V, and emitter connects 3 feet of amplifier 5U1 through resistance 5R10；It is described 13 feet of amplifier 5U1 connect 10 feet of amplifier 5U1 through resistance 5R3 after being connected with 14 feet, 8 feet of the amplifier 5U1 meet institute The base stage of triode 5Q6 is stated, 9 feet of amplifier 5U1 connect the emitter of triode 5Q1 through resistance 5R6, and resistance 5R8, which connects, to be amplified Between 9 feet and ground of device 5U1, capacitor 5C2 is connect between 8 feet and ground of amplifier 5U1；The collector of the triode 5Q1 connects Output end+the 12V, emitter connect 12 feet of amplifier 5U1 through resistance 5R9；

1 foot, 4 feet of the chip 6U1 of the parallel-serial conversion input circuit are invaded through resistance 6R702, resistance 6R701 access respectively Detection and interruption input signal, 6 feet and 8 feet of the chip 6U1 connect the output through resistance 6R703 and resistance 6R704 respectively 5 feet of end+3.3V, the chip 6U1 are grounded through resistance 6R708, and capacitor 6C701 is in parallel with resistance 6R708, the chip 6U1 7 feet be grounded through resistance 6R707, capacitor 6C702 is in parallel with resistance 6R702, and the base stage of the triode 6Q701 meets chip 6U1 5 feet, the emitter ground connection of triode 6Q701, the collector of triode 6Q701 through resistance 6R706 connect the output end+ The base stage of 3.3V, the triode 6Q702 meet 7 feet of chip 6U1, the emitter ground connection of triode 6Q702, triode 6Q702 Collector meet the output end+3.3V through resistance 6R705, the collector of triode 6Q702 connects the embedded chip 1U1's 7 feet；The chip 6U5 to chip 6U6, chip 6UA 2 feet meet 133 feet of the embedded chip 1U1, triode 6Q602 Collector meet the output end+3.3V through resistance 6R601, the base stage of triode 6Q602 connects the chip through resistance 6R602 6 feet of 6U7, the emitter ground connection of triode 6Q602, resistance 6R603 is in parallel with capacitor 6C601 to be followed by triode 6Q602's Between base stage and ground；The chip 6U5 to chip 6U6, chip 6UA 1 foot meet the collector of triode 6Q602, chip 6U6 3 feet connect the collector of the triode 6Q701,14 feet of chip 6U6 connect 5 feet of the chip 12U4；The chip 6U7's 4 feet connect 134 feet of the embedded chip 1U1, and 1 foot of the chip 6UB connects 3 feet of chip 6U6,2 feet of the chip 6UB 4 feet of chip 6U6 are connect, 4 feet, 5 feet of the chip 6UB connect 13 feet of chip 6U5,12 feet, 11 feet of the chip 6UB respectively Connecing 54 feet of the embedded chip 1U1,3 feet of the chip 6UB connect 13 feet of the chip 6UB, and the 6 of the chip 6UB Foot connects 12 feet of the chip 6UB；

11 feet of the chip 7U1 to chip 7U5 of the serioparallel exchange output circuit connect 133 feet of the embedded chip 1U1； 14 feet of the chip 7U1 connect 135 feet of the embedded chip 1U1, and 15 feet, 2 feet, 4 feet, 6 feet of chip 7U1 connect respectively 3 feet, the third serial ports of 3 feet of the chip 10U6 of one serial ports isolation card circuit, the chip 2-10U6 of second serial isolation card circuit 3 feet of the chip 3-10U6 of isolation card circuit, the 4th serial ports isolation card circuit chip 4-10U6 3 feet；

14 feet of the chip 7U5 connect 9 feet of chip 7U2, and 14 feet of the chip 7U3 connect 9 feet of the chip 7U5；It is described 14 feet of chip 7U4 connect 9 feet of the chip 7U3；

15 feet of the chip 7U8 connect 15 feet of chip 7U5, and -3 foot of 1 foot of chip 7U8 connects the 110 of embedded chip 1U1 respectively Foot, 55 feet, 126 feet, 4 feet of chip 7U8 connect 6 feet of 12 feet of chip 7U1 to chip 7U5, chip 6U7；

- 7 foot of 6 foot of the chip 7U9 connects -13 foot of 14 foot of chip 7U8, and -12 foot of 11 foot, 14 feet of chip 7U9 connect described embedding Enter 75 feet, 76 feet, 74 feet of formula chip 1U1,15 feet, -3 foot of 1 foot of chip 7U9 distinguish the chip of first serial isolation card circuit 1 foot of 10U5,1 foot of the chip 2-10U5 of second serial isolation card circuit, third serial ports isolation card circuit chip 3-10U5 1 foot, the 4th serial ports isolation card circuit chip 4-10U5 1 foot；3 feet of chip 7U5 connect the optocoupler through resistance 2R501 1 foot of 2U5,4 feet of chip 7U9 connect 3 feet of optocoupler 2U5 through resistance 2R502.

6. a kind of pin-connected panel data interaction intelligent terminal system according to claim 5, it is characterised in that：The PWM meter Number device isolation board electricity router chip 8U4-8U7, optocoupler 8U2-8U3, transistor 8Q201-8Q204, transistor 8Q301-8Q308, Exclusion 8RP101, exclusion 8RP201, exclusion 8RP202, light emitting diode 8D301-8D304, light emitting diode 8D201-8D204 It is formed with resistance 8R301-8R304；The model simulant electronic switch BL1551 of the chip 8U4-8U7, the model of optocoupler 8U3 For TLP521-4, the model TLP281-4 of optocoupler 8U4；4 foot of input pin of the chip 8U4-8U7 connects described embedded respectively 96 feet, 97 feet, 100 feet, 136 feet of chip 1U1；It is defeated that 6 foot of input pin of the chip 8U4-8U7 connects the serioparallel exchange respectively - 5 foot of 2 foot of 7U2 in circuit out, 3 foot of output pin of chip 8U4-8U7 is respectively through exclusion 8RP101, light emitting diode 8D301-8D304 connects 1 foot of input pin, 3 feet, 5 feet, 7 feet of optocoupler 8U3,2 feet of the optocoupler 8U3,4 feet, 6 feet, 8 feet ground connection；

- 16 foot of 9 foot of the optocoupler 8U3 has connect the identical impulse output circuit of four line structures；First via impulse output circuit by Transistor 8Q301, transistor 8Q305 and resistance 8R301 composition；16 feet of the optocoupler 8U3 connect the corresponding of pulse signal port Port, 16 feet of optocoupler 8U3 connect the collector of transistor 8Q301, one end of the emitter connecting resistance 8R301 of transistor 8Q301, The emitter of transistor 8Q305 connects 15 feet of optocoupler 8U3, and the collector of transistor 8Q305 connects the base stage of transistor 8Q301, brilliant The other end of the base stage connecting resistance 8R301 of body pipe 8Q305；Second road impulse output circuit is by transistor 8Q302, transistor 8Q306 and resistance 8R302 composition；The collector of the transistor 8Q302 connects 14 feet of optocoupler 8U3, and 14 feet of optocoupler 8U3 connect arteries and veins The corresponding port of signal port is rushed, the emitter of transistor 8Q306 connects 13 feet of optocoupler 8U3；Third road pulse output electricity Route transistor 8Q303, transistor 8Q307 and resistance 8R303 composition；The collector of the transistor 8Q303 connects optocoupler 8U3's 12 feet, 12 feet of optocoupler 8U3 connect the corresponding port of pulse signal port, and the emitter of transistor 8Q307 connects the 11 of optocoupler 8U3 Foot；The 4th road impulse output circuit is made of transistor 8Q304, transistor 8Q308 and resistance 8R304；The transistor The collector of 8Q304 connects 10 feet of optocoupler 8U3, and 10 feet of optocoupler 8U3 connect the corresponding port of pulse signal port, transistor The emitter of 8Q308 connects 9 feet of optocoupler 8U3；

The optocoupler 8U2, digital transistor 8Q201-8Q204, exclusion 8RP201, exclusion 8RP202, light emitting diode 8D201- The PWM counter isolation board circuit pulse input circuit of 8D204 composition；The anode of the light emitting diode 8D201-8D204 point The emitter of other transistor 8Q301-8Q304, the cathode of the light emitting diode 8D201-8D204 connect the 1 of optocoupler 8U2 respectively Foot, 3 feet, 5 feet, 7 feet, 2 feet of the optocoupler 8U2,4 feet, 6 feet, 8 feet respectively through exclusion 8RP201 connect optocoupler 8U3 16 feet, 14 Foot, 12 feet, 10 feet, 16 feet, 14 feet, 12 feet, 10 feet of the optocoupler 8U2 meet the base stage of transistor 8Q201-8Q204, institute respectively 15 feet, 13 feet, 11 feet, 9 feet for stating optocoupler 8U2 are grounded；The collector of the transistor 8Q201-8Q204 is respectively through exclusion 8RP202 ground connection, the collector of transistor 8Q201-8Q204 meet 1 foot of chip 8U4,1 foot of chip 8U5, chip 8U6 respectively 1 foot of 1 foot, chip 8U7, the emitter of transistor 8Q201-8Q204 meet the output end+3.3V；

The human-computer interaction circuit includes the first human-computer interaction circuit and the second human-computer interaction circuit；

The first human-computer interaction electricity routing resistance 9R1-9R8 and light emitting diode 9D1-9D8 composition；The resistance 9R1 and hair Optical diode 9D1, which is connected in series, to be followed by between 3 feet and ground of the chip 7U4 in the serioparallel exchange output circuit；The resistance 9R2 and light emitting diode 9D2, which is connected in series, to be followed by between 2 feet and ground of the chip 7U4 in the serioparallel exchange output circuit；Institute It states resistance 9R3 and light emitting diode 9D3 is connected in series 1 foot and ground of the chip 7U4 being followed by the serioparallel exchange output circuit Between；The resistance 9R4 and light emitting diode 9D4 are connected in series the chip 7U4's being followed by the serioparallel exchange output circuit Between 15 feet and ground；The resistance 9R5 and light emitting diode 9D5 are connected in series the core being followed by the serioparallel exchange output circuit Between 5 feet and ground of piece 7U4；The resistance 9R6 and light emitting diode 9D6, which is connected in series, to be followed by the serioparallel exchange output circuit In chip 7U4 4 feet and ground between；The resistance 9R7 and light emitting diode 9D7 be connected in series be followed by it is defeated in the serioparallel exchange Out between 7 feet and ground of the chip 7U4 in circuit；The resistance 9R8 and light emitting diode 9D8, which is connected in series, to be followed by going here and there simultaneously described Between 6 feet and ground for converting the chip 7U4 in output circuit；

The second human-computer interaction electricity routing resistance 9R11-9R18, switch 9S1-9S8 and capacitor 9C1-9C8 composition；The resistance 9R11 connects with switch 9S1 and is followed by between the output end+3.3V and ground, and the node of the resistance 9R11 and switch 9S1 connects 11 feet of chip 6UA in the parallel-serial conversion input circuit；The resistance 9R12 connects with switch 9S2 to be followed by the output Between end+3.3V and ground, the node of the resistance 9R12 and switch 9S2 meet the chip 6UA in the parallel-serial conversion input circuit 12 feet；The resistance 9R13 connects with switch 9S3 to be followed by between the output end+3.3V and ground, the resistance 9R13 with The node of switch 9S3 connects 13 feet of the chip 6UA in the parallel-serial conversion input circuit；The resistance 9R14 and switch 9S4 goes here and there Connection is followed by between the output end+3.3V and ground, and the node of the resistance 9R14 and switch 9S4 connect the parallel-serial conversion and inputs 14 feet of chip 6UA in circuit；The resistance 9R15 connects with switch 9S5 to be followed by between the output end+3.3V and ground, The node of the resistance 9R15 and switch 9S5 connects 3 feet of the chip 6UA in the parallel-serial conversion input circuit；The resistance 9R16 connects with switch 9S6 and is followed by between the output end+3.3V and ground, and the node of the resistance 9R16 and switch 9S6 connects 4 feet of chip 6UA in the parallel-serial conversion input circuit；The resistance 9R17 connects with switch 9S7 to be followed by the output Between end+3.3V and ground, the node of the resistance 9R17 and switch 9S7 meet the chip 6UA in the parallel-serial conversion input circuit 5 feet；The resistance 9R18 connects with switch 9S8 to be followed by between the output end+3.3V and ground, the resistance 9R18 with open The node for closing 9S8 connects 6 feet of the chip 6UA in the parallel-serial conversion input circuit；The capacitor 9C1-9C8 respectively with switch 9S1-9S8 is in parallel；

The integrated communication card circuit includes serial port circuit and CAN bus circuit；The serial port circuit by serial port chip 11U11, Resistance 11R1-11R2 and capacitor hair 11C1-11C5 composition；The model MAX232 of the serial port chip 11U11, the serial ports core 11 feet, 12 feet of piece 11U11 connect 113 feet of the embedded chip 1U1,116 feet, 11 feet of serial port chip 11U11,12 respectively Foot connects external corresponding rs 232 serial interface signal respectively, and resistance 11R1 connects between 10 feet and 12 feet of serial port chip 11U11, resistance 11R2 It connects between 9 feet and 11 feet of serial port chip 11U11, capacitor 11C3 connects between 4 feet and 5 feet of serial port chip 11U11, capacitor 11C5 connects between 1 foot and 3 feet of serial port chip 11U11, and capacitor 11C1 connects between 16 feet and ground of serial port chip 11U11, 16 feet of serial port chip 11U11 meet the output end+5V, and capacitor 11C2 connects between 2 feet and ground of serial port chip 11U11, electricity Hold 11C4 to connect between 6 feet and ground of serial port chip 11U11；

The CAN bus circuit is made of isolating chip 11U21 and capacitor hair 11C6-11C7；The isolating chip 11U21's Model ISO1050；1 foot of the isolating chip 11U21 meets the output end+5V, and 2 feet meet the embedded chip 1U1 140 feet, 3 feet of isolating chip 11U21 connect 139 feet of the embedded chip 1U1,4 feet and 5 feet of isolating chip 11U21 It is grounded, 6 feet and 7 feet of isolating chip 11U21 are CAN control bus output end, and 8 feet of isolating chip 11U21 connect described defeated Outlet+5V, capacitor 11C6 connect between 1 foot and ground of isolating chip 11U21, and capacitor 11C7 connects 8 feet in isolating chip 11U21 Between ground.

7. a kind of pin-connected panel data interaction intelligent terminal system according to claim 6, it is characterised in that：The data are total Line includes the first data/address bus DWKZ0 to the 8th data/address bus DWKZ7, the 9th data/address bus WKWRZ, the tenth data/address bus WKOEZ, data bus power line and data/address bus ground wire；Data bus power line connects+5V power supply, and data/address bus is ground wire grounded；

The 1st slave terminal includes slave key control unit, slave isolation card, slave Power Management Unit, the 1st total line traffic control Device processed and the 1st flames of war relay are from modular circuit；

Slave key control unit is identical as the key control unit structure of the data interaction smart host terminal；The slave Power Management Unit is identical as the Power Management Unit structure of data interaction smart host terminal；

The slave isolation card, the 1st bus control unit and the 1st flames of war relay from modular circuit respectively with the slave core control The corresponding port of unit processed is connected；

External power supply power supply is by slave Power Management Unit to slave key control unit, slave isolation card, the 1st bus marco Device and the 1st flames of war relay are powered from modular circuit；

1st bus control unit is made of chip 13U7 and resistance 13R1；The model 74HC245 of the chip 13U7, core 1 foot of piece 13U7 is connected on the 9th data/address bus WKWRZ of data/address bus；- 9 foot of 2 foot of chip 13U7 connects the insertion respectively 93 feet, 10 feet to 15 feet, 132 feet of formula chip 1U1；10 feet of chip 13U7 are grounded；18 feet of chip 13U7 to 11 feet are distinguished It is connected on the first data/address bus DWKZ0 to the 8th data line DWKZ7 of data/address bus；20 feet of chip 13U7 connect+5V power supply；Institute Resistance 13R1 is stated to connect between 19 feet and 20 feet of chip 13U7；

The 1st flames of war relay is from modular circuit by optocoupler 13U1, chip 13U2, chip 13U3, chip 13U4, constant-current source 13D1-13D2, triode 13Q01, potentiometer 13RJ01, resistance 13R11-13R13, resistance 13R21-13R25 and capacitor 13C11-13C14 composition；The model LM393 of the model TLP281-4 of the optocoupler 13U1, chip 13U2, chip 13U3's The model S-102T of the model 74HB74 of model CN5710, chip 13U4, constant-current source 13D1-13D2, triode 13Q1 Model 8550；5 feet of the optocoupler 13U1 are signal input part of the 1st flames of war relay from modular circuit through constant-current source 13D2 FHn-1,7 feet of optocoupler 13U1 connect the input terminal of constant-current source 13D1 through potentiometer 13RJ01, and the output end of constant-current source 13D1 is the 1st Flames of war relay connects from the input end of clock CLK of modular circuit, the 1st flames of war relay from the input end of clock CLK of modular circuit The clock output port FHCLK of the flames of war relay main module circuit；1 foot of optocoupler 13U1 connects the chip through resistance 13R13 2 feet of 5 feet of 13U4, optocoupler 13U1 are connected with 3 feet, 4 feet of optocoupler 13U1,6 feet, 8 feet ground connection, the 9 feet warp of optocoupler 13U1 Resistance 13R11 ground connection, 11 feet of optocoupler 13U1 are grounded through resistance 13R12,10 feet, 12 feet of optocoupler 13U1 connect the output end+ 5V, capacitor 13C12 connect between 9 feet and 12 feet of optocoupler 13U1, capacitor 13C11 connect 11 feet of optocoupler 13U1 and 12 feet it Between, 15 feet, 16 feet of optocoupler 13U1 connect 13 feet of optocoupler 12U1,14 feet in the flames of war relay main module circuit respectively；Optocoupler 15 feet of 13U1 connect 10 feet of chip 13U7, and 16 feet of the optocoupler 13U1 connect 19 feet of chip 13U7；The 2 of the chip 13U4 Foot, 3 feet connect 11 feet of optocoupler 13U1,9 feet respectively, and 1 foot, 4 feet, 14 feet of chip 13U4 meet the output end+5V；Resistance The node of 13R22 and resistance 13R21 connects 7 feet of chip 13U2, and 7 feet of chip 13U2 connect 1 foot of the chip 13U3, chip 5 feet of 13U2 are grounded through resistance 13R24, and 5 feet of chip 13U2 connect 13 feet of optocoupler 13U1,2 feet, 3 feet, 4 feet of chip 13U2 It is grounded；3 feet of the chip 13U3 are grounded through resistance 13R25,5 feet of chip 13U3 be flames of war relay from modular circuit when Clock output end CLK, the flames of war relay connect the input terminal of constant-current source 13D1 from the output terminal of clock CLK of modular circuit；Described three The base stage of pole pipe 13Q01 connects 14 feet of optocoupler 13U1, and the emitter of triode 13Q01 connects the output end+5V, triode The extremely flames of war relay of the current collection of 13Q01 is from the signal output end CFHn of modular circuit, and the 1st flames of war relay is from modular circuit Signal output end CFHn connects the flames of war relay of the 2nd slave terminal from the signal input part of modular circuit；

18 feet of the chip 2U7 of I/O expansion bus communication circuitry to 11 feet are coupled in the data interaction smart host terminal On first data/address bus DWKZ0 to the 8th data/address bus DWKZ7 of data/address bus；IO in the data interaction smart host terminal 8 feet and 11 feet of the 2U6 of expansion bus telecommunication circuit are coupled with the 9th data/address bus WKWRZ and the tenth data of data/address bus On bus WKOEZ.

8. a kind of pin-connected panel data interaction intelligent terminal system according to claim 7, it is characterised in that：The slave every Include slave AI isolation card circuit and slave AO isolation card circuit, the slave AI isolation card circuit and AI isolation card circuit from card Structure is identical, and the slave AO isolation card circuit is identical as AO isolation card circuit structure；The slave AI isolation card circuit with to The analog signal port of measurement is connected, and the output of slave AI isolation card circuit singly connects the corresponding input of slave key control unit End, the output of slave key control unit terminate the respective input of the slave AO isolation card circuit, slave AO isolation card electricity The output on road terminates analog control signal port；The corresponding output end of the slave Power Management Unit connects slave AI isolation respectively The power input of card circuit, slave AO isolation card circuit.

9. a kind of pin-connected panel data interaction intelligent terminal system according to claim 7, it is characterised in that：The slave every It include slave DIDO isolation card circuit from card, the slave DIDO isolation card circuit is identical as DIDO isolation card circuit structure；From Machine DIDO isolation card circuit is bi-directionally connected with slave key control unit；The slave DIDO isolation card circuit and switching signal end Mouth is bi-directionally connected；The corresponding output end of the slave Power Management Unit connects the power input of the slave DIDO isolation card circuit End.