CN208111448U - Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor - Google Patents

Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor Download PDF

Info

Publication number
CN208111448U
CN208111448U CN201820194090.6U CN201820194090U CN208111448U CN 208111448 U CN208111448 U CN 208111448U CN 201820194090 U CN201820194090 U CN 201820194090U CN 208111448 U CN208111448 U CN 208111448U
Authority
CN
China
Prior art keywords
layer
film
germanium nanometer
flexible
film transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201820194090.6U
Other languages
Chinese (zh)
Inventor
秦国轩
裴智慧
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin University
Original Assignee
Tianjin University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin University filed Critical Tianjin University
Priority to CN201820194090.6U priority Critical patent/CN208111448U/en
Application granted granted Critical
Publication of CN208111448U publication Critical patent/CN208111448U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The utility model relates to high control force thin-film transistor technologies, flexible device, more particularly to a kind of germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor, to propose thin film transistor (TFT) and its manufacturing technology scheme, the transistor has preferable performance and higher working frequency and stronger grid control force, is with a wide range of applications in the production of flexible integration circuit, intelligence wearing and field of photoelectric devices.Thus, the technical solution adopted in the utility model is, germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor, structure is followed successively by PEN plastic supporting base, tin indium oxide ITO bottom gate thin film layer, zinc oxide gate dielectric layer, the germanium nanometer film of n-type doping, ITO source-drain electrode layer, top zinc oxide gate dielectric layer and top grid oxide layer from the bottom to top, the germanium nanometer film of the n-type doping is that symmetrical N doped region at two is formed in germanium nanometer film, it is source electrode above N doped region at one, is drain electrode above another place N doped region.The utility model is mainly used in thin film transistor (TFT) design and manufacture.

Description

Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor
Technical field
The utility model relates to high control force thin-film transistor technologies, flexible device, specifically, it is flexible to be related to germanium nanometer film Transparent type top bottom double gate thin-film transistor.
Background technique
Flexible electronic be by organic and inorganic material electronics element manufacturing on flexible, Drawability plastics or thin metal matrix plate New electronic science and technology, all there is extensive use in fields such as information, the energy, medical treatment, national defence.Such as print RFID (radio frequency identification Label), electronics surface mount, Organic Light Emitting Diode OLED, flexible electronic displays etc..With traditional IC (integrated circuit) skill Art is the same, and the main drive of flexible electronic technology development is manufacturing process and equipment.With lower on the substrate of more large format Cost produce the smaller flexible electronic device of characteristic size and become the key of manufacture.The utility model is based on using one kind The novel process of germanium nanometer film preparation, using magnetron sputtering conductive film and dual dielectric layer grid, after photoetching ion etching with And the technology of HF (hydrofluoric acid) wet etching, by the germanium nanometer film stripping on GOI (germanium on insulator) and be transferred to flexibility can It is bent on PEN (polyethylene naphthalate) substrate, then forms a bilayer by way of photoetching layer by layer and etching Grid controls single-groove road structure transistor, is expected in the future in wearable electronic, and extensive flexible integration circuit etc. obtains wide General application.
Summary of the invention
In order to overcome the deficiencies of the prior art, the utility model is directed to thin film transistor (TFT) and its manufacturing technology scheme, institute Stating transistor has preferable performance and higher working frequency and stronger grid control force, in the system of flexible integration circuit Make, intelligence wearing and field of photoelectric devices are with a wide range of applications.For this purpose, the technical solution adopted in the utility model It is that germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor, structure is followed successively by PEN plastic supporting base, indium oxide from the bottom to top Tin ITO bottom gate thin film layer, zinc oxide gate dielectric layer, the germanium nanometer film of n-type doping, ITO source-drain electrode layer, top zinc oxide grid Pole dielectric layer and top grid oxide layer, the germanium nanometer film of the n-type doping are that symmetrical N doping at two is formed in germanium nanometer film Area, is source electrode above N doped region at one, is drain electrode above another place N doped region.
Bias is added between top grid oxide layer, ITO bottom gate thin film layer, doped region is close to gate oxide below source-drain electrode Place will form electron inversion layer, and as the conducting channel of device, break-over of device then adds bias between source-drain electrode, Device will start to work.
The characteristics of the utility model and beneficial effect are:
The utility model prepares transistor in PEN plastic supporting base, realizes the flexural property of device, is furthermore compared to biography System silicon substrate, can greatly improve the ghost effect of device, improves working frequency and response speed, bending state may be implemented Under transistor normal work, increase substantially the control ability of grid, realized on intelligently wearing flexible electronic product wide General application.
Detailed description of the invention:
Fig. 1 is the 3 dimensional drawing of flexible double grid thin film transistor (TFT);
Fig. 2 is the sectional view of transistor;
Fig. 3 is the working principle diagram of utility model.
Specific embodiment
The utility model is described one kind and is made on PEN plastics based on the germanium film transfer techniques in flexible substrate The structure and preparation method of the high control force thin film transistor (TFT) of standby top bottom double grid driving, the primary structure of transistor include PEN plastic supporting base, ITO gate electrode layer, novel ZnO gate dielectric layer, the germanium nanometer film of n-type doping, ITO source-drain electrode layer.This A kind of novel preparation process of literary grace, coats one layer using the method for magnetron sputtering on the PEN substrate for be coated with ITO conductive layer ZnO dielectric layer applies layer of ZnO as bottom grid oxide layer, in the specific undoped area of germanium film after the transfer and is used as top Grid oxide layer.It is shifted on GOI followed by the mask plate photoetching layer by layer that design prepares and prepares grid in the germanium nanometer film got off Pole and source-drain electrode are realized and are worked under a upper frequency and the top bottom double-gate structure transistor of the higher control ability of grid Preparation.Transistor has preferable performance and higher working frequency and stronger grid control force, in flexible integration circuit Production, intelligence wearing and field of photoelectric devices are with a wide range of applications.
The purpose of this utility model is that designing and preparing a kind of germanium nanometer of double-deck grid structure based on flexible PEN substrate Film transistor, using the low temperature process of magnetron sputtering, designed in relatively simple technique and prepare the double-deck grid structure have it is higher Gate driving control ability flexible thin-film transistor, using top bottom double-gate structure extreme enrichment transistor as circuit elements The use of device.In addition, driving using bottom and top transparent conductive film, production cost is reduced, light transmission is more It is excellent, so that the flexible device provides possibility in the application of large scale integrated circuit and photoelectric device.
The technical solution of the utility model is to plate ITO and zinc oxide on PEN substrate using magnetron sputtering technique Gate dielectric film then forms doped region by the way of being lithographically formed pattern and ion implanting, is carved using photoetching and ion The mode of erosion forms square hole layer, forms germanium nanometer film layer by the way of wet process HF etching, is formed on PEN substrate by shifting Germanium nanometer film is respectively formed top zinc oxide gate dielectric layer and source and drain grid finally by the mode of photoetching and magnetron sputtering Transparent electrode layer.Complete the preparation of transistor.
A kind of germanium nanometer film flexibility homogenous medium layer top bottom double-gate structure transistor, prepares germanium nanometer film on PEN substrate, Using ito film as the gate electrode of top and bottom, grid oxide layer of the ZnO as top and bottom, to realize at top and bottom Portion's grid drives transistor simultaneously, generates higher control driving capability, and single-groove road double-gate structure, which has, widely answers With.
Transistor is prepared in PEN plastic supporting base, the flexural property of device is realized, is furthermore compared to traditional silicon substrate, It can greatly improve the ghost effect of device, improve working frequency and response speed, the crystal under bending state may be implemented The normal work of pipe increases substantially the control ability of grid, realizes and is widely applied on intelligently wearing flexible electronic product.
The main operational principle of the flexibility bottom gate homogenous medium layer film transistor is by upper and lower two gate electrodes Upper addition bias will form electron inversion floor in source and drain doping area, as the conducting channel of device, device in place of gate oxide Part conducting, then adds bias between source-drain electrode, and device will start to work, i.e., by adjusting grid voltage come controller Whether the conducting of part, the electric current between source and drain is controlled by the voltage between control source and drain.Further, since upper and lower two grid electricity The package action of pole makes grid have the stronger control ability for channel current, and control ability is to reducing under same grid voltage It is one times strong, and flexible substrate can reduce the ghost effect of traditional silicon substrate substrate MOS FTT transistor, and can be different curved It works under Qu Chengdu, is provided for the large-scale integrated of high-performance flexible circuit and the extensive use of wearable electronic It may.
Attached drawing 2 is every to be marked in figure, to 1 explanation of attached drawing:1 is PEN flexible substrate, and 2 be the transparent grid in the bottom ITO Pole, 3 be zinc oxide bottom gate dielectric layer, and 4 be germanium nanometer film, and 5 be the aperture layer on germanium film, and 6 leak doped region for N-shaped, and 7 be oxidation Gate dielectric layer at the top of zinc, 8 be N-shaped source dopant region, and 9 be transparent source electrode, and 10 be ITO top transparent gate electrode, and 11 be ITO Transparent drain electrode.
Attached drawing 3 is the working principle diagram of utility model, applies certain bias in two gate electrodes at the top and bottom of the ITO Later, by the ITO conductive film of top and bottom, the ITO layer in top and bottom generates certain voltage, when the electricity of application When pressing smaller or no-bias, germanium nanometer thin film layer due to not no inversion layer generation, even if adding voltage between source and drain, source Electric current, device shutdown will not be generated between leakage.When voltage is sufficiently large, germanium nanometer thin film layer will be in the table contacted with grid oxide layer Electron inversion layer is generated at face, hollow more germanium nano thin-films two surfaces up and down of living in caves of script crystal are big by electron number is generated In the surface inversion regime of hole number, this region is referred to as the channel region of device, then, is biased in the source-drain electrode of n-type doping, The electric current between source and drain, break-over of device can be generated.Device in the utility model has higher integrated level, there is more broad range Application.In addition, the utility model is integrated in the transistor device in plastic supporting base, when plastic supporting base bending, still may be used , can be in intelligent wearing to meet the normal work of device, artificial skin, biologic medical, photoelectric device etc. obtain more It is widely applied.
Specific manufacture craft is as follows
A. it selects PEN flexible material as substrate, puts PEN into the beaker for filling acetone soln first, then super It is cleaned 5 minutes in sound wave washer, it then will in ultrasonic cleaner by the PEN cleaned with acetone using aqueous isopropanol Acetone cleans up, and obtains more clean substrate.
B. 200nm thickness ito film and 100nm thickness ZnO bottom dielectric grid layer film are plated on PEN substrate using magnetron sputtering.
C. GOI material is selected, is cleaned in ultrasonic cleaner using acetone, acetone is then cleaned using isopropanol Residue dries up GOI.
D. 1813 positive photo glues are coated on the surface GOI, and uses sol evenning machine, setting revolving speed is 4000rpm, rotation time For 30s, photoresist is got rid of uniformly, then carries out being lithographically formed specific doping using litho machine and the mask plate made Area's pattern then carries out N-type injection by the way of ion implanting, and parameter is that Implantation Energy is 40Kev, dosage 4* 1015cm2, generate source and drain doped region and after rapid thermal annealing 10s, removed in acetone soln under the conditions of 750 DEG C of temperature Photoresist.
E. according to label ready-made on mask plate, by the square hole of spacing 5um arrangement in source and drain doping area and mask plate Layer carries out alignment photoetching, the small aperture layer of square of spacing 5um arrangement is formed after development on GOI, then using ion etching Mode removes the silicon on square aperture.
F. 3:In 1 HF solution, ready-made GOI before being put into, the buried oxide layer after two hours on GOI will be corroded dry Only, subsequent germanium nanometer film layer will fall off, and germanium nanometer film layer is adhered to the flexible PEN substrate for having plated film, drying.
G. the gluing in the germanium nanometer film being transferred on PEN, according in square aperture layer after being got rid of uniformly with sol evenning machine Label carry out alignment photoetching, form the grid of transistor, then by the way of ion etching, respectively by germanium nanometer film and The gate oxide film layer etching plated, forms Ohmic contact with conductive ITO layer.
H. after going photoresist then to carry out spin coating to the device on PEN, alignment photoetching, shape are carried out according to the label of grid At the pattern of top gate dielectric layer.
I. finally, carrying out magnetron sputtering on the pattern of formation, the gate medium at the top of the ZnO of top grid plating 100nm thickness Layer.
J. it is directed at photoetching after going photoresist then to carry out gluing to the flexible device for forming top gate dielectric layer, forms top-gated With the photoengraving pattern of source-drain electrode, the ITO top grid and source-drain electrode of 200nm thickness are formed by the way of magnetron sputtering Layer, after removing photoresist, the preparation of device is completed.

Claims (2)

1. a kind of germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor, characterized in that structure is followed successively by PEN from the bottom to top Plastic supporting base, tin indium oxide ITO bottom gate thin film layer, zinc oxide gate dielectric layer, the germanium nanometer film of n-type doping, ITO source-drain electrode Layer, top zinc oxide gate dielectric layer and top grid oxide layer, the germanium nanometer film of the n-type doping are formed in germanium nanometer film Symmetrical N doped region at two, is source electrode above N doped region at one, is drain electrode above another place N doped region.
2. germanium nanometer film flexible and transparent type top as described in claim 1 bottom double gate thin-film transistor, characterized in that in top gate Bias is added between oxygen layer, ITO bottom gate thin film layer, doped region will form electron back in place of gate oxide below source-drain electrode Type layer, as the conducting channel of device, break-over of device then adds bias between source-drain electrode, and device will start to work.
CN201820194090.6U 2018-02-05 2018-02-05 Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor Expired - Fee Related CN208111448U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201820194090.6U CN208111448U (en) 2018-02-05 2018-02-05 Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201820194090.6U CN208111448U (en) 2018-02-05 2018-02-05 Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor

Publications (1)

Publication Number Publication Date
CN208111448U true CN208111448U (en) 2018-11-16

Family

ID=64123937

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201820194090.6U Expired - Fee Related CN208111448U (en) 2018-02-05 2018-02-05 Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor

Country Status (1)

Country Link
CN (1) CN208111448U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108346691A (en) * 2018-02-05 2018-07-31 天津大学 Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108346691A (en) * 2018-02-05 2018-07-31 天津大学 Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor and preparation method thereof

Similar Documents

Publication Publication Date Title
CN107611172A (en) A kind of heterogeneous dielectric layer flexibility bottom-gate transistor and preparation method
CN109698241A (en) The flexible thin-film transistor and its manufacturing method of high-dielectric-coefficient grid medium layer
CN107611173A (en) Alumina/silica double-deck grid flexible thin-film transistor and preparation method
CN107611171A (en) A kind of more channel transistors of flexible bottom gate based on silicon nanometer film and preparation method thereof
CN109801975A (en) Flexible thin-film transistor and its manufacturing method based on amorphous indium gallium zinc film
CN102938373A (en) Laminated transfer technology for graphene transparent conducting thin film and manufactured device thereby
CN109166913A (en) Germanium nanometer film flexible metal type top bottom double gate thin-film transistor and preparation method thereof
CN108346691A (en) Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor and preparation method thereof
CN107907251A (en) Pressure sensor and preparation method thereof
CN113013253B (en) P-type thin film transistor, preparation method thereof and phase inverter
CN108011041B (en) Semiconductor thin film and thin film transistor, manufacturing method thereof, and related device
CN103022077B (en) A kind of OLED device of oxycompound thin-film transistor
CN208111448U (en) Germanium nanometer film flexible and transparent type top bottom double gate thin-film transistor
CN208368516U (en) Silicon nanometer film flexible flat grid single-groove road thin film transistor (TFT)
Yousefi et al. Fabrication of flexible ITO-free OLED using vapor-treated PEDOT: PSS thin film as anode
CN111029402A (en) Flexible bottom gate thin film transistor of zirconium-titanium oxide gate dielectric layer and manufacturing method thereof
CN107658344A (en) A kind of flexible and transparent type Double bottom gate transistor and manufacture method based on germanium nanometer film
CN208570615U (en) The more channel thin-film transistors of germanium nanometer film flexible metal type
CN107644878A (en) Phase inverter and preparation method thereof
CN111029341B (en) Copper calcium titanate gate dielectric layer flexible bottom gate flash memory device and manufacturing method thereof
CN208368517U (en) Silicon nanometer film flexible flat grid double tunnel thin film transistor (TFT)
CN110459605A (en) The heterogeneous gate dielectric layer flexible silicon thin film transistor (TFT) of multilayer material and its manufacturing method
CN209747517U (en) Two-dimensional semiconductor material based thin film transistor
CN108831929A (en) Silicon nanometer film flexible flat grid single-groove road thin film transistor (TFT) and manufacturing method
CN110444601A (en) Amorphous indium gallium zinc oxide thin-film transistor and its manufacturing method

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20181116

Termination date: 20190205