CN208078916U - Control circuit suitable for synchronous Rectifier converter - Google Patents
Control circuit suitable for synchronous Rectifier converter Download PDFInfo
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- CN208078916U CN208078916U CN201820547148.0U CN201820547148U CN208078916U CN 208078916 U CN208078916 U CN 208078916U CN 201820547148 U CN201820547148 U CN 201820547148U CN 208078916 U CN208078916 U CN 208078916U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
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- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The disclosure provides a kind of control circuit suitable for synchronous rectifier converter, including：Sample circuit is electrically connected to circuit of synchronous rectification, to the reference current of sample-synchronous rectification circuit, and corresponds to and generates sampled signal；Signal generating circuit is electrically connected to sample circuit, to receive sampled signal, and compares setting value and sampled signal, to generate output signal according to comparison result；And lock-in tube disables circuit, signal generating circuit is electrically connected to receive output signal, the driving circuit of converter is electrically connected to receive primary side pulse width modulating signal, and control signal is generated according to output signal and primary side pulse width modulating signal, so that driving circuit is carried out enabled or disabled control to the synchronous rectifier of circuit of synchronous rectification according to control signal.The control circuit that the disclosure provides solves the problems, such as that synchronous rectifier converter turns off synchronous rectifier in inductive current negative sense, and Lifting Transform device works in efficiency when light-load mode.
Description
Technical field
This disclosure relates to a kind of control circuit, more particularly to a kind of control circuit of controllable synchronous rectifier.
Background technology
As technology develops, to meet the output demand of converter low-voltage and high-current, synchronous rectification is by widely
Apply in converter, synchronous rectification is with MOSFET (Metal-Oxide-Semiconductor Field-Effect
Transistor：Mos field effect transistor) as synchronous rectifier replace diode, because MOSFET is led
Logical loss ratio diode is much smaller, therefore can reduce the loss of synchronous rectifier converter (hereinafter referred converter) whereby and promote effect
Rate.
Due to the bi-directional conductive of MOSFET, when converter works in light-load mode, the circuit of synchronous rectification of converter
In inductive current when and be forward flow (output end for flowing to circuit of synchronous rectification), when and be negative sense flowing (flow to
The input terminal of circuit of synchronous rectification).When inductive current is that negative sense flows, shutdown synchronous rectifier is would not allow for, otherwise same
High due to voltage spikes will be generated under step rectifying tube off state, synchronous rectifier may be punctured when serious, therefore only can be in inductance
When electric current is forward flow, synchronous rectifier is turned off, the body diode of later use synchronous rectifier carries out rectification.
It is the case where turning off synchronous rectifier when negative sense flows, employed in existing converter to avoid the occurrence of inductive current
A kind of scheme be：Only when converter works in heavily loaded pattern, rectification is carried out using synchronous rectifier, and is worked in converter
When light-load mode rectification is carried out using the body diode of synchronous rectifier.
However, said program, when converter works in light-load mode, synchronous rectifier is in off state, only sharp
Rectification is carried out with the body diode of synchronous rectifier so that less efficient when converter works in light-load mode, loss is larger.
Therefore, develop a kind of control circuit for the synchronous rectifier converter improving prior art defect, actually compel at present
The demand cut.
Utility model content
The disclosure is designed to provide a kind of control circuit suitable for synchronous rectifier converter so that converter works
In the part-time of light-load mode, still synchronized using the synchronous rectifier in the circuit of synchronous rectification of converter whole
When flowing, while ensuring that the inductive current only in circuit of synchronous rectification is forward flow, disabling control is carried out to synchronous rectifier,
It solves the problems, such as to turn off synchronous rectifier when inductive current negative sense occurs in synchronous rectifier converter and cause voltage stress excessively high, and
Requirement of the control circuit to sample precision is relatively low, and circuit structure is simple.
To achieve the above object, the disclosure provides a kind of control circuit, and it is whole to be suitable for inclusion in synchronizing for circuit of synchronous rectification
Current converter, including：Sample circuit is electrically connected to circuit of synchronous rectification, to the reference current of sample-synchronous rectification circuit, and
It is corresponding to generate sampled signal；Signal generating circuit is electrically connected to sample circuit, to receive sampled signal, and compare setting value and
Sampled signal, to generate output signal according to comparison result；And lock-in tube disables circuit, is electrically connected to signal generating circuit,
To receive output signal, and it is electrically connected to the driving circuit of synchronous rectifier converter, to receive primary side pulse width modulating signal,
And control signal is generated according to output signal and primary side pulse width modulating signal, with the synchronous rectifier to circuit of synchronous rectification
Enabled control or disabling control are carried out, wherein when output signal is disabling level, and primary side pulse width modulating signal is in down
When dropping in edge or failing edge latter delay time, control signal carries out disabling control to synchronous rectifier.
In a kind of exemplary embodiment of the disclosure, sample circuit is electrically connected to the output end of circuit of synchronous rectification, ginseng
Examine the output current that electric current is circuit of synchronous rectification.
In a kind of exemplary embodiment of the disclosure, sample circuit is electrically connected to the one of the inductance of circuit of synchronous rectification
End, reference current are the inductive current of circuit of synchronous rectification.
In a kind of exemplary embodiment of the disclosure, when driving circuit disables synchronous rectifier, circuit of synchronous rectification
Inductive current flow to the output end of synchronous rectifier converter.
In a kind of exemplary embodiment of the disclosure, when sampled signal is greater than the set value, output signal shows as making
Energy level, and when the sampled signal is less than or equal to setting value, output signal shows as disabling level.
In a kind of exemplary embodiment of the disclosure, signal generating circuit also includes protection circuit, protects circuit foundation
Synchronous rectifier converter corresponds to output protection signal in a normal condition or an abnormality, wherein when synchronous rectification becomes
When parallel operation is in normal condition, protection signal shows as enabled level, and when synchronous rectifier converter is in abnormality, it protects
Shield signal shows as disabling level.
In a kind of exemplary embodiment of the disclosure, when sampled signal is greater than the set value, and protection signal is enabled electricity
Usually, output signal is enabled level, and is disabling level when sampled signal is less than or equal to setting value or protection signal
When, output signal is disabling level.
In a kind of exemplary embodiment of the disclosure, driving circuit is whole to synchronizing when it is enabled level to control signal
Flow tube carries out enabled control, allows secondary edge-impulse bandwidth modulation signals to control the synchronous rectifier, driving circuit is in control signal
When to disable level, disabling control being carried out to synchronous rectifier, shielding secondary edge-impulse bandwidth modulation signals, which protects
Hold shutdown.
In a kind of exemplary embodiment of the disclosure, driving circuit includes：Primary side driving circuit, be electrically connected to synchronize it is whole
The primary circuit of current converter, to drive the switching tube of primary circuit；Governor circuit, be electrically connected to lock-in tube disabling circuit and
Primary side driving circuit disables circuit and primary side driving circuit to export primary side pulse width modulating signal to lock-in tube；And it is secondary
Side driving circuit is electrically connected to governor circuit, circuit of synchronous rectification and lock-in tube disabling circuit, to receive control signal, and according to
Enabled control is carried out to synchronous rectifier according to control signal or disabling controls.
In a kind of exemplary embodiment of the disclosure, it includes edge triggered flip flop that lock-in tube, which disables circuit,.
Description of the drawings
Fig. 1 is illustrated by the control circuit of one embodiment of the disclosure and its circuit structure of applicable synchronous rectifier converter
Figure；
Fig. 2 is the electrical block diagram of the change case of converter shown in FIG. 1 and control circuit；
Fig. 3 is the oscillogram of part signal in converter shown in FIG. 1 and control circuit；
Fig. 4 is the logic circuit schematic diagram for the embodiment that lock-in tube shown in FIG. 1 disables circuit；And
Fig. 5 is the logic circuit schematic diagram for another embodiment that lock-in tube shown in FIG. 1 disables circuit.
Reference sign：
1：Synchronous rectifier converter
10：Primary circuit
11：Transformer
12：Circuit of synchronous rectification
2：Driving circuit
20：Primary side driving circuit
21：Governor circuit
22：Secondary side driving circuit
3：Control circuit
31：Sample circuit
32：Signal generating circuit
33：Lock-in tube disables circuit
331,333：Reverser
332：D type flip flop
334：JK flip-flop
34：Protect circuit
Q1,Q2,Q3,Q4：Switching tube
SR1,SR2：Synchronous rectifier
L：Inductance
t1,t2,t3：Moment
D,J,K：Input terminal
CLK,CLK'：Input end of clock
Q,Q'：Output end
Specific implementation mode
Embodying some exemplary embodiments of disclosure features and advantages will in detail describe in the explanation of back segment.It should be understood that
Various variations can be had in different embodiments by being the disclosure, all not depart from the scope of the present disclosure, and therein
Illustrate and illustrate inherently to be illustrated as being used, rather than to limit the disclosure.
Referring to Fig. 1, its control circuit by the first embodiment of the present disclosure and its applicable synchronous rectifier converter
Electrical block diagram.As shown in Figure 1, synchronous rectifier converter 1 (hereinafter referred converter 1) includes primary circuit 10, transformation
Device 11, circuit of synchronous rectification 12, driving circuit 2 and control circuit 3.Primary circuit 10 includes switching tube Q1, Q2, Q3, Q4, and
Switching tube Q1, Q2, Q3, Q4 constitute full-bridge circuit structure.
The primary side winding of transformer 11 is connected in parallel in the output end of primary circuit 10, and is defeated with centre tapped three end
Go out the transformer of structure, but not limited to this, and transformer 11 also can be the transformer that both ends input both ends export structure.It synchronizes whole
Current circuit 12 is electrically connected to the vice-side winding of transformer 11, and includes synchronous rectifier SR1, SR2 and inductance L.Synchronous rectifier
SR1, SR2 can by but be not limited to be made of MOSFET.Circuit of synchronous rectification is full-wave rectification structure, inductance L in the present embodiment
It is connected in series in the output end of full-wave rectification structure.Each component in right converter 1 shown in FIG. 1 is not limited thereto, with
Its circuit with the same function all belongs to the range to be protected of the disclosure.
In the present embodiment, there is the electric current of inductance L a critical continuous mode value, converter 1 to work in heavily loaded pattern or underloading mould
Formula is more than in the electric current of inductance L using the electric current of inductance L and the magnitude relationship of critical continuous mode value between the two as basis for estimation
When critical continuous mode value, converter 1 works in heavily loaded pattern, and the wherein electric current of inductance L is that forward flow (flows to synchronous rectification electricity
The output end on road 12), and when the electric current of inductance L is less than critical continuous mode value, converter 1 works in light-load mode, wherein inductance L
Electric current when and be forward flow, when and be negative sense flowing (input terminal for flowing to circuit of synchronous rectification 12).
Driving circuit 2 includes primary side driving circuit 20, governor circuit 21 and secondary side driving circuit 22.Primary side driving circuit 20
It is electrically connected to primary circuit 10, such as is electrically connected to switching tube Q1, Q2, Q3, Q4, and driving primary circuit 10, such as is controlled
The switchover operation of the conduction and cut-off of switching tube Q1, Q2, Q3, Q4 processed.Governor circuit 21 output between high level and low level into
The pulse width modulating signal of row switching makes primary side driving circuit 20 and secondary side driving circuit 22 according to pulse width modulating signal
Drive primary circuit 10 and circuit of synchronous rectification 12.Governor circuit 21 is electrically connected to primary side driving circuit 20, to export primary side arteries and veins
Bandwidth modulation signals are rushed to primary side driving circuit 20, so that primary side driving circuit 20 is driven according to primary side pulse width modulating signal former
Side circuit 10.Secondary side driving circuit 22 is electrically connected to governor circuit 21, circuit of synchronous rectification 12 and control circuit 3, to master
Control circuit 21 communicates, and the control of the secondary edge-impulse bandwidth modulation signals and the offer of control circuit 3 provided according to governor circuit 21
Accordingly output drive signal drives circuit of synchronous rectification 12 to signal processed, for example, control synchronous rectifier SR1, SR2 conducting/cut
Switchover operation only.
Control circuit 3 is electrically connected to the governor circuit 21 and secondary side driving circuit 22 and converter 1 of driving circuit 2
Circuit of synchronous rectification 12 makes secondary side driving circuit 22 accordingly to synchronization to output control signals to secondary side driving circuit 22
Synchronous rectifier SR1, SR2 in rectification circuit 12 carry out enabled control or disabling control.Control circuit 3 includes sample circuit
31, signal generating circuit 32 and lock-in tube disable circuit 33.
When it is enabled level to control signal, secondary side driving circuit 22 carries out enabled control to synchronous rectifier SR1, SR2,
Secondary side driving circuit 22 is allowed to export secondary edge-impulse bandwidth modulation signals, the conduction and cut-off of control synchronous rectifier SR1, SR2
Switchover operation.When it is disabling level to control signal, secondary side driving circuit 22 carries out disabling control to synchronous rectifier SR1, SR2
System, i.e. pair side driving circuit 22 shield secondary edge-impulse bandwidth modulation signals, and synchronous rectifier SR1, SR2 are held off.
Sample circuit 31 is electrically connected to circuit of synchronous rectification 12, to a reference current of sample-synchronous rectification circuit 12,
And corresponding generation sampled signal.In the present embodiment, sample circuit 31 is electrically connected to the output end of circuit of synchronous rectification 12, and adopts
The output current of sample circuit of synchronous rectification 12, which is used as, refers to electric current, and but not limited to this.As shown in Fig. 2, sample circuit 31 is electrically connected
It is connected to one end of the inductance L of circuit of synchronous rectification 12, and samples inductive current and is used as with reference to electric current.
Signal generating circuit 32 is electrically connected to sample circuit 31, to receive sampled signal, and compares a setting value and sampling
Signal, and generate output signal according to comparison result.Specifically, when sampled signal is greater than the set value, signal generating circuit 32
It is produced as the output signal of enabled level (such as high level), when sampled signal is less than setting value, signal generating circuit 32 produces
The raw output signal for disabling level (such as low level).The established standards of setting value in the disclosure are electric to be less than in inductance L
The critical continuous mode value of stream is preferred, to be worked in the part-time of light-load mode in converter 1, using synchronous rectifier SR1 and/
Or SR2 synchronizes rectification, and then efficiency when Lifting Transform device 1 works in light-load mode, but not limited to this.
Lock-in tube disabling circuit 33 is electrically connected to signal generating circuit 32, governor circuit 21 and secondary side driving circuit 22, with
Receive the output signal that signal generating circuit 32 exports and the primary side pulse width modulating signal that governor circuit 21 exports, and foundation
Output signal and primary side pulse width modulating signal generate control signal, and secondary side driving circuit 22 is whole to synchronizing according to control signal
Flow tube SR1, SR2 carries out enabled control or disabling control.Wherein, when output signal is disabling level, and primary side pulse width tune
When signal processed is converted to low level (in other words, primary side pulse width modulating signal is in failing edge) by high level, lock-in tube
Disabling circuit 33 is produced as the control signal of disabling level (such as low level), and secondary side driving circuit 22 is according to control signal to same
Step rectifying tube SR1, SR2 carry out disabling control, i.e., secondary 22 secondary edge-impulse width of the block from governor circuit 21 of side driving circuit
Modulated signal, and it is forced shutdown synchronous rectifier SR1 and SR2 according to control signal, circuit of synchronous rectification 12 utilizes synchronization at this time
The body diode of rectifying tube SR1 and SR2 carry out rectification.Conversely, when output signal is enabled level, lock-in tube disables circuit 33 and produces
The raw control signal for enabled level (such as high level) makes secondary side driving circuit 22 according to control signal to synchronous rectifier
SR1, SR2 carry out enabled control, i.e., secondary 22 uncontrolled effect of signals of side driving circuit, according to the secondary side from governor circuit 21
Pulse width modulating signal controls synchronous rectifier SR1 and/or SR2 normal work, and circuit of synchronous rectification 12 is using same at this time
Step rectifying tube SR1, SR2 synchronize rectification.
Since when primary side pulse width modulating signal is in high level, the primary side driving circuit 20 of driving circuit 2 controls
Switching tube Q1, Q4 or switching tube Q2, Q3 conducting, make the primary side energy of converter 1 persistently be transferred to the secondary side of converter 1 so that
The electric current of inductance L continues to increase, therefore when primary side pulse width modulating signal is in failing edge, the electric current of inductance L is to be in
Peak value, therefore disabling control is carried out to synchronous rectifier SR1 and SR2 when primary side pulse width modulating signal is in failing edge, it can
Ensure that the electric current of inductance L because being in peak value is forward flow.In some embodiments, ensuring the electric current of inductance L in synchronization
Rectifying tube SR1 and SR2 are carried out in the case of being forward flow when disabling control, and lock-in tube disabling circuit 33 can be in output signal
When disabling level, the control of disabling level is produced as within the delay time after primary side pulse width modulating signal is in failing edge
Signal processed makes secondary side driving circuit 22 carry out disabling control to synchronous rectifier SR1, SR2 according to control signal.
In some embodiments, such as when the size of the output current of converter 1 is equal to 24A, inductive current works in
Critical continuous conduction mode, in this case, when the output current of converter 1 is more than 24A, converter 1 is in heavy duty work pattern,
When the output current of converter 1 is less than 24A, converter 1 is in underloading operating mode.In existing scheme, to avoid the occurrence of electricity
The possibility that synchronous rectifier is disabled when inducing current negative sense, when output current is reduced to 24A (not considering circuit delay), just shutdown is same
Rectifying tube is walked, and rectification is carried out using body diode.And the control circuit 3 of the disclosure is added, it can rationally avoid in inductance electricity
When flowing negative sense the case where disabling synchronous rectifier SR1, SR2, solve to turn off synchronous rectification when synchronous rectifier converter underloading work
Synchronous rectifier still can be used when the output current of converter 1 is less than 24A for the problem managed and cause voltage stress excessively high
SR1, SR2 carry out rectification, thus efficiency when Lifting Transform device 1 works in light-load mode.
Referring to Fig. 3, and wave that the Fig. 1 that arranges in pairs or groups, wherein Fig. 3 are part signal in converter shown in FIG. 1 and control circuit
Shape figure.In Fig. 3, the enabled level mentioned by above description is indicated with high level, disabling level be indicated with low level, but in
It is not limited thereto in practical application, in addition, dotted line indicates that in control signal be the low level time in figure, if secondary side driving electricity
Road 22 has no when carrying out disabling control to synchronous rectifier SR1, SR2, drive signal that synchronous rectifier SR1, SR2 are received
Level state, for control.As shown in figure 3, when primary side pulse width modulating signal (changes speech by low transition for high level
It, i.e., primary side pulse width modulating signal is in rising edge) when, i.e. when moment t1, the electric current of inductance L is in valley, and in original
Edge-impulse bandwidth modulation signals by high level be converted to low level (in other words, primary side pulse width modulating signal be in decline
Edge) when, i.e. when moment t2, the electric current of inductance L is in peak value, therefore the electric current of inductance L can be because must be forward direction in peak value
Flowing.Therefore, lock-in tube disabling circuit 33 is believed according to the output signal and primary side pulse width modulating signal received in output
Number it is low level, and when primary side pulse width modulating signal is in failing edge, such as when moment t3, is produced as low level control
Signal so that secondary secondary edge-impulse bandwidth modulation signals of the block of side driving circuit 22 from governor circuit 21, and foundation is low electricity
Flat control signal and generate corresponding disabling signal, to be forced shutdown synchronous rectifier SR1 and SR2, realize disabling control, borrow
When this ensures to carry out disabling control to synchronous rectifier SR1 and SR2, the electric current of inductance L is forward flow.In addition, believing in control
In number time in high level, such as in time before a time t 3, circuit of synchronous rectification 12 is to utilize synchronous rectifier
SR1, SR2 synchronize rectification, due to the bi-directional conductive of synchronous rectifier SR1, SR2, when the electric current of inductance L and are forward stream
It is dynamic, when and be negative sense flowing.Low level (in other words, control signal is in failing edge) is converted to by high level in control signal
When, such as when moment t3, secondary side driving circuit 22 carries out disabling control to synchronous rectifier SR1 and SR2, therefore at control signal
In time in the low level time, such as after t 3, synchronous rectifier SR1 and SR2 are off state, at this time
Circuit of synchronous rectification 12 is changed to carry out rectification using the body diode of synchronous rectifier SR1 and SR2, and unidirectional because of body diode
Electric conductivity, therefore the electric current of inductance L only can be forward flow.
From the foregoing, it will be observed that the control circuit 3 suitable for converter 1 of the disclosure compares sampling letter by signal generating circuit 32
Number and setting value, and in sampled signal be less than setting value when, signal generating circuit 32 be produced as disabling level output signal, and
Since setting value is effectively less than the critical continuous mode value of the electric current of inductance L, therefore the converter 1 of the disclosure works in light-load mode
In part-time, rectification still is synchronized using synchronous rectifier SR1 and/or SR2, thus Lifting Transform device 1 works in gently
Efficiency when load pattern.In addition, disclosure lock-in tube disabling circuit 33 disables level, and primary side pulse width in output signal
When modulated signal is in failing edge, it is produced as the control signal of disabling level, keeps driving circuit 2 whole to synchronizing according to control signal
Flow tube SR1 and SR2 carry out disabling control, and when being in failing edge because of primary side pulse width modulating signal, the electric current of inductance L is place
In peak value, therefore the control circuit 3 of the disclosure is when converter 1 works in light-load mode, still can ensure that and is only in the electric current of inductance L
When forward flow, disabling control is carried out to synchronous rectifier SR1 and SR2, solves inductance when synchronous rectifier converter underloading work
The problem for disabling synchronous rectifier when electric current negative sense and causing voltage stress excessively high.The control circuit 3 of the disclosure need not adopt in real time
The electric current of sample inductance L, the requirement to sample precision is low, and circuit structure is simple.
Referring again to Fig. 1, in some embodiments, signal generating circuit 32 also includes protection circuit 34.Protect circuit 34
According to converter 1 output protection signal is corresponded in normal condition or abnormality.Wherein, when converter 1 is in normal shape
When state, the protection output of circuit 34 protects circuit 34 to enable the protection signal of level, and when converter 1 is in abnormality
Output is the protection signal of disabling level.In the case, signal generating circuit 32 is according to both setting value and sampled signal
Between comparison result and protection signal generate output signal, wherein be greater than the set value in sampled signal, and protection signal is
When enabled level, signal generating circuit 32 is produced as the output signal of enabled level, and is less than or equal to setting in sampled signal
When value or protection signal are disabling level, signal generating circuit 32 is produced as the output signal of disabling level.Therefore, it controls
Circuit 3 can make secondary side driving circuit 22 carry out disabling control to synchronous rectifier SR1 and SR2 when converter 1 is in abnormality
System to realize the protection to converter 1, while avoiding secondary side driving circuit 22 from being disabled when the electric current of inductance L is negative sense flowing
Synchronous rectifier SR1 and SR2.
Referring to Fig. 4, it disables the logic circuit schematic diagram of an embodiment of circuit for lock-in tube shown in FIG. 1.Such as
Shown in Fig. 4, it includes reverser 331 and edge triggered flip flop that lock-in tube, which disables circuit 33, in this embodiment, edge triggered flip flop D
Trigger 332.The input terminal of reverser 331 is electrically connected to governor circuit 21, to receive primary side pulse width modulating signal, and will
Primary side pulse width modulating signal negates.D type flip flop 332 includes input terminal D, input end of clock CLK and output end Q.Input terminal D
It is electrically connected to signal generating circuit 32, to receive the output signal of signal generating circuit 32.Input end of clock CLK is electrically connected to instead
To the output end of device 331, to receive primary side pulse width modulating signal of the inverted.Output end Q is electrically connected to secondary side driving electricity
Road 22, after d type flip flop 332 carries out logical operation, to output control signals to secondary side driving circuit 22.
Referring to Fig. 5, it disables the logic circuit schematic diagram of another embodiment of circuit for lock-in tube shown in FIG. 1.
As shown in figure 5, lock-in tube disabling circuit 33 includes reverser 333 and edge triggered flip flop, in this embodiment, edge triggered flip flop is
JK flip-flop 334.The input terminal of reverser 333 is electrically connected to signal generating circuit 32, to receive the defeated of signal generating circuit 32
Go out signal, and output signal is negated.JK flip-flop 334 includes input terminal J, K, input end of clock CLK ' and output end Q '.It is defeated
Enter to hold J to be electrically connected to signal generating circuit 32, to receive the output signal of signal generating circuit 32.Input terminal K is electrically connected to instead
To the output end of device 333, to receive output signal of the inverted.Input end of clock CLK ' is electrically connected to governor circuit 21, to connect
Receive primary side pulse width modulating signal.Output end Q ' is electrically connected to secondary side driving circuit 22, to carry out logic in JK flip-flop 334
After operation, secondary side driving circuit 22 is output control signals to.
Fig. 4 and Fig. 5 shows to realize in lock-in tube disabling circuit using edge triggered flip flop (such as d type flip flop or JK flip-flop)
Logic circuit, but the disclosure is not limited, such as digital control approach can also be used to realize in lock-in tube disabling circuit
Logical operation.
In conclusion the control circuit suitable for synchronous rectifier converter of the disclosure is relatively adopted by signal generating circuit
Sample signal and setting value, and when sampled signal is less than setting value, signal generating circuit is produced as the output signal of disabling level,
And since setting value is effectively less than the critical continuous mode value of the electric current of inductance L, therefore the converter of the disclosure works in light-load mode
Part-time in, still rectification is synchronized using synchronous rectifier, when working in light-load mode to Lifting Transform device
Efficiency.Furthermore the signal generating circuit of the disclosure may include protecting circuit, and the ratio according to setting value and sampled signal between the two
Relatively result and protection signal generate output signal, therefore, driving circuit can be made to same when converter is in abnormality
Step rectifying tube carries out disabling control, and to realize protection to converter, while it in inductive current is negative flow to avoid driving circuit
Disabling control is carried out to synchronous rectifier when dynamic.What is more, the lock-in tube disabling circuit of the disclosure is that disabling is electric in output signal
It is flat, and primary side pulse width modulating signal be in failing edge or when in failing edge latter delay time, is produced as disabling level
Signal is controlled, so that driving circuit is carried out disabling control to synchronous rectifier according to control signal, therefore the control circuit of the disclosure exists
When converter works in light-load mode, still can ensure that only inductive current be forward flow when, synchronous rectifier is disabled
Control turns off synchronous rectifier and leads to voltage stress mistake when solving synchronous rectifier converter underloading work when inductive current negative sense
High problem.Without real-time sampling inductive current, the requirement to sample precision is low, and circuit structure is simple.
Claims (10)
1. a kind of control circuit is suitable for inclusion in a synchronous rectifier converter of a circuit of synchronous rectification, including：
One sample circuit is electrically connected to the circuit of synchronous rectification, to sample a reference current of the circuit of synchronous rectification, and it is right
A sampled signal should be generated；
One signal generating circuit is electrically connected to the sample circuit, to receive the sampled signal, and compares a setting value and the sampling
Signal, to generate an output signal according to comparison result；And
One lock-in tube disables circuit, is electrically connected to the signal generating circuit, to receive the output signal, and is electrically connected to the synchronization
The one drive circuit of rectifier converter, to receive a primary side pulse width modulating signal, and according to the output signal and the primary side
Pulse width modulating signal generates a control signal, to carry out enabled control to the synchronous rectifier of the circuit of synchronous rectification or prohibit
With control,
Wherein when the output signal is to disable level, and the primary side pulse width modulating signal is in failing edge or failing edge is latter
When in delay time, which carries out disabling control to the synchronous rectifier.
2. control circuit as described in claim 1, which is characterized in that the sample circuit is electrically connected to the circuit of synchronous rectification
Output end, the reference current are an output current of the circuit of synchronous rectification.
3. control circuit as described in claim 1, which is characterized in that the sample circuit is electrically connected to the circuit of synchronous rectification
One end of inductance, the reference current are an inductive current of the circuit of synchronous rectification.
4. control circuit as described in claim 1, which is characterized in that when the driving circuit disables the synchronous rectifier, this is same
One inductive current of step rectification circuit flows to the output end of the synchronous rectifier converter.
5. control circuit as described in claim 1, which is characterized in that when the sampled signal is more than the setting value, the output
Signal shows as enabled level, and when the sampled signal is less than or equal to the setting value, which shows as disabling electricity
It is flat.
6. control circuit as described in claim 1, which is characterized in that the signal generating circuit also includes a protection circuit, should
Protection circuit corresponds to one protection signal of output according to the synchronous rectifier converter in a normal condition or an abnormality,
In, when the synchronous rectifier converter is in the normal condition, which shows as enabled level, when the synchronous rectification becomes
When parallel operation is in the abnormality, which shows as disabling level.
7. control circuit as claimed in claim 6, which is characterized in that when the sampled signal is more than the setting value, and the protection
When signal is enabled level, which is enabled level, and works as the sampled signal and be less than or equal to the setting value, or should
When protection signal is disabling level, which is disabling level.
8. control circuit as described in claim 1, which is characterized in that the driving circuit is enabled level in the control signal
When, enabled control is carried out to the synchronous rectifier, allows a secondary edge-impulse bandwidth modulation signals to control the synchronous rectifier, the drive
Dynamic circuit carries out disabling control to the synchronous rectifier, shields the pair edge-impulse width when control signal is disabling level
Modulated signal, the synchronous rectifier are held off.
9. control circuit as claimed in claim 8, which is characterized in that the driving circuit includes：
One primary side driving circuit is electrically connected to a primary circuit of the synchronous rectifier converter, to drive the primary circuit
Switching tube；
One governor circuit is electrically connected to lock-in tube disabling circuit and the primary side driving circuit, to export the primary side pulse width
Modulated signal to the lock-in tube disables circuit and the primary side driving circuit；And
One secondary side driving circuit is electrically connected to the governor circuit, the circuit of synchronous rectification and lock-in tube disabling circuit, to receive
The control signal, and enabled control or disabling control are carried out to the synchronous rectifier according to the control signal.
10. control circuit as described in claim 1, which is characterized in that it includes an edge triggered flip flop that the lock-in tube, which disables circuit,.
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| CN201820547148.0U CN208078916U (en) | 2018-04-17 | 2018-04-17 | Control circuit suitable for synchronous Rectifier converter |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111865090A (en) * | 2020-07-16 | 2020-10-30 | 北京卫星制造厂有限公司 | Secondary synchronous rectification control circuit and method based on primary current sampling |
| CN114980389A (en) * | 2022-08-01 | 2022-08-30 | 保定三正电气设备有限公司 | Dynamic load matching method and system for series induction heating device |
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2018
- 2018-04-17 CN CN201820547148.0U patent/CN208078916U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111865090A (en) * | 2020-07-16 | 2020-10-30 | 北京卫星制造厂有限公司 | Secondary synchronous rectification control circuit and method based on primary current sampling |
| CN111865090B (en) * | 2020-07-16 | 2022-01-04 | 北京卫星制造厂有限公司 | Secondary synchronous rectification control circuit and method based on primary current sampling |
| CN114980389A (en) * | 2022-08-01 | 2022-08-30 | 保定三正电气设备有限公司 | Dynamic load matching method and system for series induction heating device |
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