CN208015576U - The boost converter of programmable soft start and programmable chip external compensation - Google Patents
The boost converter of programmable soft start and programmable chip external compensation Download PDFInfo
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- CN208015576U CN208015576U CN201820556521.9U CN201820556521U CN208015576U CN 208015576 U CN208015576 U CN 208015576U CN 201820556521 U CN201820556521 U CN 201820556521U CN 208015576 U CN208015576 U CN 208015576U
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Abstract
The utility model discloses programmable soft start and the boost converters of programmable chip external compensation,Including boost chip ICs 1 and the peripheral circuit being connected with boost chip ICs 1,The peripheral circuit includes switching tube circuit,Output rectification circuit,Feedback circuit,Compensation circuit,Soft starting circuit,Input circuit and output circuit,Input circuit is connected with switching tube circuit and boost chip ICs 1,Switching tube circuit,Output rectification circuit is connect altogether by the SW feet of boost chip ICs 1,The COMP feet of boost chip ICs 1 are grounded by compensation circuit,Feedback circuit and output circuit are connected between the outlet side and ground of output rectification circuit,Feedback circuit is connected with the FB feet of boost chip ICs 1,The SS feet of boost chip ICs 1 are grounded by soft starting circuit.
Description
Technical field
The utility model is related to supply convertor technical fields, are outside programmable soft start and programmable chip specifically
The boost converter of compensation.
Background technology
Nowadays, portable electronic device is widely used to live, and the numerous areas such as industry, most of portable electronic is set
Standby all to use battery powered, some of which equipment needs the supply voltage far above cell voltage, therefore boost converter is gathered around
There is wide technical prospect.
Currently, although some boost converters have soft start function to prevent output voltage from generating overshoot, frequency is mended
Functional promotion loop stability is repaid, but its soft-start time is internal setting, is unfavorable for user and voluntarily adjusts.In addition general to rise
Die mould converter passes through internal compensation loop and improves stability, it is difficult to realize it is a variety of under the conditions of dynamic setting to loop.
Utility model content
The purpose of this utility model is to provide programmable soft start and the boost converters of programmable chip external compensation, make
User can customize soft-start time and realize that adjustable surge current limits and progress loop dynamic is set under numerous conditions
It sets to realize higher transient response, to provide a kind of high stability, the power management scheme of high reliability.
The utility model is achieved through the following technical solutions：Programmable soft start and the booster type of programmable chip external compensation become
Parallel operation, including boost chip ICs 1 and the peripheral circuit that is connected with boost chip ICs 1, the peripheral circuit includes switching tube
Circuit, output rectification circuit, feedback circuit, compensation circuit, soft starting circuit, input circuit and output circuit, input circuit with
Switching tube circuit is connected with boost chip ICs 1, the SW feet that switching tube circuit, output rectification circuit pass through boost chip ICs 1
It connects altogether, the COMP feet of boost chip ICs 1 are grounded by compensation circuit, are connected between the outlet side and ground of output rectification circuit anti-
Current feed circuit and output circuit, feedback circuit are connected with the FB feet of boost chip ICs 1, and the SS feet of boost chip ICs 1 pass through soft
Start-up circuit is grounded.
Further is that the utility model is better achieved, and especially uses following setting structures：The switching tube circuit packet
Resistance R1, field-effect tube VT1 and inductance L1 are included, input circuit includes being connected between the IN feet of boost chip ICs 1 and ground
The IN feet of input capacitance C2, boost chip IC 1 by the SENSE feet of resistance R1 connection boost chip ICs 1, and resistance R1 with
The input terminal of boost converter is constituted between the IN feet connects end altogether and ground of boost chip ICs 1, inductance L1 is connected to boost cores
Between the SENSE pins and SW pins of piece IC1, the NG pins of the grid connection boost chips of field-effect tube VT1, field-effect tube
The source electrode of VT1 is grounded, and the drain electrode of field-effect tube VT1 is connected with the SW pins of boost chip ICs 1, the source of scene effect pipe VT1
It is also associated with diode D1 between pole and drain electrode.The anode of preferred diode D1 is connected with the source electrode of field-effect tube VT1,
Field-effect tube VT1 uses N-channel MOS field-effect tube, and the substrate of field-effect tube VT1 is connected with source electrode.
Further is that the utility model is better achieved, and especially uses following setting structures：The output rectification circuit
Including field-effect tube VT2 and diode D2, diode D2 is connected in parallel in the drain electrode and source electrode of field-effect tube VT2, field-effect tube VT2
Source electrode be connected with the SW feet of boost chip ICs 1, the SDR feet of boost chip ICs 1 are connected with the grid of field-effect tube VT2
It connects, output circuit is connected between the drain electrode and ground of field-effect tube VT2 and constitutes the output end of the boost converter.It is preferred that
, the output circuit has capacitance C6 compositions；Field-effect tube VT2 uses N-channel MOS field-effect tube, and the anode of diode D2
The source electrode of field-effect tube VT2 is connected, the substrate of field-effect tube VT2 is connected with source electrode.
Further is that the utility model is better achieved, and especially uses following setting structures：The feedback circuit includes
The resistance R3 and resistance R4 being serially connected, and the resistance R3 being serially connected connects boost chip ICs 1 with the connects end altogether of resistance R4
FB feet, one end of feedback circuit are connected with the OUT feet of boost chip ICs 1, the other end ground connection of feedback circuit.Preferably,
The non-connects end altogether of resistance R3 is connected with the source electrode of the OUT feet of boost chip ICs 1 and field-effect tube VT2, and the non-of resistance R4 connects altogether
End is grounded and is connected with the PGND feet of boost chip ICs 1 and AGND feet.
Further is that the utility model is better achieved, and especially uses following setting structures：The compensation circuit is RC
Series circuit.Preferred compensation circuit includes the resistance R2 being serially connected and capacitance C5, and the non-connects end altogether of capacitance C5 connects
The COMP feet of boost chip ICs 1, the non-connects end altogether ground connection of resistance R2.
Further is that the utility model is better achieved, and especially uses following setting structures：In the boost chips
It is additionally provided with capacitance C1 between the SW feet and BST feet of IC1.
Further is that the utility model is better achieved, and especially uses following setting structures：In the boost chips
It is also associated with capacitance C3 between the VDD feet and ground of IC1.
Further is that the utility model is better achieved, and especially uses following setting structures：The soft starting circuit is
It is connected to soft start capacitor C4 between the SS feet of boost chip ICs 1 and ground.
Further is that the utility model is better achieved, and especially uses following setting structures：The boost chip ICs 1
Using ZCC9428B.
The structure of the boost chip ICs 1 is as described below：
Boost chip ICs 1 be internally provided with internal enabled module, oscillator and ramp generator, boosting adjustment module,
Power tube drive module, pwm control logic module, current sense amplifier and feedback voltage error comparator, current detecting are put
Big device is connected with pwm control logic module, and oscillator and ramp generator are connected with pwm control logic module, and boosting is adjusted
Section module is connected with power tube drive module, and power tube drive module is connected with pwm control logic module, the feedback electricity
Pressure error comparator is connected with pwm control logic module.
Wherein, the EN pins of boost chips, the anti-phase input of the current sense amplifier are formed in internal enabled module
End forms the IN pins of boost chips, and the in-phase input end of current sense amplifier forms the SENSE pins of boost chips,
The output end of current sense amplifier by adder connect access comparator in-phase input end, the output end of comparator with
Pwm control logic module is connected, the inverting input of the output end connection comparator of feedback voltage error comparator, feedback electricity
The output end of error comparator is pressed to form the COMP pins of boost chips；Pwm control logic module connection oscillator and oblique wave hair
Raw device, and ramp generator output end connects adder.Oscillator in preferred oscillator and ramp generator is controlled for PWM
Logic module processed provides clock, controls oscillator and oblique wave generation by the enable signal that pwm control logic inside modules generate
Ramp generator in device generates oblique wave, and the oblique wave generated is input to the letter exported with current sense amplifier in adder
It number mixes, is then delivered in the in-phase input end of comparator, it is anti-that feedback voltage error comparator output end accesses comparator
Phase input terminal, the two are compared in comparator, and output end connects pwm control logic module.
The inverting input of the feedback voltage error comparator forms the FB pins of boost chips, and feedback voltage misses
1.225v DC voltages are accessed on the in-phase input end of poor comparator, the output end of feedback voltage error comparator connects NMOS tube
Source electrode, the grid of NMOS tube forms the SS pins of boost chips, the current source of 5 μ A is also associated on the grid of NMOS tube,
The source electrode of NMOS tube is grounded.
The cathode of the zener diode is the BST pins of boost chips, and pwm control logic module passes through driver shape
At the NG pins of boost chips；Adjustment module of boosting provides input by the OUT pins of boost chips, and boosting adjustment module passes through
Zener diode connects power tube drive module, and power tube drive module forms boost chips with zener diode connecting pin
BST pins, power tube drive module also forms the SDR pins and SW pins of boost chips, the control of pwm control logic module
Power tube drive module.
The utility model compared with prior art, has the following advantages and advantageous effect：
(1) the utility model provides off-chip compensation function so that user can carry out loop dynamic setting under numerous conditions
To realize higher transient response.
(2) boost chips described in the utility model use fixed frequency, peak-current mode boost type arrangement to feedback
Voltage is adjusted, and current-mode improves transient response and loop stability.
(3) the utility model contains soft starting circuit (soft starting circuit) to limit COMP port voltages to prevent from opening
Excessive input current during dynamic.It prevents in start-up course due to the excessive caused supply voltage cut-out of electric current.
(4) boost chips used by the utility model are adapted to Intel Thunderbolt Power Spec completely, adopt
There is the wide input range of 3V~20V, most using improved pwm pattern to realize quick response with SR gate drivings
High output voltage 22V；With programmable under-voltage locking voltage, under-voltage locking voltage sluggishness and soft start, and low Guan Duan electricity Liu <
1 μ A, and there are 160 DEG C of Thermal shutdown characteristics；Suitable for Thunderbolt interfaces, laptop and tablet computer, hot connecting and disconnecting
The application in the fields such as source control, telecommunication power supply.
(5) when the utility model is used, selected boost chips can also generate a synchronous drive signal and open
The driving voltage for closing pipe (field-effect tube VT1) is complementary, and dead time can interior optimization；The signal can be used to driving synchronous rectification
Pipe, to improve the efficiency of entire converter.
Description of the drawings
FIG. 1 is a schematic structural view of the utility model.
Wherein, module, 2- oscillators and ramp generator, 3- boostings adjustment module, the driving of 4- power tubes are enabled inside 1-
Module, 5- current limiting switches control logic module, 6-PWM control logic modules, 7- current sense amplifiers, 8- feedback voltage errors
Comparator.
Specific implementation mode
The utility model is described in further detail with reference to embodiment, but the embodiment of the utility model is not
It is limited to this.
To keep the purpose, technical scheme and advantage of the utility model embodiment clearer, below in conjunction with this practicality
The technical solution in the utility model embodiment is clearly and completely described in attached drawing in novel embodiment, shows
So, described embodiment is a part of embodiment of the utility model, rather than whole embodiments.Based on this practicality
Embodiment in novel, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment shall fall within the protection scope of the present invention.Therefore, the implementation to the utility model provided in the accompanying drawings below
The detailed description of mode is not intended to limit claimed the scope of the utility model, but is merely representative of the utility model
Selected embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not making creative labor
The every other embodiment obtained under the premise of dynamic, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be understood that term "center", " longitudinal direction ", " transverse direction ", " length ", " width
Degree ", " thickness ", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outside",
The orientation or positional relationship of the instructions such as " clockwise ", " counterclockwise " be based on the orientation or positional relationship shown in the drawings, be only for
Described convenient for description the utility model and simplifying, do not indicate or imply the indicated equipment or element must have it is specific
Orientation, with specific azimuth configuration and operation, therefore should not be understood as limiting the present invention.
In addition, term " first ", " second " are used for description purposes only, it is not understood to indicate or imply relative importance
Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include one or more this feature.The meaning of " plurality " is two or two in the description of the present invention,
More than, unless otherwise specifically defined.
In the present invention unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " Gu
It is fixed " etc. terms shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral；Can be
Mechanical connection can also be electrical connection；It can be directly connected, can also can be indirectly connected through an intermediary two
The interaction relationship of connection or two elements inside element.It for the ordinary skill in the art, can basis
Concrete condition understands the concrete meaning of above-mentioned term in the present invention.
In the present invention unless specifically defined or limited otherwise, fisrt feature the "upper" of second feature or it
"lower" may include that the first and second features are in direct contact, and can also not be to be in direct contact but lead to including the first and second features
Cross the other characterisation contact between them.Moreover, fisrt feature second feature " on ", " top " and " above " include the
One feature is right over second feature and oblique upper, or is merely representative of fisrt feature level height and is higher than second feature.First is special
Sign second feature " under ", " lower section " and " below " include fisrt feature immediately below second feature and obliquely downward, or only
Indicate that fisrt feature level height is less than second feature.
Embodiment 1：
The utility model designs programmable soft start and the boost converter of programmable chip external compensation, as shown in Figure 1,
Especially use following setting structures：It is described outer including boost chip ICs 1 and the peripheral circuit being connected with boost chip ICs 1
It includes switching tube circuit, output rectification circuit, feedback circuit, compensation circuit, soft starting circuit, input circuit and output to enclose circuit
Circuit, input circuit are connected with switching tube circuit and boost chip ICs 1, and switching tube circuit, output rectification circuit pass through
The SW feet of boost chip ICs 1 connect altogether, and the COMP feet of boost chip ICs 1 are grounded by compensation circuit, output rectification circuit it is defeated
Go out between side and ground to connect feedback circuit and output circuit, feedback circuit are connected with the FB feet of boost chip ICs 1, boost cores
The SS feet of piece IC1 are grounded by soft starting circuit.
When the ports VIN input, by the voltage between ISENSE Port detectings input port and the port, input electricity is determined
Size is flowed, current limliting is carried out by resistance R1, in the beginning in each period, N-channel MOS switching tube VT1 is opened, on inductive current
It rises.Switching tube VT1 sources electric current is also risen by the voltage VS of internal current detection conversion at this time.The voltage and error voltage
VEA is compared.Wherein error voltage VEA is compared by the ends FB with reference voltage by output voltage by electric resistance partial pressure
It generates.When VS is still less than VEA, switching tube driving end NG output high level keeps its opening state, when VS is more than VEA, opens
It closing pipe driving end NG outputs low level to turn it off, SDR drives rectifying tube to open so that inductive current charges to output capacitance,
Inductive current declines.To realize Current Voltage double -loop control.
Embodiment 2：
The present embodiment is further optimized based on the above embodiments, as shown in Figure 1, further is preferably real
Existing the utility model, especially uses following setting structures：The switching tube circuit includes resistance R1, field-effect tube VT1 and inductance
L1, input circuit include the IN for input capacitance C2, the boost chip IC 1 being connected between the IN feet of boost chip ICs 1 and ground
Foot is by the SENSE feet of resistance R1 connection boost chip ICs 1, and the IN feet connects end altogether and ground of resistance R1 and boost chip ICs 1
Between constitute the input terminal of boost converter, inductance L1 is connected between the SENSE pins of boost chip ICs 1 and SW pins,
The NG pins of the grid connection boost chips of field-effect tube VT1, the source electrode ground connection of field-effect tube VT1, the leakage of field-effect tube VT1
Pole is connected with the SW pins of boost chip ICs 1, and diode D1 is also associated between the source electrode and drain electrode of scene effect pipe VT1.
The anode of preferred diode D1 is connected with the source electrode of field-effect tube VT1, and field-effect tube VT1 uses N-channel MOS field-effect
Pipe, and the substrate of field-effect tube VT1 is connected with source electrode.
The boost chip ICs 1 provide programmable cut-off current.Resistance RSENSE(R1) ports SENSE and defeated are connected to
Between entering voltage, limitation electric current is：
ICL=VCL/RSENSE
Wherein ICLUnit is A, RSENSEUnit is Ω, and when short circuit, input current can be limited in ICL.Each
The beginning in period, field-effect tube VT1 are opened, and inductive current rises.VT1 sources electric current is amplified by inside detection through current detecting
Device is converted to voltage.The voltage is compared at the ends COMP with error voltage.The output voltage of error amplifier is 1.225V's
The error of reference voltage and feedback voltage is amplified.When reference voltage is equal with feedback voltage, PWM comparators are (in boost chips
Pwm control logic module) shutdown, VT1 make inductive current by external rectifier (output rectification circuit) to output end electricity
Capacity charge, at this time inductive current be gradually reduced, inductance peak point current is limited by COMP terminal voltages, and COMP terminal voltages are exported
Regulating and controlling voltage.To which output voltage is adjusted by inductive circuit to meet loading demand.
Embodiment 3：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：The output rectification circuit includes field-effect tube VT2 and diode
D2, diode D2 are connected in parallel in the drain electrode and source electrode of field-effect tube VT2, source electrode and the boost chip ICs 1 of field-effect tube VT2
SW feet are connected, and the SDR feet of boost chip ICs 1 are connected with the grid of field-effect tube VT2, the drain electrode of field-effect tube VT2 with
Output circuit is connected between ground and constitutes the output end of the boost converter.Preferably, the output circuit has capacitance C6
It constitutes；Field-effect tube VT2 uses N-channel MOS field-effect tube, and the source electrode of the anode connection field-effect tube VT2 of diode D2, field
The substrate of effect pipe VT2 is connected with source electrode.
Embodiment 4：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：The feedback circuit includes the resistance R3 and resistance being serially connected
R4, and the resistance R3 being serially connected connects the FB feet of boost chip ICs 1 with the connects end altogether of resistance R4, one end of feedback circuit with
The OUT feet of boost chip ICs 1 are connected, the other end ground connection of feedback circuit.Preferably, the non-connects end altogether and boost of resistance R3
The OUT feet of chip IC 1 are connected with the source electrode of field-effect tube VT2, the non-connects end altogether of resistance R4 ground connection and with boost chips
The PGND feet of IC1 are connected with AGND feet.
Embodiment 5：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：The compensation circuit is RC series circuits.Preferred compensation circuit
Including the resistance R2 being serially connected and capacitance C5, and the non-connects end altogether of capacitance C5 connects the COMP feet of boost chip ICs 1, resistance
The non-connects end altogether of R2 is grounded.
Embodiment 6：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：Between the SW feet and BST feet of the boost chip ICs 1 also
It is provided with capacitance C1.
Embodiment 7：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：Also connect between the VDD feet and ground of the boost chip ICs 1
It is connected to capacitance C3.
Embodiment 8：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：The soft starting circuit is the SS for being connected to boost chip ICs 1
Soft start capacitor C4 between foot and ground.
The utility model contains soft start timer (soft starting circuit) to limit COMP port voltages to prevent from opening
Excessive input current during dynamic.It can prevent in start-up course due to the excessive caused supply voltage cut-out of electric current.When
After the power is turned on, Enable Pin is enabled for boost chip ICs 1, and internal current will give the ports SS external capacitive (capacitance C4) to charge, when the ends SS
Mouthful capacitor charging is completed, and the voltage of the ports SS increases, and when beginning, chip starting switch is (adaptive with a quarter of constant frequency
Answer frequency redution mode) closure is opened, when voltage continues to rise to certain value, switching frequency just becomes constant frequency value.When the ports SS
When voltage meet demand, soft start terminates.This just limits inductive current in startup stage, and input current is forced to be raised slowly to
It can be to current value that output voltage is controlled.
Embodiment 9：
The present embodiment is to advanced optimize based on any of the above embodiments, as shown in Figure 1, further is more preferable
The utility model is realized on ground, especially uses following setting structures：The boost chip ICs 1 use ZCC9428B.
In specific design in use, the soft start capacitor of the utility model is selected as：
Boost chip ICs 1 contain soft start timer (soft starting circuit) to limit COMP port voltages to prevent
Excessive input current in start-up course, to avoid the interruption of voltage source.When chip after the power is turned on, Enable Pin is enabled, internal 5
μ A electric currents will give the ports SS external capacitive (capacitance C4) to charge, and when the ports SS capacitor charging is completed, the voltage of the ports SS increases, when
When SS terminal voltages reach 250mV, chip starting switch will be with a quarter of 600kHz fixed frequencies (adaptive frequency redution mode)
It opens and is closed, when reaching 800mV, switching frequency just becomes 600kHz.When SS port voltages reach 2.5V, soft start knot
Beam.This just limits inductive current in startup stage, and input current is forced to be raised slowly to that output voltage can be controlled
Current value.Soft-start time unit is ms, is calculated by following formula：
Wherein CSSSoft start capacitor (capacitance C4) between the ends SS and the ends GND, tSSFor soft-start time.
Two poles of the utility model and a zero are come stability contorting loop.Pole FP1By output capacitance COUT(electricity
Hold C6) and load resistance setting, pole FP2By compensating electric capacity CCOMP(capacitance C5) and compensation resistance RCOMP(resistance R2) is arranged, public
Formula is as follows：
By adjusting external compensation capacitance CCOMPSo that user can under numerous conditions be set dynamically loop, reach
Ideal transient response.
The structure of the boost chip ICs 1 is as described below：
Boost chip ICs 1 be internally provided with internal enabled module, oscillator and ramp generator, boosting adjustment module,
Power tube drive module, pwm control logic module, current sense amplifier and feedback voltage error comparator, current detecting are put
Big device is connected with pwm control logic module, and oscillator and ramp generator are connected with pwm control logic module, and boosting is adjusted
Section module is connected with power tube drive module, and power tube drive module is connected with pwm control logic module, the feedback electricity
Pressure error comparator is connected with pwm control logic module.
Wherein, the EN pins of boost chips, the anti-phase input of the current sense amplifier are formed in internal enabled module
End forms the IN pins of boost chips, and the in-phase input end of current sense amplifier forms the SENSE pins of boost chips,
The output end of current sense amplifier by adder connect access comparator in-phase input end, the output end of comparator with
Pwm control logic module is connected, the inverting input of the output end connection comparator of feedback voltage error comparator, feedback electricity
The output end of error comparator is pressed to form the COMP pins of boost chips；Pwm control logic module connection oscillator and oblique wave hair
Raw device, and ramp generator output end connects adder.Oscillator in preferred oscillator and ramp generator is controlled for PWM
Logic module processed provides clock, controls oscillator and oblique wave generation by the enable signal that pwm control logic inside modules generate
Ramp generator in device generates oblique wave, and the oblique wave generated is input to the letter exported with current sense amplifier in adder
It number mixes, is then delivered in the in-phase input end of comparator, it is anti-that feedback voltage error comparator output end accesses comparator
Phase input terminal, the two are compared in comparator, and output end connects pwm control logic module.
The inverting input of the feedback voltage error comparator forms the FB pins of boost chips, and feedback voltage misses
1.225v DC voltages are accessed on the in-phase input end of poor comparator, the output end of feedback voltage error comparator connects NMOS tube
Source electrode, the grid of NMOS tube forms the SS pins of boost chips, the current source of 5 μ A is also associated on the grid of NMOS tube,
The source electrode of NMOS tube is grounded.
The cathode of the zener diode is the BST pins of boost chips, and pwm control logic module passes through driver shape
At the NG pins of boost chips；Adjustment module of boosting provides input by the OUT pins of boost chips, and boosting adjustment module passes through
Zener diode connects power tube drive module, and power tube drive module forms boost chips with zener diode connecting pin
BST pins, power tube drive module also forms the SDR pins and SW pins of boost chips, the control of pwm control logic module
Power tube drive module.
Output voltage is preferably arranged to：
Output voltage refers to actual output voltage.It is connected by two resistance (resistance R3, resistance R4) and divides feedback.
The representative value of feedback voltage is 1.225V.Output voltage calculation formula is
Wherein R3For upper feedback resistance, R4For lower feedback resistance, VREFOn the basis of voltage, select the feedback electricity of 10k or more
Resistance can raising efficiency.
Input capacitance is preferably chosen as：
Input capacitance (capacitance C2) is that inductance (L1) provides AC ripple electric current, while can inhibit noise in input terminal.Compared with
Low ESR (impedance of capacitance) capacitance can effectively reduce the noise jamming of IC1, in practical application, tending to use ceramic electrical
Hold to meet the requirements, but the electrolytic capacitor of tantalum dielectric capacitance or low ESR also can meet demands.
Preferably, input terminal use more than 4.7uF capacitance, the capacitance can be electrolytic capacitor, tantalum dielectric capacitance or
Ceramic condenser, but more accurately rated ripple current is needed when it absorbs input switch electric current, using RMS, (electric current has
Valid value) rated current be higher than inductance ripple current capacitance.
To ensure that stability, preferred input capacitance are placed on the position as possible close to IC, input capacitance is by smaller
The ceramic condenser of high quality 0.1uF replaces placement with bulky capacitor and constitutes, and small capacitances are placed on the proximal ends IC, and bulky capacitor is placed on far
End.
Output capacitance is preferably chosen as：
Output capacitance (capacitance C6) for keeping DC output voltage, lower ESR capacitances can make output voltage ripple compared with
Small, the parameter of output capacitance equally influences the stability of control system.Ceramic condenser, tantalum dielectric capacitance or low ESR electrolysis
Capacitance all can be used.When using ceramic condenser, when with switching frequency operation, the impedance of capacitance depends primarily on capacitance, because
This output voltage ripple is almost unrelated with ESR.Output voltage ripple can be estimated with following formula：
Wherein VRIPPLEIt is output ripple voltage, VINAnd VOUTIt is DC input voitage and output voltage, I respectivelyLOADIt is negative
Carry electric current, FSWIt is the fixed switching frequency of 600kHz, COUTFor output capacitance (capacitance C6).Using tantalum dielectric capacitance or low ESR
When electrolytic capacitor, ESR mainly decides condensance under switching frequency, therefore output ripple can be calculated by following formula：
Wherein, RESRFor the equivalent series resistance of output capacitance.
Select suitable output capacitance that can meet output voltage ripple demand and load transient demand, it is preferred that 4.7uF
~22uF ceramic condensers can meet major applications needs.
Inductance (L1's) preferably selects：
Inductance need to be provided under input voltage driving compared with high output voltage, and big inductance ripple current is relatively low to peak point current
It is relatively low, reduce field-effect tube VT1 switch stress.However, big inductance also implies that large scale, high series resistance, low saturation electricity
Stream.Preferably, in practical application, the selection of inductance can meet：Make that peak ripple current in peak is maximum input circuit 30%~
50%, in duty cycle it is ensured that peak inductive current is less than the 75% of limitation electric current to avoid adjusting mistake is generated due to current limliting
Difference, while also to ensure that inductance is unlikely to be saturated under worst load transient response and entry condition, is calculate by the following formula electricity
Inductance value：
Wherein ILOAD(max)It is maximum load current；Δ I is inductance peak peak ripple current；Δ I=(30%~50%) ×
ILOAD(max)η is transfer efficiency.
The selection of the output rectifying tube (field-effect tube VT2) of output rectification circuit：
Boost chip ICs 1 drive with SR grid, replace output diode to be closed for external MOS power tubes with NMOS tube
Afterflow output when disconnected, a height of 5V of SR grid driving voltages are preferred to select NMOS pipes come to be compatible with the gate drive voltage of 5V.
NMOS tube (field-effect tube VT2) is handled with backward voltage equal to or more than output voltage.It is average specified
Electric current is more than estimated maximum load current, and peak current rating setting is bigger than inductance peak point current.
When carrying out frequency compensation：
Control loop is compensated with the output of transconductance type error amplifier.Carry out stability contorting with two poles and a zero
Loop.Pole FP1By output capacitance COUT(capacitance C6) and load resistance are arranged, pole FP2By compensating electric capacity CCOMP(capacitance C5) and
Compensate resistance RCOMP(resistance R2) is arranged, and formula is as follows：
Wherein RLOADIt is load resistance, GEAFor the mutual conductance of error amplifier, AVEAFor the voltage gain of error amplifier.Directly
Flowing loop gain is：
Wherein GcsFor the ratio of offset voltage and inductive current, VFBFor the threshold voltage of feedback regulation.
In step switch converter in a continuous mode (inductive current will not drop to 0 within each period) there is also one
Zero (the F of right half planePHPZ), frequency is：
Compensation needs to examine by the gain of dc loop circuit and the calculating of critical frequency, at each pole work -20dB
The curve of slope, the curve of work+20dB slopes, takes the frequency for making loop gain be reduced to 0dB can be obtained critical at each zero
Frequency.In order to improve phase margin to improving stability, under maximum output load current condition, critical frequency should at least compare
The right plane zero frequency order of magnitude lower.
The absolute rating of boost chip ICs 1 used by the utility model is：SW, OUT：- 0.5V~+24V；IN,
SENSE：- 0.5~+24V；BST, SDR：- 0.5V~VSW+6.5V；Other pins：- 0.3V~+6.5V；EN bias currents：
0.5mA；Operating temperature：150℃；Welding temperature： 260℃；Storage temperature：- 65 DEG C~+150 DEG C；(T is lost in continuous powerA=
+25℃)。
Thermal resistance：θJA：48℃/W；θJC：11℃/W.
The electrical characteristic of Boost chip ICs 1 is as shown in the table：
Unless stated otherwise, VIN=VEN=3.3V, TA=+25 DEG C
Following table is each pin (pin) menu of the utility model：
The above is only the preferred embodiment of the utility model, not does limit in any form to the utility model
System, any simple modification made by the above technical examples according to the technical essence of the present invention, equivalent variations, each falls within
Within the scope of protection of the utility model.
Claims (9)
1. the boost converter of programmable soft start and programmable chip external compensation, it is characterised in that：Including boost chip ICs 1
And the peripheral circuit being connected with boost chip ICs 1, the peripheral circuit include switching tube circuit, output rectification circuit, feedback
Circuit, compensation circuit, soft starting circuit, input circuit and output circuit, input circuit and switching tube circuit and boost chips
IC1 is connected, and switching tube circuit, output rectification circuit are connect altogether by the SW feet of boost chip ICs 1, boost chip ICs 1
COMP feet are grounded by compensation circuit, feedback circuit and output circuit are connected between the outlet side and ground of output rectification circuit, instead
Current feed circuit is connected with the FB feet of boost chip ICs 1, and the SS feet of boost chip ICs 1 are grounded by soft starting circuit.
2. the boost converter of programmable soft start according to claim 1 and programmable chip external compensation, feature exist
In：The switching tube circuit includes resistance R1, field-effect tube VT1 and inductance L1, and input circuit includes being connected to boost chips
The IN feet of input capacitance C2, boost chip IC 1 between the IN feet and ground of IC1 pass through resistance R1 connection boost chip ICs 1
SENSE feet, and the input terminal of boost converter, electricity are constituted between the IN feet connects end altogether and ground of resistance R1 and boost chip IC 1
Sense L1 is connected between the SENSE pins of boost chip ICs 1 and SW pins, and the grid of field-effect tube VT1 connects boost chips
NG pins, the source electrode ground connection of field-effect tube VT1, the drain electrode of field-effect tube VT1 is connected with the SW pins of boost chip ICs 1,
It is also associated with diode D1 between the source electrode and drain electrode of scene effect pipe VT1.
3. the boost converter of programmable soft start according to claim 1 and programmable chip external compensation, feature exist
In：The output rectification circuit includes field-effect tube VT2 and diode D2, and diode D2 is connected in parallel on the drain electrode of field-effect tube VT2
With on source electrode, the source electrode of field-effect tube VT2 is connected with the SW feet of boost chip ICs 1, the SDR feet of boost chip ICs 1 and field
The grid of effect pipe VT2 is connected, and output circuit is connected between the drain electrode and ground of field-effect tube VT2 and constitutes the booster type change
The output end of parallel operation.
4. the boost converter of programmable soft start according to claim 1 and programmable chip external compensation, feature exist
In：The feedback circuit includes the resistance R3 being serially connected and resistance R4, and the resistance R3 that is serially connected and resistance R4 connects altogether
The FB feet of end connection boost chip ICs 1, one end of feedback circuit are connected with the OUT feet of boost chip ICs 1, feedback circuit
The other end is grounded.
5. the boost converter of programmable soft start according to claim 1 and programmable chip external compensation, feature exist
In：The compensation circuit is RC series circuits.
6. soft start and the boost converter of programmable chip external compensation may be programmed according to Claims 1 to 5 any one of them,
It is characterized in that：It is additionally provided with capacitance C1 between the SW feet and BST feet of the boost chip ICs 1.
7. soft start and the boost converter of programmable chip external compensation may be programmed according to Claims 1 to 5 any one of them,
It is characterized in that：It is also associated with capacitance C3 between the VDD feet and ground of the boost chip ICs 1.
8. soft start and the boost converter of programmable chip external compensation may be programmed according to Claims 1 to 5 any one of them,
It is characterized in that：The soft starting circuit is to be connected to soft start capacitor C4 between the SS feet of boost chip ICs 1 and ground.
9. soft start and the boost converter of programmable chip external compensation may be programmed according to Claims 1 to 5 any one of them,
It is characterized in that：The boost chip ICs 1 use ZCC9428B.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820556521.9U CN208015576U (en) | 2018-04-19 | 2018-04-19 | The boost converter of programmable soft start and programmable chip external compensation |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112601322A (en) * | 2020-12-16 | 2021-04-02 | 成都芯进电子有限公司 | Step-down synchronous rectification LED constant current control circuit |
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2018
- 2018-04-19 CN CN201820556521.9U patent/CN208015576U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112601322A (en) * | 2020-12-16 | 2021-04-02 | 成都芯进电子有限公司 | Step-down synchronous rectification LED constant current control circuit |
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