CN207883275U - A kind of array substrate - Google Patents
A kind of array substrate Download PDFInfo
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- CN207883275U CN207883275U CN201820334089.9U CN201820334089U CN207883275U CN 207883275 U CN207883275 U CN 207883275U CN 201820334089 U CN201820334089 U CN 201820334089U CN 207883275 U CN207883275 U CN 207883275U
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- plain conductor
- conductor
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- width
- array substrate
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Abstract
The utility model embodiment discloses a kind of array substrate.Wherein, which includes viewing area, viewing area include it is a plurality of arrange along first direction, the data signal line extended in a second direction；Non-display area, around viewing area, non-display area includes multiple driving chips and a plurality of plain conductor, and any driving chip includes multiple signal output ends, signal output end is corresponded with data signal line, and signal output end is connected to data signal line by a plain conductor respectively；A plurality of plain conductor has different length, and the width of at least partly section of any plain conductor becomes smaller with the length of plain conductor and become smaller, so that the resistance value of a plurality of plain conductor reaches unanimity.The width of at least partly section of the technical solution of the utility model embodiment by the way that a plurality of plain conductor is arranged becomes smaller by becoming smaller with the length of plain conductor, so that the resistance value of a plurality of plain conductor reaches unanimity, reduces resistance difference, display panel is made to show uniformly.
Description
Technical field
The utility model is related to display technology field more particularly to a kind of array substrates.
Background technology
In display panel, the pixel unit in viewing area is arranged in the form of matrix array in array substrate, non-aobvious
Show that the signal output end of the driving chip (driver IC) in area transmits characterization image letter by data signal line to pixel unit
The voltage data signal of breath.Driving chip includes multiple signal output ends, and each signal output end passes through plain conductor and data
Signal wire connects, which arranges in fan-shaped so that the length of peripheral region plain conductor and intermediate region metal
For the length difference of conducting wire away from larger, impedance and RC delay (RC delay) difference are also larger.The signal output end of driving chip is got over
More, the resistance difference of longest plain conductor and shortest plain conductor is bigger, causes the RC delay degree of plain conductor not
Equally, then the charge constant that voltage data signal is written to each pixel unit is inconsistent, causes in the identical charging time
Interior, the voltage data signal for being actually written into pixel unit is inconsistent, and uneven, generation colour cast is shown so as to cause display panel.
Utility model content
A kind of array substrate of the utility model embodiment offer makes display panel to reduce the resistance difference of plain conductor
Display is uniform.
The utility model embodiment provides a kind of array substrate, including：
Viewing area, viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；
Non-display area surrounds viewing area, and non-display area includes multiple driving chips and a plurality of plain conductor, any driving core
Piece includes multiple signal output ends,
Signal output end is corresponded with data signal line, and signal output end is connected to number by a plain conductor respectively
According to signal wire；
A plurality of plain conductor has different length, and the width of at least partly section of any plain conductor is led with metal
The length of line becomes smaller and becomes smaller, so that the resistance value of a plurality of plain conductor reaches unanimity.
Further, the material identical of a plurality of plain conductor.
Further, the thickness of a plurality of plain conductor is equal.
Further, the width of same plain conductor is equal, and the length of a plurality of plain conductor is equal with the ratio of width.
Further, non-display area includes N plain conductor, and the width of i-th plain conductor is ai=Liamax/Lmax,
In, LiFor the length of i-th plain conductor, amaxFor the width of the longest plain conductor of length, LmaxFor the longest metal of length
The length of conducting wire, i 1,2 ... N.
Further, plain conductor includes the first metal sub-conductor and the second metal sub-conductor, wherein the first metal sublayer is led
Line is connect with signal output end, and the second metal sub-conductor is connect with data signal line, and the first metal sublayer of a plurality of plain conductor is led
The width of the width and equal length of line, the second metal sub-conductor of a plurality of plain conductor becomes with the length of the second metal sub-conductor
Become larger greatly, so that the resistance value of a plurality of plain conductor reaches unanimity.
Further, the different layer setting of the second metal sub-conductor of neighboring metallic wires.
Further, the distance between plain conductor is greater than or equal to default electrical distance.
Further, the width of plain conductor is less than or equal to 5 microns.
The technical solution of the utility model embodiment by be arranged a plurality of plain conductor at least partly section width with
The length of plain conductor becomes smaller and becomes smaller, so that the resistance value of a plurality of plain conductor reaches unanimity, reduces resistance difference, makes display
Display panel is uniform.
Description of the drawings
Fig. 1 is a kind of structural schematic diagram for array substrate that the utility model embodiment provides；
Fig. 2 is a kind of structural schematic diagram of the part-structure for array substrate that the utility model embodiment provides；
Fig. 3 is the structural schematic diagram of the part-structure for another array substrate that the utility model embodiment provides；
Fig. 4 is a kind of section in the part-structure directions AA along Fig. 3 for array substrate that the utility model embodiment provides
Structural schematic diagram.
Specific implementation mode
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model, rather than the restriction to the utility model.It further needs exist for
It is bright, it illustrates only for ease of description, in attached drawing and the relevant part of the utility model rather than entire infrastructure.
The utility model embodiment provides a kind of array substrate, and Fig. 1 is a kind of array that the utility model embodiment provides
The structural schematic diagram of substrate, as shown in Figure 1, array substrate 10 includes viewing area 11 and the non-display area 12 around viewing area 11；
Viewing area 11 is arranged including a plurality of along first direction, the data signal line 20 extended in a second direction；Non-display area 12 includes more
A driving chip 30 and a plurality of plain conductor 40, any driving chip 30 include multiple signal output ends, signal output end and number
It is corresponded according to signal wire 20, signal output end is connected to data signal line 20 by a plain conductor 40 respectively；A plurality of gold
Belonging to conducting wire 40 has different length, and the width of at least partly section of any plain conductor 40 becomes with the length of plain conductor
It is small and become smaller, so that the resistance value of a plurality of plain conductor reaches unanimity.
Wherein, as shown in Figure 1, viewing area 11 further includes a plurality of scanning arranged, extended in a first direction in a second direction
Signal wire 21.It is intersected between each scan signal line 21 and each data signal line 20 to limit pel array in viewing area,
Pel array includes multiple pixel units.The data-signal of output is transmitted to corresponding by driving chip 30 by plain conductor 40
Corresponding pixel unit is written in voltage data signal by data signal line 20.It is connect by plain conductor with same driving chip
A plurality of data signal line in, data signal line is remoter at a distance from driving chip, and the length of corresponding plain conductor is longer.It is non-
Viewing area includes the first non-display area and the second non-display area being oppositely arranged in a second direction, and multiple driving chip is located at the
One non-display area or the second non-display area.Fig. 1 is illustratively drawn, which is located at the non-display area of downside, wherein should
Second direction is the direction that data signal line extends in Fig. 1.
It should be noted that the signal of the quantity of driving chip and the size of viewing area and resolution ratio, driving chip exports
The quantity at end is related.If viewing area is bigger, resolution ratio is higher (i.e. the quantity of pixel unit is more), the number of required driving chip
Amount is more；The quantity of the signal output end of driving chip is fewer, and the quantity of required driving chip is more.The quantity of driving chip
More, cost will be higher.The quantity of the signal output end of driving chip is more, and the shortest plain conductor of length and length are longest
The difference in length of plain conductor is bigger, and resistance difference is bigger.Fig. 1 illustratively draws two driving chips 30, driving chip
The quantity of quantity and signal output end, the present embodiment do not limit this.The cross section of plain conductor can be rectangle, and metal is led
The width of line and the relationship of resistance value are a=ρ L/ (Rb), wherein ρ is the resistivity of plain conductor, the material with plain conductor
Correlation, L are the length of plain conductor, and R is the resistance value of plain conductor, and b is the thickness of plain conductor, it follows that changing gold
The resistance value of plain conductor can be adjusted by belonging to the width of conducting wire.The present embodiment by change plain conductor partial sector width,
Or change the width of whole plain conductor, and be arranged any plain conductor at least partly section width with plain conductor length
Degree becomes smaller and becomes smaller, so that the resistance value of a plurality of plain conductor reaches unanimity, reduces resistance difference, makes to be written to each pixel unit
The charge constant of voltage data signal is consistent, i.e., charging rate is consistent, keeps the data-signal being written to each pixel unit electric
Pressure is consistent, and display panel is made to show uniformly, compared to the quantity by increasing driving chip, to reduce the mode of resistance difference,
Cost can be reduced.
Wherein, plain conductor can be copper or aluminium etc., and conductive effect is good.The material of a plurality of plain conductor can be identical.It is more
The thickness of plain conductor can be equal.The distance between plain conductor is greater than or equal to default electrical distance.The a plurality of metal
The width of conducting wire is less than or equal to 5 microns.
The utility model embodiment provides another array substrate, and Fig. 2 is a kind of battle array that the utility model embodiment provides
The structural schematic diagram of the part-structure of row substrate illustrates the size of the width of each plain conductor setting, Fig. 2 only to be driven to one for convenience
Dynamic chip illustrates, other chips are identical as this principle, and the part-structure of the array substrate in Fig. 2 can be B area in Fig. 1
The structure at place.On the basis of the above embodiments, the width of same plain conductor 40 is equal, the length of a plurality of plain conductor 40 with
The ratio of width is equal.Specifically, if non-display area includes N plain conductor, the width of i-th plain conductor is ai=
Liamax/Lmax, wherein LiFor the length of i-th plain conductor, amaxFor the width of the longest plain conductor of length, LmaxFor length
The length of longest plain conductor, i 1,2 ... N.The width of the longest plain conductor of length is 5 microns.The skill of the present embodiment
Art scheme can calculate it according to the length and width of the longest plain conductor of length and the length of remaining plain conductor
The width of remaining plain conductor, and then only need to reduce the shorter plain conductor of length by adjusting the width of remaining plain conductor
Width, you can realize that the resistance value of each plain conductor is consistent, reduce resistance difference, while it is big the distance between to ensure plain conductor
In electrical safety distance.
The utility model embodiment provides another array substrate, and Fig. 3 is another that the utility model embodiment provides
The structural schematic diagram of the part-structure of array substrate illustrates the size of the width of each plain conductor setting for convenience, and Fig. 3 is only to one
Driving chip illustrates, other chips are identical as this principle, and the part-structure of the array substrate in Fig. 3 can be the areas Tu1Zhong B
Structure at domain.On the basis of the above embodiments, any bar plain conductor 40 includes the first metal sub-conductor 41 and the second gold medal
Belong to sub-conductor 42, wherein the first metal sub-conductor 41 is connect with signal output end, the second metal sub-conductor 42 and data signal line
20 connections, the width of the first metal sub-conductor 41 of a plurality of plain conductor is equal, 42 son of the second metal of a plurality of plain conductor 40
The width of conducting wire becomes larger with the length of the second metal sub-conductor 42 and is become larger, so that the resistance value of a plurality of plain conductor 40 tends to one
It causes.
It should be noted that the equal length of the first metal sub-conductor 41 of a plurality of plain conductor 40, then a plurality of metal is led
The impedance of first metal sub-conductor 41 of line 40 is equal, if by the first metal sub-conductor of the shortest plain conductor of length and second
The width of metal sub-conductor is disposed as 5 microns, and the length of each second metal sub-conductor is equal with the ratio of width, can basis
The length and width of the second metal sub-conductor and the second metal sublayer of remaining plain conductor of the shortest plain conductor of length are led
The length of line, calculates the width of the second metal sub-conductor of remaining plain conductor, and then need to only be led by adjusting remaining metal
The width of second metal sub-conductor of line increases the width of the longer second metal sub-conductor of length, each second metal sublayer is made to lead
The resistance value of line reaches unanimity, you can realize that the resistance value of each plain conductor is consistent, reduce resistance difference, while reduce resistance value and
RC delay degree improves the performance of display panel.The length of first metal sub-conductor of each plain conductor can be according to each metal
The distance between conducting wire determines that the distance between one end that each plain conductor is connect with signal output end is closer, each plain conductor
The length of the first metal sub-conductor will be bigger so that each second metal sub-conductor is while widening, ensure each second metal
The distance between sub-conductor meets electric requirement.
The utility model embodiment provides another array substrate, and Fig. 4 is a kind of battle array that the utility model embodiment provides
The cross-sectional view in the part-structure of row substrate directions AA along Fig. 3 illustrates the different layer setting of each plain conductor for convenience
Principle, Fig. 4 only illustrate a driving chip, other chips are identical as this principle.On the basis of the above embodiments, as schemed
Shown in 4, second 42 different layers of insulation set of metal sub-conductor of neighboring metallic wires, such as can set all plain conductors
It sets in two conductor layers, if the second metal sub-conductor of i-th plain conductor is arranged in the first conductor layer, with i-th metal
The second metal sub-conductor setting of the adjacent i+1 plain conductor of conducting wire can be arranged between the second conductor layer, two conductor layers
One insulating layer, to be easier to ensure that the distance between plain conductor is more than electrical safety distance.The first of neighboring metallic wires
Metal sub-conductor can different layer insulation set.It is arranged between the first conductor layer and the second conductor layer of array substrate at least one
Via.If the different layer setting of the first metal sub-conductor and the second metal sub-conductor of same plain conductor, the first metal sub-conductor
It can be connect by via with the second metal sub-conductor.
Wherein, array substrate can be applied in display panel, and display panel may be, for example, LCD (Liquid Crystal
Display, liquid crystal display) display panel, OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) be aobvious
Show panel, QLED display panels, curved face display panel or other display panels.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, can carry out for a person skilled in the art various bright
Aobvious variation is readjusted, be combined with each other and is substituted without departing from the scope of protection of the utility model.Therefore, although passing through
Above example is described in further detail the utility model, but the utility model is not limited only to the above implementation
Example can also include other more equivalent embodiments in the case where not departing from the utility model design, and the utility model
Range is determined by scope of the appended claims.
Claims (10)
1. a kind of array substrate, which is characterized in that including：
Viewing area, the viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；
Non-display area surrounds the viewing area, and the non-display area includes multiple driving chips and a plurality of plain conductor, Ren Yisuo
It includes multiple signal output ends to state driving chip,
The signal output end is corresponded with the data signal line, and the signal output end passes through a plain conductor respectively
It is connected to the data signal line；
The a plurality of plain conductor has different length, and the width of at least partly section of any plain conductor is with institute
The length for stating plain conductor becomes smaller and becomes smaller, so that the resistance value of a plurality of plain conductor reaches unanimity.
2. array substrate according to claim 1, which is characterized in that the material identical of a plurality of plain conductor.
3. array substrate according to claim 1, which is characterized in that the thickness of a plurality of plain conductor is equal.
4. array substrate according to claim 1, which is characterized in that the width of the same plain conductor is equal, described
The length of a plurality of plain conductor is equal with the ratio of width.
5. array substrate according to claim 4, which is characterized in that the non-display area includes N plain conductor, and i-th
The width of plain conductor is ai=Liamax/Lmax, wherein LiFor the length of i-th plain conductor, amaxFor length longest
Plain conductor width, LmaxFor the length of the longest plain conductor of length, i 1,2 ... N.
6. array substrate according to claim 1, which is characterized in that the plain conductor include the first metal sub-conductor and
Second metal sub-conductor, wherein the first metal sub-conductor is connect with the signal output end, the second metal sub-conductor
It is connect with the data signal line, the width and equal length of the first metal sub-conductor of a plurality of plain conductor are described more
The width of second metal sub-conductor of plain conductor becomes larger with the length of the second metal sub-conductor and is become larger, so that described
The resistance value of a plurality of plain conductor reaches unanimity.
7. array substrate according to claim 6, which is characterized in that the second metal sub-conductor of the adjacent plain conductor
Different layer setting.
8. array substrate according to claim 1, which is characterized in that the distance between described plain conductor is greater than or equal to
Default electrical distance.
9. array substrate according to claim 1, which is characterized in that it is micro- that the width of the plain conductor is less than or equal to 5
Rice.
10. a kind of array substrate, which is characterized in that including：
Viewing area, the viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；
Non-display area surrounds the viewing area, and the non-display area includes multiple driving chips and a plurality of plain conductor, Ren Yisuo
It includes multiple signal output ends to state driving chip,
The signal output end is corresponded with the data signal line, and the signal output end passes through a plain conductor respectively
It is connected to the data signal line；
The a plurality of plain conductor has different length, wherein the non-display area includes N plain conductor, i-th metal
The width of conducting wire is ai=Liamax/Lmax, wherein LiFor the length of i-th plain conductor, amaxFor the longest metal of length
The width of conducting wire, LmaxFor the length of the longest plain conductor of length, i 1,2 ... N.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820334089.9U CN207883275U (en) | 2018-03-12 | 2018-03-12 | A kind of array substrate |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820334089.9U CN207883275U (en) | 2018-03-12 | 2018-03-12 | A kind of array substrate |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111402737A (en) * | 2020-03-26 | 2020-07-10 | 昆山国显光电有限公司 | Display panel |
| CN111564456A (en) * | 2020-05-20 | 2020-08-21 | 深圳莱宝高科技股份有限公司 | Signal line structure and electronic device |
| CN111599302A (en) * | 2020-06-30 | 2020-08-28 | 上海天马微电子有限公司 | Display panel and display device |
| CN111754942A (en) * | 2020-07-29 | 2020-10-09 | 京东方科技集团股份有限公司 | Brightness compensation method, device and equipment of display device and display device |
| CN112669705A (en) * | 2020-12-09 | 2021-04-16 | 合肥维信诺科技有限公司 | Display panel and display device |
-
2018
- 2018-03-12 CN CN201820334089.9U patent/CN207883275U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111402737A (en) * | 2020-03-26 | 2020-07-10 | 昆山国显光电有限公司 | Display panel |
| CN111564456A (en) * | 2020-05-20 | 2020-08-21 | 深圳莱宝高科技股份有限公司 | Signal line structure and electronic device |
| CN111599302A (en) * | 2020-06-30 | 2020-08-28 | 上海天马微电子有限公司 | Display panel and display device |
| CN111754942A (en) * | 2020-07-29 | 2020-10-09 | 京东方科技集团股份有限公司 | Brightness compensation method, device and equipment of display device and display device |
| CN111754942B (en) * | 2020-07-29 | 2022-04-15 | 京东方科技集团股份有限公司 | Brightness compensation method, device and equipment of display device and display device |
| CN112669705A (en) * | 2020-12-09 | 2021-04-16 | 合肥维信诺科技有限公司 | Display panel and display device |
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