CN207882632U - A kind of array substrate - Google Patents
A kind of array substrate Download PDFInfo
- Publication number
- CN207882632U CN207882632U CN201820336876.7U CN201820336876U CN207882632U CN 207882632 U CN207882632 U CN 207882632U CN 201820336876 U CN201820336876 U CN 201820336876U CN 207882632 U CN207882632 U CN 207882632U
- Authority
- CN
- China
- Prior art keywords
- plain conductor
- length
- display area
- thickness
- array substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The utility model embodiment discloses a kind of array substrate.Wherein, which includes viewing area and the non-display area around viewing area；Viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；Non-display area includes multiple driving chips and a plurality of plain conductor, and any driving chip includes multiple signal output ends, and signal output end is corresponded with data signal line, and signal output end is connected to data signal line by a plain conductor respectively；A plurality of plain conductor has different length, and the thickness of a plurality of plain conductor becomes larger with the length of plain conductor and become larger, so that the resistance value of a plurality of plain conductor reaches unanimity.The technical solution of the utility model embodiment becomes larger by the thickness that a plurality of plain conductor is arranged becomes larger with the length of plain conductor, so that the resistance value of a plurality of plain conductor reaches unanimity, reduces resistance difference, display panel is made to show uniformly.
Description
Technical field
The utility model is related to display technology field more particularly to a kind of array substrates.
Background technology
In display panel, the pixel unit in viewing area is arranged in the form of matrix array in array substrate, non-aobvious
Show that the signal output end of the driving chip (driver IC) in area transmits characterization image letter by data signal line to pixel unit
The voltage data signal of breath.Driving chip includes multiple signal output ends, and each signal output end passes through plain conductor and data
Signal wire connects, which arranges in fan-shaped so that the length of peripheral region plain conductor and intermediate region metal
For the length difference of conducting wire away from larger, impedance and RC delay (RC delay) difference are also larger.The signal output end of driving chip is got over
More, the resistance difference of longest plain conductor and shortest plain conductor is bigger, causes the RC delay degree of plain conductor not
Equally, then the charge constant that voltage data signal is written to each pixel unit is inconsistent, causes in the identical charging time
Interior, the voltage data signal for being actually written into pixel unit is inconsistent, and uneven, generation colour cast is shown so as to cause display panel.
Utility model content
A kind of array substrate of the utility model embodiment offer makes display panel to reduce the resistance difference of plain conductor
Display is uniform.
The utility model embodiment provides a kind of array substrate, including viewing area and the non-display area around viewing area；
Viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；
Non-display area includes multiple driving chips and a plurality of plain conductor, and any driving chip includes multiple signal outputs
End,
Signal output end is corresponded with data signal line, and signal output end is connected to number by a plain conductor respectively
According to signal wire；
A plurality of plain conductor has different length, and the thickness of a plurality of plain conductor become larger with the length of plain conductor and
Become larger, so that the resistance value of a plurality of plain conductor reaches unanimity.
Further, non-display area includes N plain conductor, and the thickness of i-th plain conductor is ai=ρiLi/(Ribi),
Wherein, ρiFor the resistivity of i-th plain conductor, LiFor the length of i-th plain conductor, RiFor predetermined resistance value, biIt is i-th
The width of plain conductor, i 1,2 ... N.
Further, the material identical of a plurality of plain conductor.
Further, the width of a plurality of plain conductor is equal.
Further, the length of a plurality of plain conductor and the ratio of thickness are equal.
Further, non-display area includes N plain conductor, and the thickness of j-th strip plain conductor is aj=Lja1/L1,
In, LjFor the length of j-th strip plain conductor, a1For the thickness of the shortest plain conductor of length, L1For the shortest plain conductor of length
Length, j 1,2 ... N.
Further, the distance between plain conductor is greater than or equal to default electrical distance.
Further, the thickness of a plurality of plain conductor is greater than or equal to 0.15 micron.
Further, non-display area includes the first non-display area and the second non-display area being oppositely arranged in a second direction,
Multiple driving chips are located at the first non-display area or the second non-display area.
The technical solution of the utility model embodiment is by being arranged the thickness of a plurality of plain conductor with the length of plain conductor
Become larger and become larger, so that the resistance value of a plurality of plain conductor reaches unanimity, reduces resistance difference, display panel is made to show uniformly,
Reduce resistance value and RC delay degree simultaneously.
Description of the drawings
Fig. 1 is a kind of structural schematic diagram for array substrate that the utility model embodiment provides；
Fig. 2 is a kind of cross-sectional view in array substrate directions AA along Fig. 1 that the utility model embodiment provides.
Specific implementation mode
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model, rather than the restriction to the utility model.It further needs exist for
It is bright, it illustrates only for ease of description, in attached drawing and the relevant part of the utility model rather than entire infrastructure.
The utility model embodiment provides a kind of array substrate, and Fig. 1 is a kind of array that the utility model embodiment provides
The structural schematic diagram of substrate, Fig. 2 is the cross-sectional view in the directions AA along Fig. 1, in conjunction with shown in Fig. 1 and Fig. 2, the array base
Plate includes viewing area 11 and the non-display area 12 around viewing area；Viewing area 11 is arranged including a plurality of along first direction, along second
The data signal line 20 that direction extends；Non-display area 12 includes multiple driving chips 30 and a plurality of plain conductor 40, any driving
Chip 30 includes multiple signal output ends, and signal output end is corresponded with data signal line 20, and signal output end passes through respectively
One plain conductor 40 is connected to data signal line 20；A plurality of plain conductor 40 has different length, and a plurality of plain conductor
40 thickness becomes larger with the length of plain conductor 40 and becomes larger and (can be seen that the thickness and length of plain conductor in conjunction with Fig. 1 and Fig. 2
Relationship), so that the resistance value of a plurality of plain conductor 40 reaches unanimity.
Wherein, as shown in Figure 1, viewing area 11 further includes a plurality of scanning arranged, extended in a first direction in a second direction
Signal wire 21.It is intersected between each scan signal line 21 and each data signal line 20 to limit pel array in viewing area,
Pel array includes multiple pixel units.The data-signal of output is transmitted to corresponding by driving chip 30 by plain conductor 40
Corresponding pixel unit is written in voltage data signal by data signal line 20.It is connect by plain conductor with same driving chip
A plurality of data signal line in, data signal line is remoter at a distance from driving chip, and the length of corresponding plain conductor is longer.It is non-
Viewing area includes the first non-display area and the second non-display area being oppositely arranged in a second direction, and multiple driving chip is located at the
One non-display area or the second non-display area.Fig. 1 is illustratively drawn, which is located at the non-display area of downside, wherein should
Second direction is the direction that data signal line extends in Fig. 1.
It should be noted that the signal of the quantity of driving chip and the size of viewing area and resolution ratio, driving chip exports
The quantity at end is related.If viewing area is bigger, resolution ratio is higher (i.e. the quantity of pixel unit is more), the number of required driving chip
Amount is more；The quantity of the signal output end of driving chip is fewer, and the quantity of required driving chip is more.The quantity of driving chip
More, cost will be higher.The quantity of the signal output end of driving chip is more, and the shortest plain conductor of length and length are longest
The difference in length of plain conductor is bigger, and resistance difference is bigger.Fig. 1 illustratively draws two driving chips 30, driving chip
The quantity of quantity and signal output end, the present embodiment do not limit this.The cross section of plain conductor can be rectangle, same gold
The thickness for belonging to conducting wire is equal, and the thickness of plain conductor and the relationship of resistance value are a=ρ L/ (Rb), wherein ρ is plain conductor
Resistivity, related to the material of plain conductor, L is the length of plain conductor, and R is the resistance value of plain conductor, and b is plain conductor
Width, it follows that the thickness for changing plain conductor can adjust the resistance value of plain conductor.The present embodiment is by changing metal
The thickness of conducting wire, and the thickness that any plain conductor is arranged becomes larger with the length of plain conductor and is become larger, so that a plurality of metal is led
The resistance value of line reaches unanimity, and reduces resistance difference, makes the charge constant that voltage data signal is written to each pixel unit
Unanimously, i.e., charging rate is consistent, keeps the voltage data signal being written to each pixel unit consistent, and display panel is made to show uniformly,
Resistance value and RC delay degree are reduced simultaneously, improves the performance of display panel；Compared to the quantity by increasing driving chip, come
The mode for reducing resistance difference, can reduce cost.
Specifically, the predetermined resistance value of plain conductor can be determined according to showing quality requirement.And according to plain conductor
The relationship of predetermined resistance value and thickness determines the thickness of each plain conductor, if non-display area includes N plain conductor, i-th gold
The thickness for belonging to conducting wire is ai=ρiLi/(Ribi), wherein ρiFor the resistivity of i-th plain conductor, LiFor i-th plain conductor
Length, RiFor predetermined resistance value, biFor the width of i-th plain conductor, i 1,2 ... N.
Wherein, plain conductor can be copper or aluminium etc., and conductive effect is good.The material of a plurality of plain conductor can be identical.It is more
The width of plain conductor can be equal.The distance between plain conductor is greater than or equal to default electrical distance.Plain conductor
Thickness is greater than or equal to 0.15 micron.
The utility model embodiment provides another array substrate, optimizes on the basis of the above embodiments, specifically
Be a plurality of plain conductor length it is equal with the ratio of thickness.Specifically, non-display area includes N plain conductor, j-th strip metal
The thickness of conducting wire is aj=Lja1/L1, wherein LjFor the length of j-th strip plain conductor, a1For the thickness of the shortest plain conductor of length
Degree, L1For the length of the shortest plain conductor of length, j 1,2 ... N.The thickness of the shortest plain conductor of length is 0.15 micro-
Rice.The technical solution of the present embodiment can be according to the length and thickness of the shortest plain conductor of length and remaining plain conductor
Length, calculate the thickness of remaining plain conductor, so only need to by adjusting the thickness of remaining plain conductor, increase length compared with
The thickness of long plain conductor, you can realize that the resistance value of each plain conductor is consistent, reduce resistance difference, while reduce resistance value and
RC delay degree improves the performance of display panel.
Wherein, array substrate can be applied in display panel, and display panel may be, for example, LCD (Liquid Crystal
Display, liquid crystal display) display panel, OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) be aobvious
Show panel, QLED display panels, curved face display panel or other display panels.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, can carry out for a person skilled in the art various bright
Aobvious variation is readjusted, be combined with each other and is substituted without departing from the scope of protection of the utility model.Therefore, although passing through
Above example is described in further detail the utility model, but the utility model is not limited only to the above implementation
Example can also include other more equivalent embodiments in the case where not departing from the utility model design, and the utility model
Range is determined by scope of the appended claims.
Claims (10)
1. a kind of array substrate, which is characterized in that the non-display area including viewing area and around the viewing area；
The viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；
The non-display area includes multiple driving chips and a plurality of plain conductor, and any driving chip includes that multiple signals are defeated
Outlet,
The signal output end is corresponded with the data signal line, and the signal output end passes through a plain conductor respectively
It is connected to the data signal line；
The a plurality of plain conductor has different length, and the thickness of a plurality of plain conductor is with the length of the plain conductor
Degree becomes larger and becomes larger, so that the resistance value of a plurality of plain conductor reaches unanimity.
2. array substrate according to claim 1, which is characterized in that the non-display area includes N plain conductor, and i-th
The thickness of plain conductor is ai=ρiLi/(Ribi), wherein ρiFor the resistivity of i-th plain conductor, LiFor i-th metal
The length of conducting wire, RiFor predetermined resistance value, biFor the width of i-th plain conductor, i 1,2 ... N.
3. array substrate according to claim 1, which is characterized in that the material identical of a plurality of plain conductor.
4. array substrate according to claim 1, which is characterized in that the width of a plurality of plain conductor is equal.
5. array substrate according to claim 1, which is characterized in that the length of a plurality of plain conductor and the ratio of thickness
It is worth equal.
6. array substrate according to claim 5, which is characterized in that the non-display area includes N plain conductor, jth
The thickness of plain conductor is aj=Lja1/L1, wherein LjFor the length of the j-th strip plain conductor, a1For the shortest gold of length
Belong to the thickness of conducting wire, L1For the length of the shortest plain conductor of length, j 1,2 ... N.
7. array substrate according to claim 1, which is characterized in that the distance between described plain conductor is greater than or equal to
Default electrical distance.
8. array substrate according to claim 1, which is characterized in that the thickness of a plurality of plain conductor is greater than or equal to
0.15 micron.
9. array substrate according to claim 1, which is characterized in that the non-display area includes along the second direction phase
To the first non-display area and the second non-display area of setting, the multiple driving chip is located at first non-display area or second
Non-display area.
10. a kind of array substrate, which is characterized in that the non-display area including viewing area and around the viewing area；
The viewing area include it is a plurality of along first direction arrange, the data signal line extended in a second direction；
The non-display area includes multiple driving chips and a plurality of plain conductor, and any driving chip includes that multiple signals are defeated
Outlet,
The signal output end is corresponded with the data signal line, and the signal output end passes through a plain conductor respectively
It is connected to the data signal line；
The a plurality of plain conductor has different length,
Wherein, the non-display area includes N plain conductor, and the thickness of j-th strip plain conductor is aj=Lja1/L1, wherein LjFor
The length of the j-th strip plain conductor, a1For the thickness of the shortest plain conductor of length, L1For the shortest plain conductor of length
Length, j 1,2 ... N.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820336876.7U CN207882632U (en) | 2018-03-12 | 2018-03-12 | A kind of array substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820336876.7U CN207882632U (en) | 2018-03-12 | 2018-03-12 | A kind of array substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207882632U true CN207882632U (en) | 2018-09-18 |
Family
ID=63496104
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820336876.7U Active CN207882632U (en) | 2018-03-12 | 2018-03-12 | A kind of array substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207882632U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114283706A (en) * | 2021-12-28 | 2022-04-05 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN114660863A (en) * | 2022-03-04 | 2022-06-24 | 滁州惠科光电科技有限公司 | Array substrate, driving method, design method and display panel |
| CN115826297A (en) * | 2022-12-28 | 2023-03-21 | Tcl华星光电技术有限公司 | Backlight module and display device |
-
2018
- 2018-03-12 CN CN201820336876.7U patent/CN207882632U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114283706A (en) * | 2021-12-28 | 2022-04-05 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN114660863A (en) * | 2022-03-04 | 2022-06-24 | 滁州惠科光电科技有限公司 | Array substrate, driving method, design method and display panel |
| CN115826297A (en) * | 2022-12-28 | 2023-03-21 | Tcl华星光电技术有限公司 | Backlight module and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN207883275U (en) | A kind of array substrate | |
| CN207882632U (en) | A kind of array substrate | |
| CN107887421B (en) | Display panel and display device | |
| CN104238212B (en) | Liquid crystal display device and method of driving the same | |
| US9811169B2 (en) | Flexible array substrate, display panel having the same, keyboard assembly, and electronic device thereof | |
| CN103713436B (en) | A kind of flexible base board and display device | |
| CN108766249A (en) | A kind of folding display panel and foldable display device | |
| KR100906103B1 (en) | Array Substrate of Liquid Crystal Display Device | |
| CN206619376U (en) | Display panel and the device comprising it | |
| US9864246B2 (en) | Array substrate and display device | |
| CN109188809A (en) | Display panel and display device | |
| CN107065376A (en) | A kind of array base palte and display device of electronic paper | |
| CN110515247A (en) | A kind of display panel and display device | |
| US7459780B2 (en) | Fan-out wire structure | |
| CN110400535A (en) | Display panel and display device | |
| CN109559644A (en) | A kind of flexible display panels and display device | |
| CN110286534A (en) | Array substrate, display panel and its display device | |
| CN109887458A (en) | Display panel and display device | |
| CN109686757B (en) | Flexible substrate and display panel using the same | |
| US9552759B2 (en) | Display with gate lines in a diagonal direction | |
| CN108376522A (en) | A kind of abnormity panel and display device | |
| CN108831910A (en) | Display panel | |
| US7791702B2 (en) | Display panel comprising sections of at least one of the connecting wires having different thicknesses and method of manufacturing the same | |
| CN107870488A (en) | A kind of display panel and display device | |
| CN109557734A (en) | Display panel and display module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |