CN207744202U - A kind of driving circuit realized multiple LED light and disorderly dodged - Google Patents
A kind of driving circuit realized multiple LED light and disorderly dodged Download PDFInfo
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- CN207744202U CN207744202U CN201820035402.9U CN201820035402U CN207744202U CN 207744202 U CN207744202 U CN 207744202U CN 201820035402 U CN201820035402 U CN 201820035402U CN 207744202 U CN207744202 U CN 207744202U
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Abstract
The utility model belongs to LED Drive Control Techniques field, a kind of driving circuit realized multiple LED light and disorderly dodged is provided, for driving multi-way LED lamp.The driving circuit includes：Input termination clock signal, the signal input unit of the first input signal and the second input signal for generating opposite in phase；It is connect with the signal input unit, the shift register for generating trigger signal according to first input signal, second input signal and reset signal；Wherein, the shift register includes multiple cascade d type flip flops, the CK inputs of each d type flip flop terminate first input signal, the CKB inputs of each d type flip flop terminate second input signal, and the output end output of each d type flip flop is respectively used to drive the trigger signal of LED light described in each road；It solves the prior art by the utility model to be difficult to export irregular trigger signal, the unrest of multiple LED light is caused to dodge ineffective problem.
Description
Technical field
The utility model belongs to LED Drive Control Techniques field more particularly to a kind of driving realized multiple LED light and disorderly dodged
Circuit.
Background technology
LED (Light Emitting Diode, light emitting diode) lamp is a kind of electricity that can convert electrical energy into luminous energy
Sub- device, since LED lamp colored is very abundant, many merits such as small, durable, energy saving, LED light is in related art
In by widely be used as decoration tool, when multiple LED light application in public places when, by shown by LED light it is a variety of not
Clocklike light source can bring good visual effect to people, attract the attention of people, therefore the LED light is widely used in
Multiple industrial circles such as billboard, sign board, letter lamp.
However, if LED light shows a variety of irregular light sources, needs corresponding driving circuit to be provided to the LED light and touch
It signals；Therefore the existing technology has at least the following problems：When using multiple LED light, existing driving circuit can only be single
, the identical trigger signal of phase, the light source color shown by multiple LED light is single, regular strong at this time, reduces the LED
The random of lamp dodges effect；I.e. LED lamp drive circuit is difficult to export irregular trigger signal in the prior art, leads to multiple LED light
Unrest dodge it is ineffective.
Utility model content
The utility model provides a kind of driving circuit and LED light for realizing that multiple LED light are disorderly dodged, it is intended to solve the prior art
Middle LED lamp drive circuit can be only generated the stronger trigger signal of regularity, and ineffective problem is dodged in the unrest of LED light.
The utility model first aspect provides a kind of driving circuit realized multiple LED light and disorderly dodged, including：
Input termination clock signal, the signal of the first input signal and the second input signal for generating opposite in phase are defeated
Enter unit；
Connect with the signal input unit, for according to first input signal, second input signal and
Reset signal generates the shift register of the roads N trigger signal；
Wherein, the shift register includes E cascade d type flip flops, the CK input terminations of d type flip flop described in j-th stage
First input signal, the CKB inputs of d type flip flop described in j-th stage terminate second input signal, D triggerings described in j-th stage
The reset of device terminates the reset signal, and the output end of the kth grade d type flip flop is inputted with the D of+1 grade of the kth d type flip flop
End connection, the D input terminals of the 1st grade of d type flip flop for connecting predetermined level signal, use by the power end that the d type flip flop connects
In connection power supply, the ground terminal of the d type flip flop for being connected to ground, use respectively by the output end output of each d type flip flop
In the trigger signal for driving LED light described in each road；
Wherein, N is the positive integer more than or equal to 1, and E is the positive integer more than or equal to 2, and j is 1 between E
Positive integer, k are 1 to the positive integer between E-1.
Further, the shift register further includes：First logic gate, the output end and the 1st of first logic gate
The D input terminals connection of the grade d type flip flop, first logic gate include at least two input terminals, one of input terminal with
The output end of the E grades of d type flip flops is connected, the output end of other arbitrary d type flip flops of input terminal connection.
Further, first logic gate is and door or door, XOR gate, same or door, NAND gate or nor gate.
Further, first logic gate is XOR gate, and first logic gate includes that first input end and second are defeated
Enter end；
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, first logic gate
The second input terminal connect with the ends Q of the kth grade d type flip flop, or
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, first logic gate
The second input terminal connect with the ends Q of the kth grade d type flip flop.
Further, it includes that first input end and second are defeated that first logic gate, which is same or door, first logic gate,
Enter end；
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, first logic gate
The second input terminal connect with the ends Q of the kth grade d type flip flop, or
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, first logic gate
The second input terminal connect with the ends Q of the kth grade d type flip flop.
Further, the signal input unit includes the first reverser and the second reverser；
The input of first reverser terminates the clock signal, the output end output of first reverser described the
One input signal, the output end of first reverser are connect with the input terminal of second reverser, second reverser
Output end export second input signal.
Further, the D input terminals of+1 grade of d type flip flop of the output end of the kth grade d type flip flop and kth are connect, tool
Body is：
The ends Q of the kth grade d type flip flop are connect with the D input terminals of+1 grade of d type flip flop of kth, or
The ends Q of the kth grade d type flip flop are connect with the D input terminals of+1 grade of d type flip flop of kth.
Further, the driving circuit includes：It is connect with the shift register, for the roads N trigger signal
Progress logical operation obtains multichannel and is respectively used to drive the logical unit of the drive signal of LED light described in each road.
Further, the logical unit includes multichannel logical operation module, logical operation module packet described in every road
Include the second logic gate and third reverser；
Wherein, the input terminal of second logic gate is connect with the output end of a d type flip flop, second logic gate
Output end connect with the input terminal of the third reverser, the output end of the third reverser exports the drive signal.
Further, E is the odd number more than or equal to 5.
Acquired advantageous effects are the utility model compared with the existing technology：In above-mentioned driving circuit, due to
Shift register includes multiple cascade d type flip flops, when the first input signal, the second input signal and reset signal are transmitted to
When shift register, then the d type flip flop generates the poor trigger signal of multichannel regularity respectively, at most by trigger signal output
When a LED light, multiple LED light realize preferable disorderly sudden strain of a muscle effect under the driving of the trigger signal, to improve the LED light
The diversity of presented light source；It efficiently solves the prior art to be difficult to export irregular trigger signal, leads to the unrest of LED light
Dodge ineffective problem.
Description of the drawings
It is required in being described below to embodiment in order to illustrate more clearly of the technical scheme in the embodiment of the utility model
Attached drawing to be used is briefly described, it should be apparent that, the accompanying drawings in the following description is only some realities of the utility model
Example is applied, for those skilled in the art, without creative efforts, can also be obtained according to these attached drawings
Other attached drawings.
Fig. 1 is a kind of structural representation for realizing driving circuit that multiple LED light are disorderly dodged that the utility model embodiment provides
Figure；
Fig. 2 is a kind of circuit structure for realizing driving circuit that multiple LED light are disorderly dodged that the utility model embodiment provides
Figure；
Fig. 3 is the circuit knot for the driving circuit that the another kind that the utility model embodiment provides realizes that multiple LED light are disorderly dodged
Composition；
Fig. 4 is the circuit knot for the driving circuit that the another kind that the utility model embodiment provides realizes that multiple LED light are disorderly dodged
Composition；
Fig. 5 is that the structure for the driving circuit that the another kind that the utility model embodiment provides realizes that multiple LED light are disorderly dodged is shown
It is intended to；
Fig. 6 is a kind of circuit structure diagram for logical unit that the utility model embodiment provides；
Fig. 7 is a kind of waveform for trigger signal that the ends d type flip flop Q at different levels are exported that the utility model embodiment provides
Figure；
Fig. 8 is a kind of waveform for trigger signal that the ends d type flip flop Q at different levels are exported that the utility model embodiment provides
Figure；
Fig. 9 be the utility model embodiment provide a kind of logical unit in each logic gate input terminal with it is at different levels
The connection diagram of d type flip flop output end；
Figure 10 is the oscillogram for the drive signal that a kind of logical unit that the utility model embodiment provides is generated；
Figure 11 is a kind of structural schematic diagram for LED light that the utility model embodiment provides.
Specific implementation mode
In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, below in conjunction with attached drawing and implementation
Example, the present invention will be further described in detail.It should be appreciated that specific embodiment described herein is only used to explain
The utility model is not used to limit the utility model.
Fig. 1 shows the structural representation for the driving circuit that the multiple LED light of realization that the utility model embodiment provides disorderly are dodged
Figure, wherein the multiple refers to 2 or more, for convenience of description, illustrate only with the relevant part of the utility model embodiment,
Details are as follows：
As shown in Figure 1, the driving circuit 10 is used to drive multi-way LED lamp, wherein the multichannel refers to 2 tunnels or more, the drive
Moving circuit 10 includes：Signal input unit 101 and shift register 102, the input terminated clock letter of signal input unit 110
Number CLK, signal input unit 101 generate the first input signal and the second input signal of opposite in phase according to clock signal clk,
That is the low and high level period of the first input signal and the second input signal is staggered；Shift register 102 and signal input unit
101 connections, when shift register 102 receives the first input signal and the second input signal, shift register 102 is according to the
One input signal, the second input signal and reset signal RESET generate the roads N trigger signal；Specifically, shift register
The low and high level of input signal is carried out random movement by 102, to generate the irregular roads the N trigger signal of phase distribution；When this
When trigger signal is exported to LED light, then splendid random sudden strain of a muscle effect is presented in multiple LED light under the driving of the trigger signal, to
The light source that multiple LED light are presented has the effect of that style is changeable.
It should be noted that above-mentioned clock signal clk is generated by clock signal generating circuit, clock signal generating circuit
Output end connect with signal input unit 101；Optionally, which includes oscillator, and oscillator generates
Corresponding oscillator signal by repeatedly being divided to the oscillator signal, and then obtains the oscillator signal of appropriate frequency, i.e. clock
Signal CLK, and the clock signal clk is transmitted to signal input unit 101 by the clock signal generating circuit.
Specifically, Fig. 2 shows the driving circuits 10 that the multiple LED light of the realization that the utility model embodiment provides disorderly are dodged
Circuit structure diagram, details are as follows：
The shift register 102 includes E cascade d type flip flops, the CK input terminations of wherein j-th stage d type flip flop ZDRj
First input signal, CKB input the second input signals of termination of j-th stage d type flip flop ZDRj, the reset of j-th stage d type flip flop ZDRj
End R meets reset signal RESET, specifically, reset signal RESET is generated by reset signal generating circuit, if the reset signal is produced
The reset signal RESET that raw circuit generates is effective, when the reset terminal R of d type flip flop ZDR accesses reset signal RESET, D triggerings
Device ZDR, which is executed, resets operation, i.e. the signal of d type flip flop ZDR outputs is restored to default initial state value.
Specifically, the D input terminals of+1 grade of d type flip flop ZDRk+1 of the output end of kth grade d type flip flop ZDRk and kth are connect, the
The D input terminals of 1 grade of d type flip flop ZDR1 are for connecting predetermined level signal D1, and predetermined level signal D1 is for making the displacement post
Storage 102 jumps to working condition, wherein predetermined level signal D1 be useful signal, when predetermined level signal D1 export to
When the D input terminals of the 1st grade of d type flip flop ZDR1, then the d type flip flops at different levels in the shift register 102 are in normal operating conditions；
The power end VDD that d type flip flop ZDR connects is for connecting power supply, and the ground terminal GND of d type flip flop ZDR is for being connected to ground, d type flip flop
The output end of ZDR exports the trigger signal, which is respectively used to drive each paths of LEDs lamp.
Wherein, above-mentioned N is positive integer more than or equal to 1, and E is the positive integer more than or equal to 2, j be 1 to E it
Between positive integer, k is 1 to the positive integer between E-1.
Specifically, signal input unit 101 includes the first reverser inv1 and the second reverser inv2, wherein first is reversed
The input of device inv1 terminates clock signal clk, and the output end of the first reverser inv1 exports the first input signal, the first reverser
The output end of inv1 is connect with the input terminal of the second reverser inv2, output end output the second input letter of the second reverser inv2
Number, then the opposite in phase of the first input signal and the second input signal；Wherein the first input signal and the second input signal conduct
The drive signal of shift register 102 is separately input to the CK input terminals and CKB input terminals of d type flip flop ZDR, to which the D is triggered
Device ZDR exports irregular trigger signal under the driving of the first input signal and the second input signal.
It should be noted that the output end of above-mentioned d type flip flop ZDR includes the ends Q and the ends Q, wherein j-th stage d type flip flop ZDRj
The opposite in phase of trigger signal AjB that is exported with the ends Q of the trigger signal Aj that is exported of the ends Q.Optionally, in the shape of most initial
The reset terminal R of state, d type flip flop ZDR accesses power-on reset signal, then the original state at the ends Q of d type flip flop ZDR is the first of the ends 0, Q
Beginning state is 1, at this point, the shift register 102 enters working condition.
Specifically, Fig. 3 shows the driving electricity that the another kind that the utility model embodiment provides realizes that multiple LED light are disorderly dodged
The circuit structure diagram on road 10, compared with driving circuit 10 illustrated in fig. 2, the shift register 102 in Fig. 3 further comprises first
Logic gate 1021, details are as follows：
The output end of first logic gate 1021 is connect with the D input terminals of the 1st grade of d type flip flop ZDR1, first logic gate
1021 include at least two input terminals, and wherein first logic gate 1021 a input terminal and E grades of d type flip flop ZDRE's is defeated
Outlet is connected, since the E grades of d type flip flop ZDRE trigger signals exported have passed through the processing of multistage d type flip flop, by E grades of D
When the signal transmission that the output end of trigger ZDRE is exported to first logic gate 1021, be conducive to the shift register 102
The worse trigger signal of Conduce Disciplinarian；The output of the arbitrary d type flip flop ZDR of other input terminals of first logic gate 1021
End.
Preferably, each input terminal of first logic gate 1021 connects the output end of different d type flip flop ZDR；According to D
The operation principle of trigger ZDR, when first logic gate 1021 exports the D of predetermined level signal D1 to the 1st grades of d type flip flop ZDR1
When input terminal, the output end of the d type flip flop exports corresponding trigger signal, if each input terminal connection of the first logic gate 1021
The output end of different d type flip flop ZDR has between multiple trigger signals that then input terminal of the first logic gate 1021 is accessed
The predetermined level signal D1 of the otherness of bigger, i.e. the first logic gate 1021 output has higher uncertainty, when this is default
When level signal D1 is input to the D input terminals of the 1st grade of d type flip flop ZDR1, then the trigger signal of d type flip flop ZDR outputs at different levels has
There is worse regularity.
Optionally, as shown in figure 3, the first logic gate 1021 is XOR gate xor, and XOR gate xor includes first defeated
Enter end and the second input terminal；If the signal level of two input terminals input of XOR gate xor is identical (all for high level or all
For low level), the signal of the output end output of XOR gate xor is low level at this time；If two input terminals of XOR gate xor
The signal level of input differs (one be high level another be low level), at this time the output end output of XOR gate xor
Signal be high level.
If the first input end of the first logic gate 1021 is connect with the ends Q of E grades of d type flip flop ZDRE, the first logic gate
1021 the second input terminal is connect with the ends Q of kth grade d type flip flop ZDRk；Or first logic gate 1021 first input end with
The ends the Q connection of E grades of d type flip flop ZDRE, the second input terminal of the first logic gate 1021 are connect with the ends Q of kth grade d type flip flop；
Ensure that the output polarity for the d type flip flop ZDR that two input terminals of XOR gate xor are connected is identical, all for the ends Q or all
For the ends Q, to ensure that the trigger signal of d type flip flop ZDR output end output ends at different levels has stronger randomness.
Optionally, Fig. 4 shows that the another kind that the utility model embodiment provides realizes the driving electricity that multiple LED light are disorderly dodged
The circuit structure diagram on road 10, the driving circuit 10 gone out as shown in figure 3 are compared, and the first logic gate 1021 shown in Fig. 4 is same
Or door xnor, first logic gate 1021 include first input end and the second input terminal；If same or door xnor 2 input terminals
When the signal level of input is identical, the signal that same or door xnor output end is exported at this time is high level.
If the first input end of the first logic gate 1021 is connect with the ends Q of E grades of d type flip flop ZDRE, the first logic gate
1021 the second input terminal is connect with the ends Q of kth grade d type flip flop ZDRk；Or first logic gate 1021 first input end with
The ends the Q connection of E grades of d type flip flop ZDRE, the second input terminal of the first logic gate 1021 connect with the ends Q of kth grade d type flip flop ZDRk
It connects.I.e. at the ends Q of same or door xnor input terminal connection d type flip flop ZDR, another input terminal connects d type flip flop ZDR
The ends Q, to ensure the very poor roads the N trigger signal of 102 output rule of shift register.
Optionally, the first logic gate 1021 can also be and door or door, NAND gate, nor gate etc.；Such as first logic gate
1021 be NAND gate, then the NAND gate at least has the ends Q that an input terminates d type flip flop ZDR, as described above, the initial shape at the ends Q
State is 0, is high level by NAND gate output, when the high level is input to the D input terminals of the 1st grade of d type flip flop ZDR1, from
And drive the output end output multi-channel trigger signal of d type flip flops at different levels.
In another example the first logic gate 1021 is nor gate, then all input terminals of the nor gate are required for connection d type flip flop
The ends Q of ZDR are high level, the output end of d type flip flops at different levels by nor gate output since the original state at the ends Q is 0
It equally also being capable of output multi-channel trigger signal.
Specifically, the D input terminals of+1 grade of d type flip flop ZDRk+1 of the output end of kth grade d type flip flop ZDRk and kth are connect, tool
Body is：
The D input terminals of+1 grade of d type flip flop ZDRk+1 in the ends Q of kth grade d type flip flop ZDRk and kth are connect；Or kth grade D is touched
The D input terminals of+1 grade of d type flip flop ZDRk+1 in the ends Q and kth of hair device ZDRk are connect.Since the ends Q of d type flip flop ZDR are exported with the ends Q
Signal phase on the contrary, therefore the D input terminals of K+1 grades of d type flip flop ZDRk+1 can be with the ends the Q phase of kth grade d type flip flop ZDRk
Also can be connected with the ends Q of kth grade d type flip flop ZDRk, this allows two kinds of connection types all the output end of d type flip flop ZDR can be made defeated
Go out the poor trigger signal of regularity.
By the utility model embodiment, when signal input unit 101 is defeated by the first input signal and the second input signal
When entering to the CK input terminals of d type flip flop ZDR at different levels with CKB input terminals, since multiple d type flip flop ZDR use cascade structure, then
The phase that the d type flip flop generates trigger signal according to the first input signal, the second input signal and reset signal has not really
Qualitative, the regularity of phase is poor, to which the shift register 102 can generate the irregular trigger signal of multichannel.
Preferably, Fig. 5 shows that the another kind that the utility model embodiment provides realizes the driving electricity that multiple LED light are disorderly dodged
The structural schematic diagram on road 10, compared with the structure of the driving circuit 10 shown in Fig. 1, the driving circuit 10 shown in Fig. 5
Logical unit 501 is further comprised, details are as follows：
The logical unit 501 is connect with shift register 102, and logical unit 501 gives birth to shift register 102
At the roads N trigger signals carry out logical operation after obtain multi-channel drive signal；The drive signal is respectively used to driving LED multi-path
Lamp；Specifically, if the regularity for the roads the N trigger signal that shift register 102 is generated is stronger, which is input to
When the unrest realized in LED light dodges ineffective, logical operation is carried out to the roads the N trigger signal by logical unit 501,
The multi-channel drive signal obtained by logical operation, wherein be correspondingly outputting to respectively in a LED light per drive signal all the way, by
It is random distribution in the phase of multi-channel drive signal, there is worse regularity, dodges effect to improve the random of multi-way LED lamp
Fruit.
Specifically, Fig. 6 shows the circuit structure diagram for the logical unit 501 that the utility model embodiment provides；In detail
It states as follows：
Include the per road logical operation module as shown in fig. 6, logical unit 501 includes multichannel logical operation module
Two logic gates 601 and third reverser 602；Wherein the output end of the input terminal of the second logic gate 601 and a d type flip flop ZDR connect
It connects, the output end of the second logic gate 601 is connect with the input terminal of third reverser 602, the output end output of third reverser 602
Drive signal L1, L2 ... LM, wherein M are greater than or equal to 1 positive integer.
Specifically, the second logic gate 601 includes at least two input terminal, each input terminal of second logic gate 601 connects
The output end of different d type flip flop ZDR；The input terminal of second logic gate 601 can be connected with the ends Q of d type flip flop ZDR,
It can be connected with the ends Q of d type flip flop ZDR, the letter inputted to the input terminal of the second logic gate 601 in logical unit 501
Number there are a variety of arbitrary combinations, the phase of the signal of 601 output end of the second logic gate output has arbitrariness, and second
In the multiple input end of logic gate 601, each input terminal connects the output end of different d type flip flop ZDR, ensure that the second logic
The signal that the output end of door 601 is exported has worse regularity, when through reverser y (p) output multi-channel drive signals, often
The phase of drive signal has randomness all the way, more preferably disorderly dodges effect to drive multiple LED light to realize.
Specifically, the second logic gate 601 is and door or door, XOR gate, same or door, NAND gate or nor gate；It is optional
, which may include the second logic gate 601 of multiple same types, and such as the second logic gate 601 is all exclusive or
Door；The logical unit 501 also may include the combination of multiple types logic gate simultaneously, can be simultaneously in such as the second logic gate 601
Including with door or door and same or door etc.；Since the logical unit 501 includes the second logic gate of multiple interconnections
601 and third reverser 602, and the input terminal of the second logic gate 601 can be appointed according to the output end of d type flip flop ZDR at different levels
Meaning combination, so that it is guaranteed that the multi-channel drive signal of the logical unit 501 output has very poor regularity, it is multiple to drive
LED realizes the function of disorderly dodging.
Preferably, the E is the odd number more than or equal to 5, in above-mentioned shift register 102, d type flip flop ZDR's
Quantity is the odd number more than or equal to 5, optionally, E 9,11,13 etc., when the d type flip flop in the shift register 102
ZDR series is more, and the regularity of the trigger signal exported per the output end (including the ends Q and the ends Q) of level-one d type flip flop is poorer,
The period of signal cycle is longer in the shift register 102, the rule for the trigger signal that final shift register 102 is exported
Property is poorer, and the effect that LED light is disorderly dodged is better.
In order to which the utility model embodiment is better described, above-mentioned driving electricity is illustrated below by a specific example
The operation principle on road 10, it is specific as follows：
If the driving circuit 10 includes 7 cascade d type flip flop ZDR：ZDR1, ZDR2 ... ZDR7, work as signal input unit
First input signal is input to the CK input terminals of d type flip flop ZDR at different levels and the second input signal is input to D at different levels by 101
The CKB input terminals of trigger ZDR, the first logic gate 1021 are the XOR gate xor for including two input terminals, wherein first logic
Door 1021 first input end connect with the ends Q of the 7th grade of d type flip flop ZDR7, the second input terminal of first logic gate 1021 and
The ends Q of 3rd level d type flip flop ZDR3 connect；Shift register 102 is according to first input signal, the second input signal and answers
Position signal generate multichannel trigger signal, wherein trigger signal A1, A2 ... the A7 that the ends d type flip flop Q at different levels are exported as shown in fig. 7,
Trigger signal A1B, A2B ... the A7B that the ends d type flip flop Q at different levels are exported per the ends Q of level-one d type flip flop as shown in figure 8, exported
The trigger signal opposite in phase that is exported of trigger signal and the ends Q, in conjunction with Fig. 7-Fig. 8, then the shift register 102 is exported
Trigger signal regularity is poor, chooses the arbitrary 6 tunnel trigger signal in the trigger signal, such as A1, A2B, A3, A4B, A5, A6B,
By this 6 tunnel, trigger signal is exported respectively into 6 LED light, due to the phase Arbitrary distribution of this 6 tunnel trigger signal, regularity compared with
Difference, therefore this 6 LED light show the effect disorderly dodged under the driving of the trigger signal.
If the trigger signal that the shift register 102 generates is transmitted in LED light, unrest that multiple LED light are realized
Dodge ineffective, the light source which is presented is still excessively dull；At this time effect is dodged in order to improve the random of above-mentioned 6 LED light
Fruit, accesses logical unit 501 after shift register 102, which includes 6 the second logic gates
601 and 6 third reversers 602, wherein Fig. 9 show in the logical unit 501 input terminal of each logic gate with
The connection diagram of d type flip flop ZDR output ends at different levels；As shown in figure 9, containing XOR gate xor in the logical unit 501
With with or door xnor, for example, in fig.9, the first input end of XOR gate xor connects the ends Q of above-mentioned 1st grade of d type flip flop ZDR1
The ends Q that the second input terminal of the trigger signal A1 exported, XOR gate xor connect above-mentioned 4th grade of d type flip flop ZDR4 are exported
Trigger signal A4B；It is similar, by Fig. 9 just known in the logical unit 501 input terminal of each logic gate with it is each
Connection relation between grade d type flip flop output end；When trigger signal is transmitted to the logical unit by shift register 102
When 501,6 logic gates and 6 reversers in logical unit 501 generate 6 road drive signal L1, L2 ... at random
L6, wherein Figure 10 show the oscillogram for the 6 road drive signals that logical unit 501 is generated.
By the oscillogram of drive signal illustrated in fig. 10 it is found that logical unit 501 generated per driving all the way
The phase of dynamic signal is arbitrary, and is had not regulation, when per drive signal is exported to each LED light all the way, due to this 6
The phase distribution regularity of road drive signal is very poor, therefore the light source of 6 LED light transmitting has randomness, and then shows
The effect disorderly dodged further solves the multichannel trigger signal generated by shift register 102, what which was realized
LED light disorderly dodges the problem that effect may be bad.
Figure 11 shows the structural schematic diagram for the LED light that the utility model embodiment provides, as shown in figure 11, the LED light
1101 include driving circuit 10 as described above；Corresponding control signal is provided to LED light 1101 by the driving circuit 10, is made
The LED light 1101 shows the effect disorderly dodged.
Work as signal since above-mentioned shift register contains multiple cascade d type flip flops by the utility model embodiment
When first input signal and the second input signal are transmitted in d type flip flop by input unit, multiple d type flip flops generate respectively
The poor trigger signal of multichannel phase random distribution, regularity, when the trigger signal is exported to LED light, multiple LED light are at this
The effect disorderly dodged is realized under the driving of trigger signal, further, if multiple LED light institute under the driving of the trigger signal is real
Existing unrest sudden strain of a muscle is ineffective, then carries out logical operation, the final logic to above-mentioned multichannel trigger signal by logical unit
Arithmetic element generates the poor drive signal of multichannel regularity, and multiple LED light realize more preferably under the driving of the drive signal
It is random dodge effect, avoid and realized by trigger signal and disorderly dodge the possible bad problem of effect；The driving circuit structure simultaneously
Simplicity produces the irregular drive signal of multichannel by the combination of multiple d type flip flops, logic gate and reverser etc., carries
High the random of LED light dodges effect；To efficiently solve LED lamp drive circuit in the prior art, to be difficult to Conduce Disciplinarian poor
Drive signal, cause the unrest of multiple LED light to dodge ineffective problem.
It should be noted that herein, such as first and second etc relational terms are used merely to an entity
Distinguished with another entity, without necessarily requiring or implying between these entities there are any this actual relationship or
Person's sequence.And the terms "include", "comprise" or any other variant are intended to non-exclusive inclusion, so that packet
Include the product of a series of elements or the element that structure is intrinsic.In the absence of more restrictions, by sentence " packet
Include ... " or " including ... " limit element, it is not excluded that at process, method, article or end including the element
There is also other elements in end equipment.In addition, herein, " being more than ", " being less than ", " being more than " etc. are interpreted as not including this
Number；" more than ", " following ", " within " etc. be interpreted as including this number.
The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this
All any modification, equivalent and improvement etc., should be included in the utility model made by within the spirit and principle of utility model
Protection domain within.
Claims (10)
1. a kind of driving circuit realized multiple LED light and disorderly dodged, for driving multi-way LED lamp, which is characterized in that including：
The signal input of input termination clock signal, the first input signal and the second input signal for generating opposite in phase is single
Member；
It is connect with the signal input unit, for according to first input signal, second input signal and reset
Signal generates the shift register of the roads N trigger signal；
Wherein, the shift register includes E cascade d type flip flops, described in the CK input terminations of d type flip flop described in j-th stage
First input signal, the CKB inputs of d type flip flop described in j-th stage terminate second input signal, d type flip flop described in j-th stage
It resets and terminates the reset signal, the output end of the kth grade d type flip flop connects with the D input terminals of+1 grade of the kth d type flip flop
It connects, the D input terminals of the 1st grade of d type flip flop are for connecting predetermined level signal, and the power end that the d type flip flop connects is for connecting
Power supply is connect, for being connected to ground, the output end output of each d type flip flop is respectively used to drive the ground terminal of the d type flip flop
The trigger signal of LED light described in the roads Dong Ge；
Wherein, N is positive integer more than or equal to 1, and E is the positive integer more than or equal to 2, and j is 1 to just whole between E
Number, k are 1 to the positive integer between E-1.
2. driving circuit according to claim 1, which is characterized in that the shift register further includes：First logic gate,
The output end of first logic gate is connect with the D input terminals of the 1st grade of d type flip flop, and first logic gate includes at least
Two input terminals, one of input terminal are connected with the output end of the E grades of d type flip flops, and other input terminal connections are arbitrary
The output end of the d type flip flop.
3. driving circuit according to claim 2, which is characterized in that first logic gate be and door or door, exclusive or
Door, same or door, NAND gate or nor gate.
4. driving circuit according to claim 3, which is characterized in that first logic gate be XOR gate, described first
Logic gate includes first input end and the second input terminal；
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, and the of first logic gate
Two input terminals are connect with the ends Q of the kth grade d type flip flop, or
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, and the of first logic gate
Two input terminals are connect with the ends Q of the kth grade d type flip flop.
5. driving circuit according to claim 3, which is characterized in that first logic gate be with or door, described first
Logic gate includes first input end and the second input terminal；
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, and the of first logic gate
Two input terminals are connect with the ends Q of the kth grade d type flip flop, or
The first input end of first logic gate is connect with the ends Q of the E grades of d type flip flops, and the of first logic gate
Two input terminals are connect with the ends Q of the kth grade d type flip flop.
6. driving circuit according to claim 1, which is characterized in that the signal input unit include the first reverser with
Second reverser；
The input of first reverser terminates the clock signal, and the output end output described first of first reverser is defeated
Enter signal, the output end of first reverser is connect with the input terminal of second reverser, second reverser it is defeated
Outlet exports second input signal.
7. driving circuit according to claim 1, which is characterized in that the output end of the kth grade d type flip flop and kth+1
The D input terminals connection of the grade d type flip flop, specially：
The ends Q of the kth grade d type flip flop are connect with the D input terminals of+1 grade of d type flip flop of kth, or
The ends Q of the kth grade d type flip flop are connect with the D input terminals of+1 grade of d type flip flop of kth.
8. driving circuit according to claim 1, which is characterized in that the driving circuit includes：With the shift LD
Device connects, and is respectively used to drive the drive of LED light described in each road for obtaining multichannel to the progress logical operation of the roads N trigger signal
The logical unit of dynamic signal.
9. driving circuit according to claim 8, which is characterized in that the logical unit includes multichannel logical operation
Module, often logical operation module described in road includes the second logic gate and third reverser；
Wherein, the input terminal of second logic gate is connect with the output end of a d type flip flop, second logic gate it is defeated
Outlet is connect with the input terminal of the third reverser, and the output end of the third reverser exports the drive signal.
10. according to the driving circuit described in any one of claim 1-9, which is characterized in that E is strange more than or equal to 5
Number.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820035402.9U CN207744202U (en) | 2018-01-09 | 2018-01-09 | A kind of driving circuit realized multiple LED light and disorderly dodged |
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| CN201820035402.9U CN207744202U (en) | 2018-01-09 | 2018-01-09 | A kind of driving circuit realized multiple LED light and disorderly dodged |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109861516A (en) * | 2019-01-25 | 2019-06-07 | 桂林电子科技大学 | A kind of soft starting circuit |
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2018
- 2018-01-09 CN CN201820035402.9U patent/CN207744202U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109861516A (en) * | 2019-01-25 | 2019-06-07 | 桂林电子科技大学 | A kind of soft starting circuit |
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