CN207719205U - A kind of RF switch - Google Patents
A kind of RF switch Download PDFInfo
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- CN207719205U CN207719205U CN201721788521.3U CN201721788521U CN207719205U CN 207719205 U CN207719205 U CN 207719205U CN 201721788521 U CN201721788521 U CN 201721788521U CN 207719205 U CN207719205 U CN 207719205U
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Abstract
The utility model discloses a kind of RF switch comprising:Substrate;The substrate contact region being formed in the substrate;The multiple RF switching units being formed in substrate, wherein each RF switching unit includes that the N+ source areas at the interval being formed in substrate and the drain regions N+, the grid oxic horizon positioned at the top of p-well region and between N+ source areas and the drain regions N+, the polysilicon gate above grid oxic horizon, the substrate contact region are connected with negative dc voltage source.Compared with prior art, RF switching unit in the utility model is not provided with well region, but substrate is connected with a negative voltage, the chip area shared by RF switch can be greatly reduced in this way, while also can guarantee tolerance power ability still to reach the requirement of middle low power switch.
Description
【Technical field】
The utility model is related to semiconductor applications, more particularly to a kind of CMOS technology without trap RF switch.
【Background technology】
The RF switch of existing CMOS (Complementary Metal Oxide Semiconductor) technique is set
Meter:Generally use triple-well process:Radiofrequency signal is isolated in p-well, Deep-nwell and p-sub tri- layers of trap, is penetrated with reaching raising
The purpose of frequency pressure resistance.
Fig. 1 is a kind of existing cross section structure schematic diagram of the physical arrangement of the RF switch of CMOS technology.As shown in Figure 1
, the RF switch includes substrate p-sub and multiple RF switching units for being formed on the substrate p-sub, the lining
It is formed in the p-sub of bottom in substrate contact region SUB, Fig. 1 and illustrates two RF switching units, actually it may include having
More RF switching units.Each RF switching unit includes the deep N-well area Deep- being formed in the substrate p-sub
Nwell, the p-well region p-well being formed in deep N-well area Deep-nwell, the deep N being formed in deep N-well area Deep-nwell
Trap contact zone V_NW, N+ source area SOURCE, N+ drain region DRAIN at the interval being formed in p-well region p-well and p-well connect
Touch area BODY, positioned at the top of p-well region p-well and the grid oxygen between N+ source area SOURCE and N+ drain region DRAIN
Change layer 110, the polysilicon gate GATE above grid oxic horizon.The p-well contact zone BODY of wherein p-well region p-well connects
The DC offset voltage connect is controlled by control signal, the direct current of the deep N traps contact zone V_NW connections of deep N-well area Deep-nwell
Bias voltage general control is in ﹢ 3V or so, and the bias voltage of the substrate contact region SUB connections of substrate p-sub is usually to be connected to
0V(GND).Meanwhile in order to improve ac voltage withstanding, it will usually divide in such a way that multiple RF switching units stack (stack)
Alternating voltage is carried on a shoulder pole, i.e., the source electrode of one RF switching unit can be connected with the drain electrode of adjacent RF switch, each RF switch
The grid of unit can interconnect, and form concatenated RF switching unit combination.The deep N of adjacent RF switching unit
There is certain interval between well region Deep-nwell.
This stacked structure, although the Insertion Loss of the RF switch of CMOS technology and isolation can be dropped to it is low as far as possible,
But chip area is significantly increased, the spacing between deep N-well area is very important, leads to the RF switch 30% of CMOS technology
Area be all wasted in the centre for stacking RF switching unit, and also lead to the area ratio SOI of the RF switch of CMOS technology
The area of the RF switch of technique it is big it is many (under the conditions of same RF switch W/L (breadth length ratio), the face of CMOS RF switches
Product is twice or so of SOI RF switches), this significantly impacts the universal of CMOS RF switches.
It is therefore desirable to provide a kind of new solution to solve the above problems.
【Utility model content】
One of the purpose of this utility model is to provide a kind of RF switch of improved CMOS technology, is not provided with trap
The chip area shared by RF switch can be greatly reduced in area in this way.
In order to realize that the purpose of this utility model, the utility model provide a kind of RF switch comprising:Negative dc voltage
Source;Substrate;The substrate contact region being formed in the substrate;The multiple RF switching units being formed in substrate, wherein each
RF switching unit include the interval being formed in substrate N+ source areas and the drain regions N+, positioned at the top of p-well region and be located at N
Grid oxic horizon between+source area and the drain regions N+, the polysilicon gate above grid oxic horizon, the substrate contact
Area is connected with negative dc voltage source.The voltage in the negative dc voltage source of the substrate contact region connection of substrate is -3.5V.Multiple radio frequencies
Switch unit is serially connected, and the source electrode of a RF switching unit can be connected with the drain electrode of adjacent RF switch, each radio frequency
The grid of switch unit can interconnect.
Compared with prior art, the RF switching unit in the utility model is not provided with well region, but by substrate and one
Negative voltage is connected, and the chip area shared by RF switch can be greatly reduced in this way, while also can guarantee tolerance power ability still
The old requirement that can reach middle low power switch.
【Description of the drawings】
It will be better understood in conjunction with refer to the attached drawing and next detailed description, the utility model, wherein same attached drawing
The corresponding same structure member of label, wherein:
Fig. 1 illustrates the schematic cross-section of the physical arrangement of existing RF switch;
Fig. 2 illustrates the schematic cross-section of the physical arrangement of the RF switch of the utility model.
【Specific implementation mode】
To keep the above objects, features, and advantages of the utility model more obvious and easy to understand, below in conjunction with the accompanying drawings and have
Body embodiment is described in further detail the utility model.
Fig. 2 illustrates the schematic cross-section of the physical arrangement of the RF switch of the utility model.As shown in Fig. 2, institute
RF switch is stated to include substrate p-sub, the substrate contact region SUB that is formed in the substrate p-sub, be formed in substrate p-sub
Interior multiple RF switching units.Two RF switching units are illustrated in Fig. 2, actually it may include there are more to penetrate
Frequency switch unit.Each RF switching unit includes N+ source areas SOURCE and the N+ leakage at the interval being formed in substrate p-sub
Polar region DRAIN, positioned at the top of substrate p-sub and the grid between N+ source area SOURCE and N+ drain region DRAIN
Oxide layer 210, the polysilicon gate GATE above grid oxic horizon.Multiple RF switching units are serially connected, and one is penetrated
The source electrode of frequency switch unit can be connected with the drain electrode of adjacent RF switch, and the grid of each RF switching unit can be connected with each other
Together, concatenated RF switching unit combination is formed.
In fig. 2, N+ source area SOURCE, N+ drain region DRAIN, the polysilicon gate of one of RF switching unit
Pole GATE is respectively labeled as SOURCE1, DRAIN1, GATE1, N+ source areas SOURCE, N+ of another RF switching unit
Drain region DRAIN, polysilicon gate GATE are respectively labeled as SOURCE2, DRAIN2, GATE2.
In this way, multiple RF switching units in the utility model can not use deep N-well area Deep-nwell and P
The structure of well region p-well greatly reduces the area of RF switching unit occupancy.
When RF switch in Fig. 1 is in the conduction state, high-power RF signal is in drain D RAIN and source electrode
SOURCE can occur, and according to currently existing scheme, SUB connects AC deposition (GND), then drain D RAIN and source S OURCE are just
Pressure resistance to access (from drain D RAIN and source S OURCE to substrate) is Vr11+Vd12+Vr13, drain D RAIN and source electrode
The pressure resistance of the backward channel (from substrate to drain D RAIN and source S OURCE) of SOURCE is Vd11+Vr12+Vd13, wherein
Vr11, Vr12, Vr13 indicate the reverse bias voltage of parasitic diode D11, D12, D13, Vd11, Vd12, Vd13 difference respectively
Indicate the forward bias voltage of parasitic diode D11, D12, D13, it is contemplated that the 3.3V CMOS technologies of standard, general diode
Reverse bias voltage Vr=8V, forward bias voltage Vd=1V, calculate in this way, the maximum of forward path and backward channel is resistance to
Pressure is 17V and 10V respectively, therefore minimum withstanding voltage is about just 10V.
As shown in Fig. 2, after RF switching unit using no trap, substrate p-sub to SOURCE/DRAIN just only there are one
Parasitic diode D1, as SOURCE/DRAIN plus negative voltage, RF switching unit can only be resistant to the negative voltage of 1V, and (D1 is just
To conducting), that is, 13dBm power, this is far from the requirment.
The DC voltage that the utility model connects substrate p-sub as a result, is reduced into negative voltage, to balance positively and negatively
Power capability.The i.e. described substrate contact region SUB is connected with a negative dc voltage source (not shown).According to Vd=1V, Vr=
8V is calculated, wherein Vd is diode D1 forward conduction voltage drops, and Vr is diode D1 breakdown reverse voltages, it should by substrate contact
The voltage bias of area SUB is in (1-8)/2=-3.5V.Under these conditions, the maximum pressure resistance point of forward path and backward channel
It is not 4.5V and 4.5V, the power that RF switch is resistant to is 26dBm.And the RF switch of three trap cmos techniques is used, generally
Power tolerance is between 31dBm~32dBm.Certainly, the voltage value in the negative dc voltage source can also be -3V to -4V
Between other values.
To sum up, can be by the area reduction half or so of RF switch by the design of the utility model, while tolerance power
Ability can still reach the requirement of middle low power switch.
Above description fully discloses specific embodiment of the present utility model.It should be pointed out that being familiar with the neck
Right of any change that the technical staff in domain does specific embodiment of the present utility model all without departing from the utility model
The range of claim.Correspondingly, the scope of the claims of the utility model is also not limited only to the specific embodiment party
Formula.
Claims (3)
1. a kind of RF switch, which is characterized in that it includes:
Substrate;
Negative dc voltage source;
The substrate contact region being formed in the substrate is connected with the negative dc voltage source;
The multiple RF switching units being formed in substrate;With
Wherein each RF switching unit include the interval being formed in substrate N+ source areas and the drain regions N+, be located at p-well region
Top and the grid oxic horizon between N+ source areas and the drain regions N+, the polysilicon gate above grid oxic horizon
Pole.
2. RF switch according to claim 1, which is characterized in that the negative dc voltage of the substrate contact region connection of substrate
The voltage in source is -3V to -4V.
3. RF switch according to claim 1, which is characterized in that multiple RF switching units are serially connected, and one is penetrated
The source electrode of frequency switch unit can be connected with the drain electrode of adjacent RF switch, and the grid of each RF switching unit can be connected with each other
Together.
Priority Applications (1)
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CN201721788521.3U CN207719205U (en) | 2017-12-19 | 2017-12-19 | A kind of RF switch |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201721788521.3U CN207719205U (en) | 2017-12-19 | 2017-12-19 | A kind of RF switch |
Publications (1)
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CN207719205U true CN207719205U (en) | 2018-08-10 |
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CN201721788521.3U Active CN207719205U (en) | 2017-12-19 | 2017-12-19 | A kind of RF switch |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10665584B1 (en) | 2019-03-07 | 2020-05-26 | Hong Kong Applied Science and Technology Research Insstitute Company, Limited | Low capacitance and high-holding-voltage transient-voltage-suppressor (TVS) device for electro-static-discharge (ESD) protection |
-
2017
- 2017-12-19 CN CN201721788521.3U patent/CN207719205U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10665584B1 (en) | 2019-03-07 | 2020-05-26 | Hong Kong Applied Science and Technology Research Insstitute Company, Limited | Low capacitance and high-holding-voltage transient-voltage-suppressor (TVS) device for electro-static-discharge (ESD) protection |
WO2020177141A1 (en) * | 2019-03-07 | 2020-09-10 | Hong Kong Applied Science and Technology Research Institute Company Limited | Low capacitance and high-holding-voltage transient-voltage-suppressor (tvs) device for electro-static-discharge (esd) protection |
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