CN207718365U - It is a kind of to realize that serial ports is one-to-many and the circuit of many-one communication - Google Patents
It is a kind of to realize that serial ports is one-to-many and the circuit of many-one communication Download PDFInfo
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- CN207718365U CN207718365U CN201820164475.8U CN201820164475U CN207718365U CN 207718365 U CN207718365 U CN 207718365U CN 201820164475 U CN201820164475 U CN 201820164475U CN 207718365 U CN207718365 U CN 207718365U
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Abstract
It realizing that serial ports is one-to-many and the circuit of many-one communication the utility model discloses a kind of, is related to serial bus communication technical field, more particularly to serial ports is one-to-many or the many-to-one communication mode of timesharing.One and gate device unit are applied in the utility model, this accesses the transmitting terminal of main control chip serial ports with door input pin, the variation of the logical truth presented as data are sent, vacation that show, another input pin connects power supply, continuous exhibition is logical truth, the reception of the different controlled chip serial ports of output end connection, a rs 232 serial interface signal of input is passed through and exports multiple rs 232 serial interface signals with door processing；Multiple rs 232 serial interface signals of timesharing are passed through and are output to the same port with door processing to realize that the many-to-one serial data of one-to-many simultaneously or timesharing transmits.Compared to the prior art, above-mentioned based on realizing that the mode that serial ports is one-to-many or timesharing many-one communicate more saves hardware resource with door, software cooperation is not needed, is operated simple yet.
Description
Technical field
It is one-to-many and many-one communicates more particularly, to a kind of realization serial ports the utility model is related to field of communication technology
Circuit.
Background technology
With the application of computer system and the development of microcomputer network, communication function increasingly seems important, serial communication
It is a kind of telecommunication circuit relatively common in communication function, and one-to-many or many-one serial communication demand is more and more.
In the prior art, one-to-many or many-to-one serial communication generally passes through and multiplexes chip or analog switch
It realizes, both realization methods are required to additional master control pin control, account for hardware resource, software is needed to coordinate, had
Channel selecting action is imitated, it is complicated for operation.
Utility model content
It realizing that serial ports is one-to-many and the circuit of many-one communication the main purpose of the utility model is to provide a kind of, uses
Existing one-to-many in solving, many-one serial communication is cumbersome, problem of resource waste.
To achieve the above object, the utility model embodiment, which provides, a kind of realizing that serial ports is one-to-many and many-one communication
Circuit, including：With gate device unit, multiple main control chips, multiple controlled chips, power supply and multiple resistance；
Described with gate device unit includes multigroup and door, described multigroup to be connect with first group of door and the first input pin of door
One end of the first resistor of the multiple resistance, the other end of the first resistor connect the output end of the power supply, and described
One group is connected with the second input pin of door with the serial ports transmitting terminal of the first main control chip of the multiple main control chip, and described
Two groups are connected with the output pin of door with the receiving terminal of the serial ports of the first controlled chip of the multiple controlled chip；
The serial ports transmitting terminal phase of the first input pin and first main control chip of described multigroup second group with door and door
Connection, the second input pin of described second group and door connect one end of the second resistance of the multiple resistance, the second resistance
The other end connect the output end of the power supply, the second quilt of the output pin and the multiple controlled chip of described first group and door
The serial ports receiving terminal of control chip is connected；
Multigroup second main control chip with the first input pin and the multiple main control chip of the third group and door of door
Serial ports transmitting terminal be connected, the second input pin of the third group and door and the third main control chip of the multiple main control chip
The transmitting terminal of serial ports connects, and the output pin of the third group and door is controlled the serial ports of chip with the third of the multiple controlled chip
Receiving terminal is connected.
The one-to-many telecommunication circuit of serial ports provided by the utility model, according to the control chip of different number and with door, pass through
Main control chip transmits signal, by being handled with door, is output to controlled chip, realizes one-to-many or many-to-one telecommunication circuit,
Avoid cumbersome operation, the wasting of resources.
Description of the drawings
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is some embodiments of the utility model, for those skilled in the art, without creative efforts, also
It can be obtain other attached drawings according to these attached drawings.
What Fig. 1 was that the utility model embodiment provides a kind of realizing that serial ports is one-to-many and the original of the circuit of many-one communication
Reason figure.
Specific implementation mode
It, below will knot to enable the purpose of utility model, feature, advantage of the utility model more apparent and understandable
The attached drawing in the utility model embodiment is closed, the technical scheme in the utility model embodiment is clearly and completely described,
Obviously, the described embodiments are only a part of the embodiments of the utility model, and not all embodiments.Based on the utility model
In embodiment, the every other embodiment that those skilled in the art are obtained without making creative work, all
Belong to the range of the utility model protection.
What Fig. 1 was that the utility model embodiment provides a kind of realizing that serial ports is one-to-many and the original of the circuit of many-one communication
Reason figure states the principle of entire circuit work with three groups with door for ease of description in the present embodiment, can in practical application
To increase the quantity with door as needed.
As shown in Figure 1, the circuit includes：With gate device unit 1, multiple main control chips, multiple controlled chips, power supply 4 with
And multiple resistance；
With gate device unit 1 include multigroup and door, it is multigroup connect with first group of door with the first input pin 111 of door 11 it is more
One end of the first resistor 51 of a resistance, the output end of the other end connection power supply 4 of first resistor 51, first group and the of door 11
Two input pins 112 are connected with the serial ports transmitting terminal 211 of the first main control chip 21 of multiple main control chips, first group with door 11
Output pin 113 is connected with the receiving terminal 311 of the serial ports of the first controlled chip 31 of multiple controlled chips.
Further, multigroup second group with door with the serial ports of the first input pin 121 and the first main control chip 21 of door 12
Transmitting terminal 211 is connected, one end of second group of second resistance 52 that multiple resistance are connect with the second input pin 122 of door 12, the
The output end of the other end connection power supply 4 of two resistance 52, second group and the second of the output pin 123 of door 12 and multiple controlled chips
The serial ports receiving terminal 321 of controlled chip 32 is connected.
Further, multigroup third group and the first input pin 131 of door 13 and the second master of multiple main control chips with door
The serial ports transmitting terminal 221 of control chip 22 is connected, the third of third group and the second input pin 132 and multiple main control chips of door 13
The transmitting terminal 231 of 23 serial ports of main control chip connects, and third group and the output pin 133 of door 13 and the third of multiple controlled chips are controlled
The serial ports receiving terminal 331 of chip 33 is connected.
Further, connect 51 one end of first resistor with the first input pin 111 of door 11 for first group, first resistor 51 it is another
One end connects power supply 4 so that the level of first group and the first input pin 111 of door 11 is continuously high level, then first group and door
The logical value of 111 the first input pin 111 performance is continuously very.
Further, first group of serial ports transmitting terminal 211 that the first main control chip 21 is connect with 11 second input pin 112 of door,
So that first group with transmit in the level of the second input pin 112 of door 11 and the serial ports transmitting terminal 211 of the first main control chip 21
The variation level of data is consistent, and first group of logical value showed with the second input pin 112 of door 11 is changing true
False logical value, then first group with 11 output pin 113 of door performance true and false logical value then with first group and the second input pin of door 11
The logical value of 112 performances is consistent, and first group sends with the level of 11 output pin 113 of door and the serial ports of the first main control chip 21
The level of the data of 211 transmission of end is consistent.
Further, it is connected with the output pin 113 of door 11 with the serial ports receiving terminal 311 of the first controlled chip 31 for first group
It connects, then the level of the level of the serial ports receiving terminal 311 of the first controlled chip 31 and first group and the output pin 113 of door 11 keeps one
It causes.
Further, connect 52 one end of second resistance with the second input pin 122 of door 12 for second group, second resistance 52 it is another
One end connects power supply 4 so that the level of second group and the second input pin 122 of door 12 is continuously high level, then second group and door
The logical value of 12 the second input pin 122 performance is continuously very.
Further, second group of serial ports transmitting terminal 211 that the first main control chip 21 is connect with 12 first input pin 121 of door,
So that second group with transmit in the level of the first input pin 121 of door 12 and the serial ports transmitting terminal 311 of the first main control chip 31
The variation level of data is consistent, and second group of logical value showed with the first input pin 121 of door 12 is changing true
False logical value, then second group with 12 output pin 123 of door performance true and false logical value then with second group and the first input pin of door 12
The logical value of 121 performances is consistent, and second group sends with the level of 12 output pin 123 of door and the serial ports of the first main control chip 21
The level of the data of 211 transmission of end is consistent.
Further, it is connected with the output pin 123 of door 12 with the serial ports receiving terminal 321 of the second controlled chip 32 for second group
It connects, then the level of the level of the serial ports receiving terminal 321 of the second controlled chip 32 and second group and the output pin 123 of door 12 keeps one
It causes.
At least two or more sets are consistent with the result that door is showed with gate device unit 1, when the first main control chip 21
When serial ports transmitting terminal 211 has data transmission, there are two or multiple controlled chip serial ports have a data receiver, realize one-to-many simultaneously
Serial data transmission.
Further, third group is separately connected the second master control with the first input pin 131 of door 13 and the second input pin 132
The serial ports transmitting terminal 221 of chip 22 and the serial ports transmitting terminal 231 of third main control chip 23, when the serial ports of the second master control core 22 is sent out
When the serial ports transmitting terminal 231 of sending end 221 or third main control chip 23 has data transmission, two input pins of third group and door 13
Level can with the level change of data present low and high level variable condition, corresponding logical value then be true and false variable condition.
Further, when the serial ports transmitting terminal 221 of the second main control chip 22 is sent without data, third group and door 13
First input pin, 131 level continuous exhibition is high level, and counterlogic value is then continuously very, when the serial ports of third main control chip 23
When transmitting terminal 231 is sent without data, the 132 level continuous exhibition of the second input pin of third group and door 13 is high level, corresponding
Logical value is then continuously very.
Further, third group connect the serial ports reception foot 331 that third is controlled chip 33 with 13 output pin 133 of door, due to
Had ensured that in circuit will not there are two and the above main control chip serial ports transmitting terminal transmission data simultaneously, so third and door 13
Two input pins only can be there are one having a low and high level variation, and 13 output pin 133 of third group and door just only can be with uniquely changing
The variation of input pin level and change, then the data timesharing for realizing two main control chip serial ports is sent to the same controlled chip
In, realize the many-to-one serial data transmission of timesharing.
Further, can according to the control chip of different number, select different number with door, main control chip, controlled core
Piece is achievable while the many-to-one serial data of one-to-many or timesharing transmits.
In the utility model embodiment, according to the control chip of different number and with door, by main control chip transmit signal,
By being handled with door, it is output to controlled chip, one-to-many or many-to-one telecommunication circuit is realized, avoids cumbersome operation, provide
Source wastes.
It is a kind of realizing retouching for serial ports is one-to-many and many-one communicates circuit to provided by the utility model above
It states, for those skilled in the art, based on the idea of the embodiment of the present invention, in specific embodiments and applications
There will be changes, to sum up, the content of the present specification should not be construed as a limitation of the present invention.
Claims (6)
1. a kind of realizing that serial ports is one-to-many and the circuit of many-one communication, which is characterized in that including：With gate device unit, more
A main control chip, multiple controlled chips, power supply and multiple resistance；
Described with gate device unit includes multigroup and door, it is described it is multigroup connect with first group of door and the first input pin of door described in
One end of the first resistor of multiple resistance, the other end of the first resistor connect the output end of the power supply, described first group
It is connected with the second input pin of door with the serial ports transmitting terminal of the first main control chip of the multiple main control chip, described first group
It is connected with the output pin of door with the receiving terminal of the serial ports of the first controlled chip of the multiple controlled chip；
Multigroup second group with door is connected with the first input pin of door with the serial ports transmitting terminal of first main control chip,
Second input pin of described second group and door connects one end of the second resistance of the multiple resistance, the second resistance it is another
End connects the output end of the power supply, the second controlled chip of the output pin and the multiple controlled chip of described second group and door
Serial ports receiving terminal be connected；
Multigroup string with the second main control chip of the first input pin and the multiple main control chip of the third group and door of door
Mouth transmitting terminal is connected, the second input pin of the third group and door and the third main control chip serial ports of the multiple main control chip
Transmitting terminal connection, the serial ports that the output pin of the third group and door is controlled chip with the third of the multiple controlled chip receives
End is connected.
2. circuit according to claim 1, which is characterized in that the first input pin connection of described first group and door described the
One resistance one end, the other end of the first resistor connect the power supply so that the first input pin of described first group and door
Level is continuously high level, then the logical value of the first input pin performance of described first group and door is continuously very；
The described first group serial ports transmitting terminal that first main control chip is connect with two input pin of the family status so that described first group with
The variation level for the data transmitted in the level of the second input pin of door and the serial ports transmitting terminal of first main control chip is kept
Unanimously, the logical value of the second input pin performance of described first group and door is changing true and false logical value, then described first
Logical value of the true and false logical value that group is showed with door output pin then with described first group and the second input pin performance of door keeps one
It causes, the level of the described first group data transmitted with the serial ports transmitting terminal of first main control chip with the level of door output pin is protected
It holds consistent；
Described first group is connected with the output pin of door with the serial ports receiving terminal of the described first controlled chip, then described first is controlled
The level of the serial ports receiving terminal of chip and the level of described first group and the output pin of door are consistent.
3. circuit according to claim 2, which is characterized in that the second input pin connection of described second group and door described the
Two resistance one end, the other end of the second resistance connect the power supply so that the second input pin of described second group and door
Level is continuously high level, then the logical value of the second input pin performance of described second group and door is continuously very；
The described second group serial ports transmitting terminal that first main control chip is connect with one input pin of the family status so that described second group with
The variation level for the data transmitted in the level of the first input pin of door and the serial ports transmitting terminal of first main control chip is kept
Unanimously, the logical value of the first input pin performance of described second group and door is changing true and false logical value, then described second
Logical value of the true and false logical value that group is showed with door output pin then with described second group and the first input pin performance of door keeps one
It causes, the level of the described second group data transmitted with the serial ports transmitting terminal of first main control chip with the level of door output pin is protected
It holds consistent；
Described second group is connected with the output pin of door with the serial ports receiving terminal of the described second controlled chip, then described second is controlled
The level of the serial ports receiving terminal of chip and the level of described second group and the output pin of door are consistent.
4. circuit according to claim 3, which is characterized in that at least two or more sets and the door with gate device unit
The result showed is consistent, when the transmitting terminal of the first main control chip serial ports has data transmission, there are two or it is multiple controlled
Chip serial ports has data receiver, realizes serial data transmission one-to-many simultaneously.
5. circuit according to claim 4, which is characterized in that the third group is separately connected described with two input pins of door
The serial ports transmitting terminal of the serial ports transmitting terminal of second main control chip and the third main control chip, when the string of the second master control core
When the serial ports transmitting terminal of mouth transmitting terminal or the third main control chip has data transmission, two inputs of the third group and door
Low and high level variable condition can be presented in the level of foot with the level change of data, and corresponding logical value is then true and false variation shape
State；
When the serial ports transmitting terminal of second main control chip does not have data transmission, the first input pin electricity of the third group and door
Flat continuous exhibition is high level, and counterlogic value is then continuously very, when the serial ports transmitting terminal of the third master control core does not have data
When transmission, the second input pin level continuous exhibition of the third group and door is high level, and counterlogic value is then continuously very；
The third group connect the serial ports reception foot that the third is controlled chip with door output pin, will not due to being had ensured that in circuit
There are two and the above main control chip serial ports transmitting terminal transmission data simultaneously, so two input pins of the third group and door
Can be there are one low and high level variation be had, the third group just only can be with the change of the input pin level uniquely changed with door output pin
Change and change, then the data timesharing for realizing two main control chip serial ports is sent in the same controlled chip, realizes timesharing
Many-to-one serial data transmission.
6. circuit according to claim 5, which is characterized in that different number can be selected according to the control chip of different number
Can realize that the many-to-one serial data of one-to-many simultaneously or timesharing transmits with door, main control chip, controlled chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820164475.8U CN207718365U (en) | 2018-01-30 | 2018-01-30 | It is a kind of to realize that serial ports is one-to-many and the circuit of many-one communication |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820164475.8U CN207718365U (en) | 2018-01-30 | 2018-01-30 | It is a kind of to realize that serial ports is one-to-many and the circuit of many-one communication |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207718365U true CN207718365U (en) | 2018-08-10 |
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ID=63053087
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820164475.8U Active CN207718365U (en) | 2018-01-30 | 2018-01-30 | It is a kind of to realize that serial ports is one-to-many and the circuit of many-one communication |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207718365U (en) |
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2018
- 2018-01-30 CN CN201820164475.8U patent/CN207718365U/en active Active
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