CN207652443U - A kind of mini signals solution tuned plate - Google Patents

A kind of mini signals solution tuned plate Download PDF

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Publication number
CN207652443U
CN207652443U CN201721873530.2U CN201721873530U CN207652443U CN 207652443 U CN207652443 U CN 207652443U CN 201721873530 U CN201721873530 U CN 201721873530U CN 207652443 U CN207652443 U CN 207652443U
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China
Prior art keywords
module
fpga
signal
circuit
tunnel
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CN201721873530.2U
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Chinese (zh)
Inventor
刘忠
石滔
吴杰
张滔
徐栋
陈超育
郭运动
邓衡军
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Changsha Deep Pupil Mdt Infotech Ltd
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Changsha Deep Pupil Mdt Infotech Ltd
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Abstract

The utility model discloses a kind of mini signals solution tuned plates, including 8 tunnel photoelectric detection modules, signal conditioning circuit, 8 tunnel selecting switch, analog to digital conversion circuit, FPGA module, D/A converting circuit, light intensity control, MCU module and RS485 conversion circuits, 8 tunnel photoelectric detection module, signal conditioning circuit, 8 tunnel selecting switch, analog to digital conversion circuit, FPGA module, D/A converting circuit, light intensity control is sequentially connected, analog-digital conversion circuit as described also with MCU module, RS485 conversion circuits are sequentially connected, the FPGA module also with D/A converter module, modulated signal part is sequentially connected.The utility model has the characteristics that small, reasonable for structure, suitable popularization and application.

Description

A kind of mini signals solution tuned plate
Technical field
The utility model belongs to technical field of optical fiber sensing, is related to a kind of mini signals solution tuned plate.
Background technology
To complete to return to the demodulation work of optical signal in fibre optic hydrophone from probe, needs one piece to be appropriately embed formula and set It is standby.The equipment is converted to electric signal after receiving optical signal, by optical signal according to certain condition, by signal condition it After be converted to digital signal, be sent in embedded chip and carry out algorithm process, and operation result is exported.In this process, Embedded device also needs to the power of energy real-time feedback control optical signal, and other outsides are added during algorithm process and set Standby information.Meanwhile the equipment volume wants small, power consumption wants low.General signal processing equipment on the market cannot meet the insertion A kind of mini signals solution tuned plate is badly in need of in the requirement of formula equipment in the prior art.
Utility model content
The purpose of the utility model is to provide a kind of mini signals solution tuned plates.
Its technical solution is as follows:
A kind of mini signals solution tuned plate, including 8 tunnel photoelectric detection modules, signal conditioning circuit, 8 tunnel selecting switch, modulus Conversion circuit, FPGA module, D/A converting circuit, light intensity control, MCU module and RS485 conversion circuits, 8 road photoelectricity Detecting module, signal conditioning circuit, 8 tunnel selecting switch, analog to digital conversion circuit, FPGA module, D/A converting circuit, intensity control Device is sequentially connected, and analog-digital conversion circuit as described is also sequentially connected with MCU module, RS485 conversion circuits, the FPGA module also with D/A converter module, modulated signal part are sequentially connected.
Further, the signal conditioning circuit includes 8 tunnels.
Further, 8 tunnel selecting switch selects 1 multiple selector using 24 multiple selector for selecting 1 and 12.
The beneficial effects of the utility model:
The logical resource for possessing 120KLE and 576 hardware multipliers are used in the mini signal solution tuned plates of the utility model A piece of FPGA, it is sufficient to accommodate classical PGC demodulating algorithms after optimization, wherein MCU uses Cortex-M4 kernels, 32bit bit wides, dominant frequency are a chip of 168MHz, which possesses hardware computation unit simultaneously, can carry out in the monocycle Single precision multiplication and division operation is done, this occasion of less demanding to calculation amount is relatively suitble to.The utility model also has light intensity control Device module processed exports the optical signal that light source generates by certain optical attenuation again later.The ratio of the decaying is by FPGA roots Real-time feedback adjustment is carried out according to the light intensity signal received by photoelectric detection module.Ensure that the light signal strength received is being set Within the scope of standby best effort.The utility model has the characteristics that small, reasonable for structure, suitable popularization and application.
Description of the drawings
Fig. 1 is the structural schematic diagram of the utility model mini signal solution tuned plates;
Fig. 2 is the work flow diagram of the utility model mini signal solution tuned plates.
Specific implementation mode
The technical solution of the utility model is described in more detail with reference to the accompanying drawings and detailed description.
Referring to Fig.1, a kind of mini signals solution tuned plate, including 8 tunnel photoelectric detection modules, signal conditioning circuit, 8 tunnels selection open Pass, analog to digital conversion circuit, FPGA module, D/A converting circuit, light intensity control, MCU module and RS485 conversion circuits, described 8 Road photoelectric detection module, signal conditioning circuit, 8 tunnel selecting switch, analog to digital conversion circuit, FPGA module, D/A converting circuit, light Strong controller is sequentially connected, and analog-digital conversion circuit as described is also sequentially connected with MCU module, RS485 conversion circuits, the FPGA moulds Block is also sequentially connected with D/A converter module, modulated signal part.
The signal conditioning circuit includes 8 tunnels.
8 tunnel selecting switch selects 1 multiple selector using 24 multiple selector for selecting 1 and 12.
Above each component part is described in detail below.
Photoelectric detection module is using a multichannel, the photodetector of small-sized encapsulated, the light that will be received from probe Signal is converted into analog electrical signal.
Signal conditioning circuit for be converted to per optical signal all the way come electric signal, take individual signal condition mode, By the level range control of electric signal to the section that can be received by AD, unwanted high-frequency signal is filtered out to avoid as far as possible Aliasing effect improves signal-to-noise ratio.And the noise by the way of single-ended transfer difference during control signal transmission.
8 tunnel selecting switch use a 8 tunnel selecting switch, and the electric signal timesharing that 8 road optical signals are converted to is merged into one On the high speed signal of road, equipment scale is reduced.The 8 tunnel selecting switch is controlled by FPGA, is matched with module is resolved.
In order to reach the requirement of signal driving capability, multiple selector that equipment selects 1 using 24 and 12 select 1 multichannel Selector realizes a 8 tunnel selecting switch.
Analog to digital conversion circuit:In order to reduce the crosstalk between channel, equipment, which uses, has 125MSPS sample rates, 16bit The a piece of low noise modulus conversion chip of sampling precision, has LVDS output modes, is received convenient for FPGA.In addition, the chip can To receive the clock for coming from FPGA, keep the data that FPGA is received more controllable.
FPGA portion uses a piece of FPGA of the logical resource and 576 hardware multipliers that possess 120KLE, it is sufficient to accommodate Classical PGC demodulating algorithms after optimization.
FPGA portion multiplexes chip by control, gives the clock signal of analog-to-digital conversion module, and control AD timesharing is adopted The signal of sample difference optical channel.The signal in each channel is passed through into classics PGC demodulating algorithm modules respectively, and will be after the completion of demodulation Acoustical signal data send MCU to class SRAM interface agreement.
FPGA also needs to the modulated signal that the parts control DA generate specific frequency particular phases.
FPGA controls D/A converting circuit outputs level signals, the light intensity signal of control optical attenuator output.
The acoustical signal data after resolving mainly are read in the parts MCU with class SRAM agreements from FPGA, and pass through ICP/IP protocol Stack module is sent by interface of cable.Specifically, ICP/IP protocol stack part uses hardware ICP/IP protocol chip stack W5500.Meanwhile MCU can also receive the instruction from host computer in a debug state, adjust the demodulation parameter of FPGA in real time.
It is a chip of 168MHz that MCU, which uses Cortex-M4 kernels, 32bit bit wides, dominant frequency, which possesses simultaneously Hardware computation unit can carry out doing single precision multiplication and division operation in the monocycle, relatively be suitble to this of less demanding to calculation amount Occasion.
MCU is communicated with FPGA using class SRAM agreements, while the start and stop of FPGA are controlled by MCU.
MCU needs to receive the signal from external electrical compass by RS485 conversion circuits, believes with FPGA treated sound Number participates in operation together.
Modulated signal part:The equipment using the settling time of a piece of output accuracy for having 16 and 0.5us number Mould conversion chip generates the modulated signal of a specific frequency particular phases to light source.
Light intensity control has light intensity control module, and the optical signal that light source is generated passes through after certain optical attenuation again Secondary output.The ratio of the decaying carries out real-time feedback adjustment by FPGA according to the light intensity signal received by probe.Ensure to connect The light signal strength received is within the scope of the best effort of equipment.
As shown in Fig. 2, FPGA and MCU is interacted by control line, address wire and data line.Control line has two, makes Energy line is controlled by MCU, informs that FPGA starts to work when effective.Firing line is controlled by FPGA, notifies MCU to read on FPGA when effective The data come.
2 region of memory are opened up inside FPGA, are interacted and are communicated with MCU.Memory 1 stores the parameter of FPGA work, MCU With can write permission, can by change memory 1 above value, to change the working condition of FPGA.Memory 2 stores FPGA demodulation Acoustical signal data afterwards, MCU have can read right, when receiving the rising edge in firing line, MCU reads acoustical signal from FPGA Data are simultaneously handled.
After system electrification, FPGA and MCU load configuration respectively from respective FLASH.After MCU first loads configuration, etc. It waits for the sufficiently long time, waits for that FPGA load configurations finish.MCU detects that FPGA after loaded, is written to 1 the inside of memory Then preset parameter will make energy line start to draw high, FPGA starts to work.
The preferable specific implementation mode of the above, only the utility model, the scope of protection of the utility model are not limited to This, any one skilled in the art can become apparent in the technical scope that the utility model discloses Technical solution simple change or equivalence replacement each fall in the scope of protection of the utility model.

Claims (3)

1. a kind of mini signals solution tuned plate, it is characterised in that:Including 8 tunnel photoelectric detection modules, signal conditioning circuit, the selection of 8 tunnels Switch, analog to digital conversion circuit, FPGA module, D/A converting circuit, light intensity control, MCU module and RS485 conversion circuits, institute State 8 tunnel photoelectric detection modules, signal conditioning circuit, 8 tunnel selecting switch, analog to digital conversion circuit, FPGA module, digital-to-analogue conversion electricity Road, light intensity control are sequentially connected, and analog-digital conversion circuit as described is also sequentially connected with MCU module, RS485 conversion circuits, described FPGA module is also sequentially connected with D/A converter module, modulated signal part.
2. mini signals solution tuned plate according to claim 1, it is characterised in that:The signal conditioning circuit includes 8 tunnels.
3. mini signals solution tuned plate according to claim 1, it is characterised in that:8 tunnel selecting switch selects 1 using 24 Multiple selector and 12 select 1 multiple selector.
CN201721873530.2U 2017-12-27 2017-12-27 A kind of mini signals solution tuned plate Active CN207652443U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201721873530.2U CN207652443U (en) 2017-12-27 2017-12-27 A kind of mini signals solution tuned plate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201721873530.2U CN207652443U (en) 2017-12-27 2017-12-27 A kind of mini signals solution tuned plate

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107911176A (en) * 2017-12-27 2018-04-13 长沙深之瞳信息科技有限公司 A kind of mini signals solution tuned plate and its operating method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107911176A (en) * 2017-12-27 2018-04-13 长沙深之瞳信息科技有限公司 A kind of mini signals solution tuned plate and its operating method
CN107911176B (en) * 2017-12-27 2024-06-18 长沙深之瞳信息科技有限公司 Mini signal demodulation board and operation method thereof

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PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of utility model: Mini signal demodulation board and operating method thereof

Effective date of registration: 20191121

Granted publication date: 20180724

Pledgee: Bank of Changsha Co.,Ltd. Kaifu sub branch

Pledgor: CHANGSHA SENSINTEL INFORMATION TECHNOLOGY CO.,LTD.

Registration number: Y2019430000045

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Pledgee: Bank of Changsha Co.,Ltd. Kaifu sub branch

Pledgor: CHANGSHA SENSINTEL INFORMATION TECHNOLOGY Co.,Ltd.

Registration number: Y2019430000045

PC01 Cancellation of the registration of the contract for pledge of patent right
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Denomination of utility model: A mini signal demodulation board

Effective date of registration: 20201215

Granted publication date: 20180724

Pledgee: Bank of Changsha Co.,Ltd. Kaifu sub branch

Pledgor: CHANGSHA SENSINTEL INFORMATION TECHNOLOGY Co.,Ltd.

Registration number: Y2020980009278

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Date of cancellation: 20211223

Granted publication date: 20180724

Pledgee: Bank of Changsha Co.,Ltd. Kaifu sub branch

Pledgor: CHANGSHA SENSINTEL INFORMATION TECHNOLOGY CO.,LTD.

Registration number: Y2020980009278

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Denomination of utility model: A mini signal demodulation board

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Pledgee: Bank of Changsha Co.,Ltd. Kaifu sub branch

Pledgor: CHANGSHA SENSINTEL INFORMATION TECHNOLOGY CO.,LTD.

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Registration number: Y2021430000100

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