CN207407892U - Navigation data System of Synchronous Processing and navigation system - Google Patents
Navigation data System of Synchronous Processing and navigation system Download PDFInfo
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- CN207407892U CN207407892U CN201721452662.8U CN201721452662U CN207407892U CN 207407892 U CN207407892 U CN 207407892U CN 201721452662 U CN201721452662 U CN 201721452662U CN 207407892 U CN207407892 U CN 207407892U
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Abstract
The utility model provides a kind of navigation data System of Synchronous Processing and navigation system, is related to navigation system technical field, and navigation data System of Synchronous Processing includes:Crystal oscillation clock circuit, satellite signal receiver, field programmable gate array FPGA chip, instruction set computer arm processor and harvester;The fpga chip is connected respectively with the crystal oscillation clock circuit, the satellite signal receiver and the arm processor, the arm processor is connected respectively with the satellite signal receiver, the fpga chip and the harvester, solving the solution method of existing time irreversibility present in technology, do not account in the antenna occlusion region of Global Navigation Satellite System can there is a situation where signal losing locks, the technical issues of so as to influence whether the carry out process of time synchronizing, influence the precision of navigation results.
Description
Technical field
The utility model is related to navigation system technical field, more particularly, to a kind of navigation data System of Synchronous Processing and
Navigation system.
Background technology
Inertial navigation system is a kind of independent of external information, also not to the self-aid navigation system of external radiation energy
System.Its working environment not only includes aerial, ground, can also be under water.The basic functional principle of inertial navigation system is with ox
Pause based on mechanics law, by measuring acceleration of the carrier in inertial reference system, it integrates the time, and it is become
It changes in navigational coordinate system, it becomes possible to obtain the information such as speed, yaw angle and the position in navigational coordinate system.
But in the integrated navigation system based on inertial navigation system, generally existing inertial navigation system sample frequency
With other nonsynchronous situations of secondary navigation system sample frequency.Usually in inertial navigation system and Global Navigation Satellite System
In the combined system of (Global Navigation Satellite System, guide number SS), the sampling of inertial navigation system
Frequency is generally 100Hz or higher, and the renewal frequency of Global Navigation Satellite System is usually 1Hz, therefore in two systems
Under the mode of combination, two navigation system can have markers disunity and time irreversibility, therefore be calculated in navigation
Cheng Zhong can bring the error of navigation calculation, so as to influence the precision of navigation results due to time irreversibility.
At present, for the integrated navigation system based on inertial navigation system, the solution method of time irreversibility is using complete
The UTC of ball navigational satellite system and pulse per second (PPS) carry out time synchronization.This method is not accounted in Global Navigation Satellite System
Antenna occlusion region in can be influenced there is a situation where signal losing lock, so as to influence whether the carry out process of time synchronizing
To the precision of navigation results.
Utility model content
In view of this, the purpose of this utility model is to provide a kind of navigation data System of Synchronous Processing and navigation systems
System, does not account in the solution method for solving existing time irreversibility in the prior art in global navigational satellite system
It can be there is a situation where signal losing lock, so as to influence whether the carry out process of time synchronizing, shadow in the antenna occlusion region of system
The technical issues of ringing to the precision of navigation results.The technical issues of.
In a first aspect, the utility model embodiment provides a kind of navigation data System of Synchronous Processing, including:Crystal oscillator clock
Circuit, satellite signal receiver, field programmable gate array FPGA chip, instruction set computer arm processor and acquisition dress
It puts;
The fpga chip respectively with the crystal oscillation clock circuit, the satellite signal receiver and the ARM processing
Device connects, and the arm processor connects respectively with the satellite signal receiver, the fpga chip and the harvester
It connects;
The crystal oscillation clock circuit for generating the first pulse signal, and transmits first arteries and veins to the fpga chip
Rush signal;
The satellite signal receiver, for receiving and transmitting the second pulse signal and world standard to the fpga chip
Time UTC information;
The fpga chip for the reception state according to second pulse signal and the UTC information, obtains respectively
Synchronous time service pulse signal or punctual pulse signal, and by the time service pulse signal or the punctual pulse signal transmission extremely
The arm processor;
The arm processor, for according to the time service pulse signal or the punctual pulse signal, controlling the acquisition
The data acquisition time of device is synchronous, obtains synchronized navigation data.
With reference to first aspect, the utility model embodiment provides the first possible embodiment of first aspect,
In, the harvester includes:Micro-inertia measuring device, odometer and the satellite signal receiver.
With reference to first aspect, the utility model embodiment provides second of possible embodiment of first aspect,
In, the micro-inertia measuring device includes:Single-axis accelerometer and uniaxial gyro.
With reference to first aspect, the utility model embodiment provides the third possible embodiment of first aspect,
In, the arm processor includes:General register and status register.
With reference to first aspect, the utility model embodiment provides the 4th kind of possible embodiment of first aspect,
In, the satellite signal receiver receives board for global navigation satellite system GNSS.
With reference to first aspect, the utility model embodiment provides the 5th kind of possible embodiment of first aspect,
In, the crystal oscillation clock circuit includes:Crystal oscillator, brilliant shake control chip and capacitance.
With reference to first aspect, the utility model embodiment provides the 6th kind of possible embodiment of first aspect,
In, the micro-inertia measuring device is used to measure angular velocity of satellite motion and acceleration of motion.
With reference to first aspect, the utility model embodiment provides the 7th kind of possible embodiment of first aspect,
In, the odometer is used to measure movement velocity and movement mileage.
Second aspect, the utility model embodiment also provide a kind of navigation system, including:Terminal and such as first aspect
Navigation data synchronization system;
It is connected between the terminal and the navigation data synchronization system by wireless communication;
Arm processor in the navigation data synchronization system is by the synchronized navigation data sending to terminal.
With reference to second aspect, the utility model embodiment provides the first possible embodiment of second aspect,
In, the navigation data synchronization system further includes:Universal asynchronous receiving-transmitting transmitter;
The arm processor is by the universal asynchronous receiving-transmitting transmitter by the synchronized navigation data sending to terminal;
The terminal transmits control instruction by the universal asynchronous receiving-transmitting transmitter to the arm processor.
The technical solution that the utility model embodiment provides brings following advantageous effect:The utility model embodiment provides
Navigation data System of Synchronous Processing and navigation system in, navigation data System of Synchronous Processing include field programmable gate array
Fpga chip, crystal oscillation clock circuit, satellite signal receiver, harvester and instruction set computer arm processor, wherein,
Fpga chip is connected respectively with crystal oscillation clock circuit, satellite signal receiver and arm processor, and arm processor is respectively with defending
Star signal receiver, fpga chip and harvester connection, in addition, crystal oscillation clock circuit is used to generate the first pulse signal simultaneously
The first pulse signal is transmitted to fpga chip, satellite signal receiver transmits the second pulse signal for reception and to fpga chip
With universal time UTC information, fpga chip is used to be obtained respectively according to the second pulse signal and the reception state of UTC information
Synchronous time service pulse signal or punctual pulse signal, and by time service pulse signal or punctual pulse signal transmission to ARM processing
Device, arm processor are used for the data acquisition time synchronization according to time service pulse signal or punctual pulse signal control harvester,
So as to obtain synchronized navigation data, by the fpga chip being connected respectively with crystal oscillation clock circuit, satellite signal receiver, make
Fpga chip can utilize the second pulse signal and the first pulse signal when the signal of Global Navigation Satellite System receives successfully
Synchronous time service pulse signal is obtained, and when the signal of Global Navigation Satellite System receives failure, fpga chip can utilize
First pulse signal of crystal oscillation clock circuit is handled, so as to obtain synchronous punctual pulse signal, so as to fulfill enough bases
Second pulse signal obtains synchronous time service pulse signal or punctual pulse signal respectively with the reception state of UTC information, so
No matter the signal of Global Navigation Satellite System receives success or failure, synchronous pulse signal can be accessed, to ensure at ARM
Managing device can be according to synchronous time service pulse signal or the data acquisition time of the punctual pulse signal of synchronization control harvester
It is synchronous, the acquisition of synchronized navigation data is realized, so as to solve the solution of existing time irreversibility in the prior art
Method is not accounted for can be there is a situation where signal losing lock, so as to meeting shadow in the antenna occlusion region of Global Navigation Satellite System
The technical issues of ringing the carry out process to time synchronizing, influencing the precision of navigation results.
Other feature and advantage of the utility model will illustrate in the following description, also, partly from specification
In become apparent or understood by implementing the utility model.The purpose of this utility model and other advantages are illustrating
Specifically noted structure is realized and obtained in book, claims and attached drawing.
For the above-mentioned purpose of the utility model, feature and advantage is enable to be clearer and more comprehensible, preferred embodiment cited below particularly, and
Attached drawing appended by cooperation, is described in detail below.
Description of the drawings
It, below will be right in order to illustrate more clearly of specific embodiment of the present invention or technical solution of the prior art
Specific embodiment or attached drawing needed to be used in the description of the prior art are briefly described, it should be apparent that, it describes below
In attached drawing be the utility model some embodiments, for those of ordinary skill in the art, do not paying creativeness
On the premise of work, other attached drawings are can also be obtained according to these attached drawings.
Fig. 1 shows the flow chart for the synchronization pulse acquisition methods that the utility model embodiment one is provided;
Fig. 2 shows the flow chart for the navigation data synchronization processing method that the utility model embodiment two is provided;
Fig. 3 shows the flow chart for the navigation data synchronization processing method that the utility model embodiment three is provided;
Fig. 4 shows another flow chart for the navigation data synchronization processing method that the utility model embodiment three is provided;
Fig. 5 shows another flow chart for the navigation data synchronization processing method that the utility model embodiment three is provided;
Fig. 6 shows the structure diagram for the navigation data System of Synchronous Processing that the utility model embodiment four is provided;
Fig. 7 shows the structure diagram for the navigation system that the utility model embodiment five is provided.
Icon:4- navigation data System of Synchronous Processing;41- crystal oscillation clock circuits;42- satellite signal receivers;43-FPGA
Chip;44-ARM systems;45- harvesters;46- universal asynchronous receiving-transmitting transmitters;5- navigation system;51- terminals.
Specific embodiment
To make the purpose, technical scheme and advantage of the utility model embodiment clearer, below in conjunction with attached drawing to this
The technical solution of utility model is clearly and completely described, it is clear that described embodiment is that the utility model part is real
Example is applied, instead of all the embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making
All other embodiments obtained under the premise of creative work, shall fall within the protection scope of the present invention.
The solution method of time irreversibility is not accounted in the antenna occlusion region of Global Navigation Satellite System at present
, so as to influence whether the carry out process of time synchronizing, the precision of navigation results can be influenced there is a situation where signal losing lock,
Based on this, a kind of navigation data System of Synchronous Processing and navigation system that the utility model embodiment provides can solve existing
The solution method for having existing time irreversibility present in technology does not account for the antenna screening in Global Navigation Satellite System
Keep off in region, so as to influence whether the carry out process of time synchronizing, can influence navigation knot there is a situation where signal losing lock
The technical issues of precision of fruit.
It is same to a kind of navigation data disclosed in the utility model embodiment first for ease of understanding the present embodiment
Step processing system and navigation system describe in detail.
Embodiment one:
A kind of synchronization pulse acquisition methods that the utility model embodiment provides, can be applied to field programmable gate
Array (Field-Programmable Gate Array abbreviation FPGA) chip, this method or micro-inertial navigation system
It is same with the combined system of Global Navigation Satellite System (Global Navigation Satellite System, guide number SS)
Step pulse signal acquisition methods, as shown in Figure 1, synchronization pulse acquisition methods include:
S11:Receive the first pulse signal of crystal oscillation clock circuit transmission.
Wherein, crystal oscillation clock circuit is High Precision Crystal Oscillator clock circuit, receives the clock that crystal oscillation clock circuit generates, FPGA
The counting source generated after chip internal frequency multiplication as synchronised clock.
S12:Receive the second pulse signal of satellite signal receiver transmission and universal time (Coordinated
Universal Time, abbreviation UTC) information.
Therefore, pps pulse per second signal and UTC time frame letter that GNSS is provided can be received when GNSS is effective by the step
Breath.Wherein, the second pulse signal is pps pulse per second signal, and UTC information is UTC time frame information.
S121:When the second pulse signal and UTC information receive successfully, the first pulse is corrected by the second pulse signal and is believed
Number, obtain synchronous time service pulse signal.
Specifically, the first pulse signal is corrected by the second pulse signal of this step, so as to obtain synchronous time service arteries and veins
Rush signal.Wherein, the first pulse signal refers to the clock pulses number after frequency multiplication, for example, it is assumed that the crystal oscillating circuit of 25M, is input to
The external timing signal of 25MHZ during fpga chip, fpga chip according to frequency multiplication inside this 25MHZ signal into the clock of 100M,
Ideally, can be 100M clock pulses number between two pulse per second (PPS)s (Pulse Per Second, abbreviation 1PPS), but
Due to the deviation that itself and environment of crystal oscillator influence, this number is likely to be 90M or 110M.For example, company can be passed through
Two continuous 1PPS, which are calculated, is separated by 90M clock, if GNSS losing locks, next time just without 1PPS signals, during internal calculation
Clock number is accumulated to 90M and just exports punctual pulse signal, to ensure the continuity of 1PPS and precision.
S122:When the second pulse signal and UTC information reception failures, according to the UTC finally received before reception failure
Information and the second pulse signal, are resolved by the first pulse signal, obtain synchronous punctual pulse signal.
Specifically, when GNSS is invalid, the last one moment pulse per second (PPS) when effective of GNSS and time frame information, profit are utilized
With the High Precision Crystal Oscillator circuit clock information of itself, fpga chip generated time frame information integer is utilized.Therefore, in GNSS signal
During losing lock can also time service, synchronous punctual pulse signal is obtained, so can realize continuous lock-out pulse by this method
The acquisition of signal.
The clock that first pulse signal generates for fpga chip according to the crystal oscillation clock circuit of reception, frequency multiplication to higher frequency
Clock pulses.Second pulse signal is substantially the 1PPS of receiver, since crystal oscillator is influenced with power-on time or environment,
The clock signal of generation has error, and the clock that fpga chip frequency multiplication comes out is caused also to have deviation, therefore to use 1PPS real
When calibration this frequency multiplication clock signal.
Method in the utility model embodiment is directed to mini inertia measurement unit (Miniature Inertial
Measurement Unit, abbreviation MIMU) it is inconsistent with the sample frequency of GNSS, it is kept time using GNSS time services with high precision clock
Function, by pulse per second (PPS) (pulse per second, abbreviation 1PPS) synchronization FPGA pulses, so that the signal in later stage is adopted
Collection is synchronized.Therefore, by this method fpga chip can be made to possess the precision time service when GNSS signal is effective, Yi Ji
The function that can also keep time for a long time when GNSS signal is invalid.Therefore, by the method achieve pulse per second (PPS) 1PPS is utilized to correct
The reference clock pulse of FPGA generations.
Embodiment two:
A kind of navigation data synchronization processing method that the utility model embodiment provides, can be applied to fpga chip, should
The time synchronizing method of method or the combined system of micro-inertial navigation system and GNSS, as shown in Fig. 2, navigation number
Include according to synchronization processing method:
S21:Receive the first pulse signal of crystal oscillation clock circuit transmission.
In this step, crystal oscillation clock circuit is High Precision Crystal Oscillator clock circuit, and the first pulse signal is pps pulse per second signal.Make
Scheme is selected for one, the clock that crystal oscillation clock circuit generates is received, is generated after the frequency multiplication of fpga chip inside as synchronised clock
Counting source.
S22:Receive the second pulse signal of satellite signal receiver transmission and UTC information.
Therefore, pps pulse per second signal and UTC time frame letter that GNSS is provided can be received when GNSS is effective by the step
Breath.Wherein, the second pulse signal is pps pulse per second signal, and UTC information is UTC time frame information.
S23:According to the reception state of the second pulse signal and UTC information, obtain respectively synchronous time service pulse signal or
Punctual pulse signal.
In practical applications, satellite navigation system status information, satellite navigation effective time are judged according to effective marker position
Time service, defending to lead just can seamlessly switch to punctual function under out-of-lock condition.
S24:By time service pulse signal or punctual pulse signal transmission to instruction set computer (Advanced RISC
Machines, abbreviation ARM) system, so that ARM system controls harvester according to time service pulse signal or punctual pulse signal
Data acquisition time it is synchronous, obtain synchronized navigation data.
As the preferred embodiment of the present embodiment, harvester can include:Micro-inertia measuring device (Inertial
Measurement unit, abbreviation IMU), odometer and satellite signal receiver.Therefore in this step, after amendment
Crystal oscillator provide accurately temporal information, in ARM to IMU information and resolve navigation information addition the time mark.
Specifically, by the time service pulse signal or the punctual pulse signal transmission to instruction set computer ARM system,
So that ARM system corrects ARM internal clock signals, so that ARM internal clock signals are believed with pulse per second (PPS) according to pulse signal
Number close alignment, navigation data acquisition have stringent time synchronization, obtain synchronized navigation data.
If what is obtained in step S23 is synchronous time service pulse signal, which is extremely referred to
Order collection computer ARM system;In step S23, if what is obtained is synchronous punctual pulse signal, by the pulse letter of keeping time
Number it is transmitted to instruction set computer ARM system.
Therefore, this method is inconsistent for MIMU, GNSS, the sample frequency of mileage (odograph, abbreviation OD) signal, profit
It is kept time function with GNSS time services and high precision clock, by 1PPS synchronization FPGA pulses, so that signal acquisition is synchronous.Cause
This, precision time service can be realized by this method in the effective situation of GNSS signal, while also can be invalid in GNSS signal
Situation when realize punctual for a long time, the synchronous time service pulse signal that is obtained so as to fulfill ARM system according to back or together
The punctual pulse signal of step, to control the number of the harvesters such as micro-inertia measuring device, odometer and satellite signal receiver
It is synchronous according to acquisition time, so as to fulfill the acquisition of synchronized navigation data.
It, can be by these information by this method for whole day, the continuous time synchronization information in full region in the present embodiment
Combined with more IMU signals and navigation information, for these information provide synchronization time label, so as to fulfill possessing the stringent time
Synchrodata.
Wherein, it is the benefit using the time delay of linear interpolation method acquisition information for the acquisition methods of time tag
It repays, temporal information sends terminal or other executing agencies together with the information of the sensor of acquisition, for subsequent data processing
With analysis.
Embodiment three:
A kind of navigation data synchronization processing method that the utility model embodiment provides, can be applied to fpga chip, should
The time synchronizing method of method or the combined system of micro-inertial navigation system and GNSS, as shown in figure 3, navigation number
Include according to synchronization processing method:
S31:Receive the first pulse signal of crystal oscillation clock circuit transmission.
Wherein, crystal oscillation clock circuit is High Precision Crystal Oscillator clock circuit, and the first pulse signal is pps pulse per second signal.As one
It is a to select scheme, receive the clock that crystal oscillation clock circuit generates, the meter generated after the frequency multiplication of fpga chip inside as synchronised clock
Number source.
S32:Receive the second pulse signal of satellite signal receiver transmission and UTC information.
Therefore, pps pulse per second signal and UTC time frame letter that GNSS is provided can be received when GNSS is effective by the step
Breath.Wherein, the second pulse signal is pps pulse per second signal, and UTC information is UTC time frame information.
S321:When the second pulse signal and UTC information receive successfully, the first pulse is corrected by the second pulse signal and is believed
Number, synchronous time service pulse signal is obtained, by time service pulse signal transmission to ARM system.
Specifically, the first pulse signal is corrected by the second pulse signal of this step, so as to obtain synchronous time service arteries and veins
Rush signal.
S322:When the second pulse signal and UTC information reception failures, according to the UTC finally received before reception failure
Information is resolved by the first pulse signal, obtains synchronous punctual pulse signal, by punctual pulse signal transmission to ARM
System.
In this step, in second pulse signal and the UTC information reception failure, according to last before reception failure
The UTC information that receives and second pulse signal, when the first pulse signal arrives, the UTC information when
Between the second position increase by one second, obtain synchronous punctual pulse signal.Specifically, when arriving the first pulse, in the UTC information
Time second position increase corresponding number of seconds.It is the first pulse it should be noted that when frequency doubling clock step-by-step counting is to predetermined value
When signal arrives, therefore, the above process is when the clock number of frequency multiplication reaches preset value, and UTC time increases by one second.
Specifically, when GNSS is invalid, the last one moment pulse per second (PPS) when effective of GNSS and time frame information, profit are utilized
With the High Precision Crystal Oscillator circuit clock information of itself, generated time frame information integer.In GNSS signal losing lock can also time service,
Synchronous punctual pulse signal is obtained, so can realize the acquisition of continuous synchronization pulse by the step.Therefore, lead to
Crossing the step realizes the reference clock pulse that FPGA generations are corrected using pulse per second (PPS) 1PPS.
S33:Make ARM system according to time service pulse signal or punctual pulse signal, control micro-inertia measuring device, odometer
And the data acquisition time of satellite signal receiver is synchronous, obtains synchronous acquisition.
S34:ARM system is made to compensate the acquisition time delay of synchronous acquisition by linear interpolation method according to UTC information,
Obtain synchronized navigation data.
In this step, the acquisition of micro-inertia measuring device, odometer and satellite signal receiver is calculated according to UTC information
Time delay, and acquisition time delay is compensated by linear interpolation method, obtain the synchronized navigation data with time tag.Its
In, micro-inertia measuring device can be micro inertial measurement unit.
It is further that micro-inertia measuring device, odometer and satellite signal receiving are calculated according to system clock
It is acquisition time delay of machine, and pass through linear interpolation method and compensate the acquisition time delay, the odometer that ARM is collected, micro-
Inertial measuring unit defends row navigation information etc., adds time tag.
It is the time delay that information is obtained using linear interpolation method specifically, for the acquisition methods of time tag
Compensation, temporal information sends terminal or other executing agencies together with the information of the sensor of acquisition, at subsequent data
Reason and analysis.
S35:By synchronized navigation data sending to terminal.
S36:Receive control instruction of the terminal by wireless communication linkup transmit.
Satellite signal receiver is used to receive the data of global navigation satellite system GNSS.
In practical applications, as shown in figure 4, fpga chip or time synchronization module, CPU etc..This method can be with
Time synchronization is carried out by the 1PPS of the UTC that GNSS is provided and pulse per second (PPS) 1PPS, high precision clock offer, obtains time synchronization
1PPS and UTC, and synchronous 1PPS and UTC is sent to navigational computer, enables navigational computer according to the synchronization
The GNSS numbers that the MIMU data of 1PPS and UTC, synchronous acquisition and processing micro inertial measurement unit, satellite signal receiver receive
According to the mileage in, odometer information, so as to carry out navigational computer data collection synchronous processing.Wherein, mileage can
To include:Increment, speed of mileage etc., GNSS data can include:Position And Velocity etc., MIMU data can include:Air pressure
Data, the geomagnetic data in earth's magnetic field, accelerometer plus count, the gyro data of gyro sensor etc..Therefore, navigation meter
Calculation machine to the gyro of micro inertial measurement unit plus meter, earth magnetism, air pressure data, the increment of odometer, speed and GNSS
The data such as position, speed synchronize acquisition.
As shown in figure 4, the method that utility model embodiment provides during signal time synchronization process is carried out, utilizes
External 1PPS carries out time synchronization, with the clock signal of synchronized navigation computer carry out the data of GNSS, MIMU data and
The signal acquisition of mileage, and the synchrodata most obtained at last be sent to personal computer (personal computer,
Abbreviation PC) client stored and shown, meanwhile, user can also send control life by pc client to navigational computer
Order, realize user by terminals such as PC using navigation system to obtain accurate navigation data.
As a preferred embodiment, as shown in figure 5, being first carried out beginning a task with, start self-test after starting, then GNSS connects
It receives the satellite signal receiving apparatus such as board and receives the UTC of GNSS and the pulse per second (PPS) 1PPS of the first pulse signal, and by the UTC and the
One pulse signal 1PPS is transmitted to time synchronization module i.e. fpga chip, when time synchronization module is also received from high-precision simultaneously
The 1PPS for the second pulse signal that clock generates.Time synchronization module is when the UTC that GNSS is provided and 1PPS signals receive effective
In the GNSS valid periods, correct high precision clock 1PPS signals so that it is synchronous with the 1PPS of GNSS, i.e., progress time service when
Between synchronization process so that synchronous 1PPS is sent and is made the UTC of GNSS to be forwarded to;Time synchronization module exists
When the UTC that GNSS is provided receives invalid with 1PPS signals at GNSS invalid periods, i.e., the time synchronization that the progress time keeps time
Reason, so as to the synchronous 1PPS for generating synchronous UTC with being obtained according to high precision clock.
Specifically, when GNSS losing locks, after time synchronization module determines GNSS losing locks, receive from high precision clock
After 1PPS, time synchronization the module time in the UTC messages of upper one second second plus 1 second generate synchronous UTC and according to high-precision
The synchronous 1PPS that clock obtains.
Finally, no matter GNSS is effective or invalid, and the UTC finally obtained all is sent to ARM systems with final synchronous 1PSS
System, has so ensured that time synchronization module provides external time information UTC and 1PSS for ARM system.
It should be noted that after ARM system is connected on the UTC and 1PPS of time of receipt (T of R) synchronization module, progress and internal clocking
The process of alignment calibrates sampling clock using 1PPS, such as when sample frequency is 100Hz, calculate acquisition MIMU, GNSS, inner
The sampling compensating time delay of journey meter utilizes linear interpolation method real-time compensation time delay, the 1PPS of realization MIMU, GNSS and OD
Sample-synchronous forms the integrated navigation of MIMU, GNSS and OD by ARM system.Equally, finally by the navigation knot after time synchronization
Fruit information carries out navigation calculation and compensating time delay, is eventually sent to pc client.
In the present embodiment, when ARM system gathers MIMU signals, GNSS signal, mileage signal, the calculating sampling instant time prolongs
Late, linear interpolation method compensating time delay error is passed through so that the sampling time strictly aligns with 1PSS so as to integrated navigation
The navigation results of system-computed synchronize, finally by the gathered datas such as the sensor information after time synchronization, navigation results and
Time tag is sent by universal asynchronous receiving-transmitting transmitter (Universal Asynchronous Receiver, abbreviation UART)
To pc user end, stored.
It therefore, can be by these information and more by this method for whole day, the continuous time synchronization information in full region
IMU signals and navigation information combine, for these information provide synchronization time label, so as to fulfill possessing stringent time synchronization number
According to.
Wherein, it is the benefit using the time delay of linear interpolation method acquisition information for the acquisition methods of time tag
It repays, temporal information sends terminal or other executing agencies together with the information of the sensor of acquisition, for subsequent data processing
With analysis.
Example IV:
A kind of navigation data System of Synchronous Processing that the utility model embodiment provides, as shown in fig. 6, navigation data is synchronous
Processing system 4 includes:Crystal oscillation clock circuit 41, satellite signal receiver 42, fpga chip 43, ARM system 44 and acquisition dress
Put 45.
Fpga chip is connected respectively with crystal oscillation clock circuit, satellite signal receiver and arm processor, arm processor
It is connected respectively with satellite signal receiver, fpga chip and harvester.
Wherein, crystal oscillation clock circuit is High Precision Crystal Oscillator clock circuit, and the first pulse signal is pps pulse per second signal, during crystal oscillator
Clock circuit transmits the first pulse signal for generating the first pulse signal to fpga chip.Satellite signal receiver is used to connect
It receives and transmits the second pulse signal and universal time UTC information to fpga chip.
Therefore, fpga chip can receive pps pulse per second signal and UTC time frame letter that GNSS is provided when GNSS is effective
Breath.Wherein, the second pulse signal is pps pulse per second signal, and UTC information is UTC time frame information.
Further, fpga chip is used for the reception state according to the second pulse signal and UTC information, obtains synchronization respectively
Time service pulse signal or punctual pulse signal, and by time service pulse signal or punctual pulse signal transmission to arm processor.
In addition, ARM system is used for according to time service pulse signal or punctual pulse signal, the data acquisition of harvester is controlled
Time synchronization obtains synchronized navigation data.Wherein, harvester can include:Micro inertial measurement unit, odometer and satellite
Signal receiver.
In addition, micro-inertia measuring device can include:Single-axis accelerometer and uniaxial gyro.Arm processor can wrap
It includes:General register and status register.Satellite signal receiver can be that global navigation satellite system GNSS receives board.It is brilliant
The clock circuit that shakes can include:Crystal oscillator, brilliant shake control chip and capacitance.
As the preferred embodiment of the present embodiment, micro-inertia measuring device can be used for measuring angular velocity of satellite motion and movement
Acceleration.Odometer can be used for measuring movement velocity with moving mileage.
Further, fpga chip is used for the reception state according to the second pulse signal and UTC information, obtains synchronization respectively
Time service pulse signal or punctual pulse signal, and by time service pulse signal or punctual pulse signal transmission to ARM system.
In addition, ARM system is used for according to time service pulse signal or punctual pulse signal, the data acquisition of harvester is controlled
Time synchronization obtains synchronized navigation data.Wherein, harvester can include:Micro inertial measurement unit, odometer and satellite
Signal receiver.
Preferably, time synchronizing process is carried out using the clock signal inside external 1PPS synchronizations ARM system
Signal acquisition, compares the clock of each sensor data acquisition of clock and MIMU, GNSS, OD etc. inside ARM system, and counts
Acquisition time delay is calculated, each sensor information stringent synchronization, sensing of the acquisition with time tag are kept by linear interpolation
Device information, is most sent to pc client through URAT afterwards, is stored.
As the another embodiment of the present embodiment, the central processing unit (Central in navigational computer
Processing Unit, abbreviation CPU) can be the device that fpga chip is combined with ARM system.As a preferred embodiment,
UTC information is transmitted with the form of GPZDA codes in message protocol, and the fpga chip being transmitted in real time in CPU carries out
The time synchronizing of continuation.Therefore, fpga chip carries out the processing procedure of the time synchronization of early period, and ARM system carries out the later stage
The synchronous processing procedure of acquisition.
Therefore, mainly composition can include navigation data System of Synchronous Processing 4:Micro inertial measurement unit, GNSS receiver boards
Card etc. satellite signal receiving apparatus, odometer, navigational computer, high precision clock circuit, provide electric power power supply and be responsible for
The communication module communicated with terminal.
Embodiment five:
A kind of navigation system that the utility model embodiment provides, as shown in fig. 7, navigation system 5 includes:Terminal 51 and
The navigation data System of Synchronous Processing that above-described embodiment one provides, can pass through between terminal 51 and navigation data synchronization system 4
Wireless communication connects.Arm processor in navigation data synchronization system 4 can be by synchronized navigation data sending to terminal.
As shown in fig. 7, navigation data synchronization system 4 can also include:Universal asynchronous receiving-transmitting transmitter 46, arm processor
It can be by universal asynchronous receiving-transmitting transmitter 46 by synchronized navigation data sending to terminal 51.Terminal 51 can also be by general different
It walks receiving-transmitting transmitter 46 and transmits control instruction to arm processor.
In all examples being illustrated and described herein, any occurrence should be construed as merely illustrative, without
It is as limitation, therefore, other examples of exemplary embodiment can have different values.
It should be noted that:Similar label and letter represents similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined, then it further need not be defined and explained in subsequent attached drawing in a attached drawing.
Flow chart and block diagram in attached drawing show system, method and the calculating of multiple embodiments according to the present utility model
Architectural framework in the cards, function and the operation of machine program product.In this regard, each box in flow chart or block diagram can
To represent a module, program segment or a part for code, a part for the module, program segment or code includes one or more
A executable instruction for being used to implement defined logic function.It should also be noted that some as replace realization in, in box
The function of being marked can also be occurred with being different from the order marked in attached drawing.For example, two continuous boxes actually may be used
To perform substantially in parallel, they can also be performed in the opposite order sometimes, this is depending on involved function.It is also noted that
, the combination of each box in block diagram and/or flow chart and the box in block diagram and/or flow chart can use and perform
Defined function or the dedicated hardware based system of action are realized or can use specialized hardware and computer instruction
It combines to realize.
The navigation system that the utility model embodiment provides, the navigation data System of Synchronous Processing provided with above-described embodiment
With identical technical characteristic, so can also solve the technical issues of identical, reach identical technique effect.
As the another embodiment of the present embodiment, the form of ARM system 44 or processor, wherein, processing
Device may be a kind of IC chip, have the processing capacity of signal.During realization, each step of the above method can be with
It is completed by the integrated logic circuit of the hardware in processor or the instruction of software form.Above-mentioned processor can be general
Processor, including central processing unit (Central Processing Unit, abbreviation CPU), network processing unit (Network
Processor, abbreviation NP) etc.;It can also be digital signal processor (Digital Signal Processing, abbreviation
DSP), application-specific integrated circuit (Application Specific Integrated Circuit, abbreviation ASIC), ready-made compile
Journey gate array (Field-Programmable Gate Array, abbreviation FPGA) or other programmable logic device, discrete gate
Or transistor logic, discrete hardware components.It can realize or perform and is in the utility model embodiment disclosed each
Method, step and logic diagram.General processor can be microprocessor or the processor can also be any conventional place
Manage device etc..The step of method with reference to disclosed in the utility model embodiment, can be embodied directly in hardware decoding processor execution
It completes or performs completion with the hardware in decoding processor and software module combination.Software module can be located at random storage
Device, flash memory, read-only memory, this fields such as programmable read only memory or electrically erasable programmable memory, register into
In ripe storage medium.
What the utility model embodiment was provided synchronizes pulse signal acquisition methods and navigation data synchronization process side
The computer program product of method, the computer-readable storage medium for the non-volatile program code that can perform including storing processor
Matter, the instruction that said program code includes can be used for performing the method described in previous methods embodiment, and specific implementation can be found in
Embodiment of the method, details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with
It realizes by another way.The apparatus embodiments described above are merely exemplary, for example, the division of the unit,
Only a kind of division of logic function, can there is other dividing mode in actual implementation, in another example, multiple units or component can
To combine or be desirably integrated into another system or some features can be ignored or does not perform.It is another, it is shown or beg for
The mutual coupling, direct-coupling or communication connection of opinion can be by some communication interfaces, device or unit it is indirect
Coupling or communication connection can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separate, be shown as unit
The component shown may or may not be physical location, you can be located at a place or can also be distributed to multiple
In network element.Some or all of unit therein can be selected to realize the mesh of this embodiment scheme according to the actual needs
's.
In addition, each functional unit in each embodiment of the utility model can be integrated in a processing unit,
Can be that unit is individually physically present, can also two or more units integrate in a unit.
In addition, in the description of the utility model embodiment, unless otherwise clearly defined and limited, term " installation ",
" connected ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected or integrally connect
It connects;Can be mechanical connection or electrical connection;It can be directly connected, can also be indirectly connected by intermediary, it can
To be the connection inside two elements.For the ordinary skill in the art, can above-mentioned term be understood with concrete condition
Concrete meaning in the utility model.
, it is necessary to explanation in the description of the utility model, term " " center ", " on ", " under ", it is "left", "right", " perpendicular
Directly ", the orientation of the instructions such as " level ", " interior ", " outer " or position relationship are based on orientation shown in the drawings or position relationship, are only
The utility model must have specific with the device or element for simplifying description rather than instruction or hint meaning for ease of description
Orientation, with specific azimuth configuration and operation, therefore it is not intended that limitation to the utility model.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with
It realizes by another way.The apparatus embodiments described above are merely exemplary, for example, the division of the unit,
Only a kind of division of logic function, can there is other dividing mode in actual implementation, in another example, multiple units or component can
To combine or be desirably integrated into another system or some features can be ignored or does not perform.It is another, it is shown or beg for
The mutual coupling, direct-coupling or communication connection of opinion can be by some communication interfaces, device or unit it is indirect
Coupling or communication connection can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separate, be shown as unit
The component shown may or may not be physical location, you can be located at a place or can also be distributed to multiple
In network element.Some or all of unit therein can be selected to realize the mesh of this embodiment scheme according to the actual needs
's.
In addition, each functional unit in each embodiment of the utility model can be integrated in a processing unit,
Can be that unit is individually physically present, can also two or more units integrate in a unit.
Finally it should be noted that:Embodiment described above is only specific embodiment of the present utility model, to illustrate this
The technical solution of utility model, rather than its limitations, the scope of protection of the utility model is not limited thereto, although with reference to foregoing
The utility model is described in detail in embodiment, it will be understood by those of ordinary skill in the art that:It is any to be familiar with this skill
It, still can be to the skill recorded in previous embodiment in the technical scope that the technical staff in art field discloses in the utility model
Art scheme, which is modified or can be readily occurred in, to be changed or carries out equivalent substitution to which part technical characteristic;And these modifications,
Variation is replaced, and the essence of appropriate technical solution is not made to depart from the spirit and model of the utility model embodiment technical solution
It encloses, should be covered within the scope of the utility model.Therefore, the scope of protection of the utility model described should be wanted with right
Subject to the protection domain asked.
Claims (10)
1. a kind of navigation data System of Synchronous Processing, which is characterized in that including:Crystal oscillation clock circuit, satellite signal receiver show
Field programmable gate array fpga chip, instruction set computer arm processor and harvester;
The fpga chip connects respectively with the crystal oscillation clock circuit, the satellite signal receiver and the arm processor
It connects, the arm processor is connected respectively with the satellite signal receiver, the fpga chip and the harvester;
The crystal oscillation clock circuit for generating the first pulse signal, and transmits first pulse to the fpga chip and believes
Number;
The satellite signal receiver, for receiving and transmitting the second pulse signal and universal time to the fpga chip
UTC information;
The fpga chip for the reception state according to second pulse signal and the UTC information, obtains synchronous respectively
Time service pulse signal or punctual pulse signal, and by the time service pulse signal or the punctual pulse signal transmission to described
Arm processor;
The arm processor, for according to the time service pulse signal or the punctual pulse signal, controlling the harvester
Data acquisition time it is synchronous, obtain synchronized navigation data.
2. navigation data System of Synchronous Processing according to claim 1, which is characterized in that the harvester includes:It is micro-
Inertial measuring unit, odometer and the satellite signal receiver.
3. navigation data System of Synchronous Processing according to claim 2, which is characterized in that the micro-inertia measuring device bag
It includes:Single-axis accelerometer and uniaxial gyro.
4. navigation data System of Synchronous Processing according to claim 1, which is characterized in that the arm processor includes:It is logical
With register and status register.
5. navigation data System of Synchronous Processing according to claim 1, which is characterized in that the satellite signal receiver is
Global navigation satellite system GNSS receives board.
6. navigation data System of Synchronous Processing according to claim 1, which is characterized in that the crystal oscillation clock circuit bag
It includes:Crystal oscillator, brilliant shake control chip and capacitance.
7. navigation data System of Synchronous Processing according to claim 2, which is characterized in that the micro-inertia measuring device is used
In measurement angular velocity of satellite motion and acceleration of motion.
8. navigation data System of Synchronous Processing according to claim 2, which is characterized in that the odometer is transported for measuring
Dynamic speed and movement mileage.
9. a kind of navigation system, which is characterized in that including:Terminal and such as claim 1-8 any one of them navigation datas
System of Synchronous Processing;
It is connected between the terminal and the navigation data System of Synchronous Processing by wireless communication;
Arm processor in the navigation data System of Synchronous Processing is by the synchronized navigation data sending to terminal.
10. navigation system according to claim 9, which is characterized in that the navigation data System of Synchronous Processing further includes:
Universal asynchronous receiving-transmitting transmitter;
The arm processor is by the universal asynchronous receiving-transmitting transmitter by the synchronized navigation data sending to terminal;
The terminal transmits control instruction by the universal asynchronous receiving-transmitting transmitter to the arm processor.
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