CN207397268U - A kind of USB interface multiplex system - Google Patents
A kind of USB interface multiplex system Download PDFInfo
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- CN207397268U CN207397268U CN201721589951.2U CN201721589951U CN207397268U CN 207397268 U CN207397268 U CN 207397268U CN 201721589951 U CN201721589951 U CN 201721589951U CN 207397268 U CN207397268 U CN 207397268U
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- usb interface
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- board
- speed switching
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- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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Abstract
The utility model is related to a kind of USB interface multiplex systems, and including board, the board is equipped with board chip and high speed switching chip, and board chip internal is equipped with security module, the first usb interface module and secondary USB interface module;The board is built-in with the first USB interface and secondary USB interface;Security module and the first usb interface module are connected respectively with high speed switching chip;High speed switching chip is connected with the first USB interface;High speed switching chip is also associated with BMC chip;Secondary USB interface module is connected with secondary USB interface.The signal of SPI TPM of board chip and the signal of USB are connected to the first USB interface by cutting chip at a high speed, the function select signal for cutting chip at a high speed is connected to BMC, the function of the USB interface built in board can be made full use of, the log information of another USB interface energy storage system when a USB interface is in SPI TPM modes.
Description
Technical field
The utility model belongs to server board design field, and in particular to a kind of USB interface multiplex system.
Background technology
Current 8S servers use the designing scheme of 4U height, and the height of computing board is 1U, and size is compared to previous generation
30% or so is decreased, and the requirement to function is also more and more.The density for so requiring computing board is also increasing, to meter
The place and route for calculating plate proposes very big challenge.It is designed for the IO in some mainboards, the 8S server masters designed at present
Plate exists simultaneously the interface of SPI TPM connectors and 2 internal USBs 3.0, and the function of the two is used separately;If it also presses
It is a kind of huge waste so for motherboard space according to the scheme previously each realized.This is in place of the deficiencies in the prior art.
The content of the invention
The purpose of this utility model is that it is answered in view of the above-mentioned drawbacks of the prior art, providing and designing a kind of USB interface
With system, to solve above-mentioned technical problem.
In order to achieve the above object, the technical solution of the utility model is:
A kind of USB interface multiplex system, including board, the board is equipped with board chip and high speed switching chip, plate
The core of the card piece is internally provided with security module, the first usb interface module and secondary USB interface module;
The board is built-in with the first USB interface and secondary USB interface;
Security module and the first usb interface module are connected respectively with high speed switching chip;
High speed switching chip is connected with the first USB interface;
High speed switching chip is also associated with BMC chip;
Secondary USB interface module is connected with secondary USB interface.
Further, CHA_1 interfaces and CHA_2 interfaces are equipped in the high speed switching chip.
Further, first usb interface module passes through USB3_TX_DP signal wires, USB3_TX_DN signals respectively
Line, USB3_RX_DP signal wires, USB3_RX_DN signal wires, USB2_DP signal wires and USB2_DN signal wires, which are connected to, to be cut at a high speed
Change the CHA_1 interfaces of chip.
Further, security module interface module passes through SPI_TMP_MISO signal wires, SPI_TMP_MOSI signals respectively
Line, SPI_TMP_CLK signal wires, SPI_TMP_IRQ_N signal wires, SPI_TMP_CS_N signal wires and SPI_TMP_RST_N letters
Number line is connected to the CHA_2 interfaces of high speed switching chip.
Further, BMC chip is equipped with GPIO port, and high speed switching chip is equipped with function select signal port, cuts at a high speed
The function select signal port for changing chip is connected by function select signal line with BMC chip GPIO port.
Further, the high speed switching chip is the switching chip of model PI3USB3102ZLEX.
BMC chip is equipped with GPIO port, and high speed switching chip is equipped with function select signal port, the work(of high speed switching chip
Energy selection signal port is connected by function select signal line with BMC chip GPIO port, is given tacit consent to the function of the first USB interface
It is set to USB mode;BMC chip exports signal change high speed switching chip function by GPIO port and the state of pin is selected to control
The function of first USB interface is set to SPI TMP signal modes.
By cutting chip PI3USB3102ZLEX at a high speed, the signal of SPI TPM of board chip and the signal of USB are connected to
First USB interface.The function select signal for cutting chip at a high speed is connected to the GPIO port of BMC, and the function of acquiescence is set to USB, when
Client needs BMC during SPI TPM security modules to change the state that function selects pin, realizes that signal switching meets this USB
Mouth enters the pattern of SPI TPM;Such design can make full use of the function of the USB interfaces built in board, as the first USB
When interface is in SPI TPM modes secondary USB interface can also storage system log information.
The beneficial effects of the utility model are that SPI TPM are the security modules of whole system, and 2 internal USB interfaces are then
It is responsible for the daily record of record system, the signal of the two is all integrated by 1 USB by high speed switching chip PI3USB3102ZLEX
In interface, the signal of the function selection of this switching chip is connected to BMC chip, realizes that BMC controls the function of this USB interface.
The function of board internal USB interface is taken full advantage of, reduces connector quantity, it is cost-effective, enhance product competitiveness;Full
On the premise of sufficient item-function demand, placement-and-routing's difficulty of mainboard is reduced, is conducive to the improvement of board signal integrity.
In addition, the utility model design principle is reliable, and it is simple in structure, there is very extensive application prospect.
It can be seen that the utility model is compared with prior art, there is substantive distinguishing features and progress, the beneficial effect implemented
Fruit is also obvious.
Description of the drawings
Fig. 1 is a kind of USB interface multiplex system connection diagram provided by the utility model;
Wherein, 1- boards, 2- board chips, 3- high speed switching chips, the first USB interfaces of 4-, 5- secondary USB interfaces, 6-
BMC chip, 7- security modules, the first usb interface modules of 8-, 9- secondary USB interface modules, 10-CHA_1 interfaces, 11-CHA_2
Interface, 12- function select signals port, 13-GPIO ports.
Specific embodiment
Below in conjunction with the accompanying drawings and pass through specific embodiment the utility model is elaborated, following embodiment is to this
The explanation of utility model, and the utility model is not limited to implementation below.
As shown in Figure 1, a kind of USB interface multiplex system that the utility model embodiment provides, including board 1, the plate
Card 1 is equipped with board chip 2 and high speed switching chip 3, and board chip 2 is internally provided with security module 7, the first usb interface module 8
With secondary USB interface module 9;
The board 1 is built-in with the first USB interface 4 and secondary USB interface 5;
7 and first usb interface module 8 of security module is connected respectively with high speed switching chip 3;
High speed switching chip 3 is connected with the first USB interface 4;
High speed switching chip 3 is also associated with BMC chip 6;
Secondary USB interface module 9 is connected with secondary USB interface 5.
CHA_1 interfaces 10 and CHA_2 interfaces 11 are equipped in the high speed switching chip 3.
First usb interface module 8 passes through USB3_TX_DP signal wires, USB3_TX_DN signal wires, USB3_ respectively
RX_DP signal wires, USB3_RX_DN signal wires, USB2_DP signal wires and USB2_DN signal wires are connected to high speed switching chip 3
CHA_1 interfaces 10.
Security module interface module 7 passes through SPI_TMP_MISO signal wires, SPI_TMP_MOSI signal wires, SPI_ respectively
TMP_CLK signal wires, SPI_TMP_IRQ_N signal wires, SPI_TMP_CS_N signal wires are connected with SPI_TMP_RST_N signal wires
To the CHA_2 interfaces 11 of high speed switching chip 3.
High speed switching chip 3 is equipped with function select signal port 12, the function select signal port 12 of high speed switching chip 3
It is connected by function select signal line with BMC chip 6.
The high speed switching chip 3 is the switching chip of model PI3USB3102ZLEX.
BMC chip 6 is equipped with GPIO port 13, and high speed switching chip 3 is equipped with function select signal port 12, switches at high speed core
The function select signal port 12 of piece 3 is connected by function select signal line with the GPIO port 13 of BMC chip 6, is given tacit consent to
The function of one USB interface 4 is set to USB mode;BMC chip 6 exports signal by GPIO port 13 and changes 3 work(of high speed switching chip
The state of pin can be selected to control, the function of the first USB interface 4 is set to SPI TMP signal modes.
By cutting chip PI3USB3102ZLEX at a high speed, the signal of SPI TPM of board chip 2 and the signal of USB are connect
To the first USB interface 4.The function select signal port 12 for cutting chip 3 at a high speed is connected to the GPIO port 13 of BMC chip 6, acquiescence
Function be set to USB3.0, BMC chips change the state of function selection pin when client needs SPI TPM security modules,
Realize that signal switching makes the pattern that this USB interface enters SPI TPM;Such design can be made full use of built in board
The function of USB interfaces, when the first USB interface 4 is in SPI TPM modes secondary USB interface 5 can also storage system daily record
Information.
Disclosed above is only the preferred embodiment of the utility model, but the utility model is not limited to this, any
What those skilled in the art can think does not have creative variation and is made under the premise of the utility model principle is not departed from
Several improvements and modifications, should all fall within the protection scope of the present utility model.
Claims (6)
1. a kind of USB interface multiplex system, it is characterised in that including board, the board is equipped with board chip and switches at high speed
Chip, board chip internal are equipped with security module, the first usb interface module and secondary USB interface module;
The board is built-in with the first USB interface and secondary USB interface;
Security module and the first usb interface module are connected respectively with high speed switching chip;
High speed switching chip is connected with the first USB interface;
High speed switching chip is also associated with BMC chip;
Secondary USB interface module is connected with secondary USB interface.
2. a kind of USB interface multiplex system according to claim 1, which is characterized in that set in the high speed switching chip
There are CHA_1 interfaces and CHA_2 interfaces.
A kind of 3. USB interface multiplex system according to claim 2, which is characterized in that first usb interface module point
Not by USB3_TX_DP signal wires, USB3_TX_DN signal wires, USB3_RX_DP signal wires, USB3_RX_DN signal wires,
USB2_DP signal wires and USB2_DN signal wires are connected to the CHA_1 interfaces of high speed switching chip.
4. a kind of USB interface multiplex system according to claim 3, which is characterized in that
Security module interface module passes through SPI_TMP_MISO signal wires, SPI_TMP_MOSI signal wires, SPI_TMP_CLK respectively
Signal wire, SPI_TMP_IRQ_N signal wires, SPI_TMP_CS_N signal wires and SPI_TMP_RST_N signal wires are connected at a high speed
Switch the CHA_2 interfaces of chip.
5. a kind of USB interface multiplex system according to claim 4, which is characterized in that high speed switching chip is equipped with function
Selection signal port, BMC chip are equipped with GPIO port, and the function select signal port of high speed switching chip selects to believe by function
Number line is connected with BMC chip GPIO port.
6. a kind of USB interface multiplex system according to claim 1, which is characterized in that the high speed switching chip is type
Number be PI3USB3102ZLEX switching chip.
Priority Applications (1)
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CN201721589951.2U CN207397268U (en) | 2017-11-24 | 2017-11-24 | A kind of USB interface multiplex system |
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CN201721589951.2U CN207397268U (en) | 2017-11-24 | 2017-11-24 | A kind of USB interface multiplex system |
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CN207397268U true CN207397268U (en) | 2018-05-22 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108776629A (en) * | 2018-05-30 | 2018-11-09 | 郑州云海信息技术有限公司 | A kind of server chips group carry Micro SD cards switching system and method |
CN110096468A (en) * | 2019-05-08 | 2019-08-06 | 西北大学 | It is a kind of based on FPGA architecture mobile module and its with the connection method of mobile phone |
CN110262991A (en) * | 2019-03-28 | 2019-09-20 | 威锋电子股份有限公司 | USB set is at circuit |
-
2017
- 2017-11-24 CN CN201721589951.2U patent/CN207397268U/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108776629A (en) * | 2018-05-30 | 2018-11-09 | 郑州云海信息技术有限公司 | A kind of server chips group carry Micro SD cards switching system and method |
CN110262991A (en) * | 2019-03-28 | 2019-09-20 | 威锋电子股份有限公司 | USB set is at circuit |
US10901934B2 (en) | 2019-03-28 | 2021-01-26 | Via Labs, Inc. | USB integrated circuit |
CN110262991B (en) * | 2019-03-28 | 2021-01-26 | 威锋电子股份有限公司 | USB integrated circuit |
CN110096468A (en) * | 2019-05-08 | 2019-08-06 | 西北大学 | It is a kind of based on FPGA architecture mobile module and its with the connection method of mobile phone |
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GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180522 Termination date: 20191124 |