CN206805526U - A kind of PCIE BOX switching boards applied on the server - Google Patents

Abstract

The utility model discloses a kind of PCIE BOX switching boards applied on the server, switching motherboard including a rectangular configuration, Neo Scale high-speed signal connectors, CDFP cable interfaces, Re driver chips, power connector and power supply control chip are disposed with the switching motherboard, the PCIE high-speed signal connectors are connected with backboard high/low speed signal, and Re driver chip strings, which are located between PCIE high-speed signal connectors and CDFP cable interfaces, to be used to optimize PCIE high speed signals.The transmission and application of big data and high speed signal can be preferably realized using PCIE BOX switching boards, module design and product can be formed, for follow-up all kinds of servers, meets the needs of user is to PCIE expanded functions, reduces product development cost.

Description

A PCIE BOX adapter board applied to a server

technical field

The utility model relates to a PCIE board and belongs to the technical field of computers, in particular to a PCIE BOX adapter board applied on a server.

Background technique

The PCIE adapter board is mainly used for data transmission of interfaces of different specifications. It can expand many external functions for the computer. The interface varies according to the bus bit width, including X1, X4, X8 and X16, of which X2 mode is used for internal Interface rather than socket mode.

With the expansion and application of servers by users, data transmission and applications have been greatly improved, especially the demand for high-speed signals is getting higher and higher. However, the application and system connection of PCIE adapter boards in servers are currently subject to certain restrictions.

Disclosed as Chinese patent (authorization announcement number CN203930612U) " a kind of multi-function PCIE IO adapter plate ", is used for the connection between PCIE equipment and server mainboard, described adapter plate is a rectangular PCB board card, described adapter Connecting board is provided with several device ends, CLKBUFFER and motherboard end, wherein, described motherboard end links to each other with described device end through described CLKBUFFER, and described device end is used for connecting PCIE equipment, through described motherboard end described transfer The board is connected to the main board of the server. Using the multi-functional PCIE IO adapter board provides multiple PCIE device interfaces, which can be plugged into multiple PCIE devices at the same time, overcoming the defect that the existing server motherboard can only plug in a few PCIE devices. The utility model can provide a plurality of PCIE device interfaces, and can plug in a plurality of PCIE devices at the same time, but does not relate to the improvement of the high-speed signal transmission of the expansion card.

Utility model content

The utility model provides a PCIE BOX adapter board applied on the server, which is used to solve the problem that the high-speed signal transmission of the PCIE expansion board of the existing server is limited in the prior art.

The utility model is realized through the following technical solutions:

A PCIE BOX adapter board applied on a server, comprising an adapter motherboard, the adapter motherboard is a rectangular structure, Neo Scale high-speed signal connectors, CDFP cable interfaces, Re-driver chip, power connector and power control chip, described PCIE high-speed signal connector and backplane high/low-speed signal connection, Re-driver chip is arranged in series between PCIE high-speed signal connector and CDFP cable interface for Optimize PCIE high-speed signal.

As mentioned above, a PCIE BOX adapter board applied on the server, the PCB board is also provided with EEPROM and I2C Header, the EEPROM is connected to the register of the Re-driver chip, and the I2C Header is connected to the Re-driver chip. The internal registers of the driver chip are connected to the EEPROM for accessing and modifying the internal registers and EEPROM data of the Re-driver chip.

In the aforementioned PCIE BOX adapter board applied to a server, four CDFP cable interfaces are provided, and each CDFP cable interface is connected to a PICE expansion board through a cable.

As mentioned above, there are two Neo Scale high-speed signal connectors, one Neo Scale high-speed signal connector is connected to the PCIE BOX, and the other Neo Scale high-speed signal connector is connected to The device is connected to the PICE adapter board.

As mentioned above, a PCIE BOX adapter board applied on the server, the Re-driver chip is provided with 8, EEPROM and I2C Header are provided with 4, and each of the I2C Header is respectively connected with 2 Re-driver chips. -driver chip and 1 EEPROM connection.

As mentioned above, a PCIE BOX adapter board applied to a server, the adapter motherboard is provided with a dial switch for adjusting the pin level parameters of the Re-driver chip, and the dial switch is set There are 16 of them.

Compared with the prior art, the utility model has the following advantages:

1. Use the PCIE BOX adapter board for the connection between the PCIE device and the server motherboard, which can better realize the transmission and application of large data and high-speed signals, and the PCIE BOX adapter board has a reasonable structure and is easy to use It is convenient and has good promotion and use value.

2. The utility model can form a modular design and product, which can be used in various subsequent servers to meet the user's demand for PCIE expansion functions and reduce product development costs.

Description of drawings

In order to illustrate the embodiments of the present utility model or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that are used in the description of the embodiments or the prior art.

Fig. 1 is a schematic diagram of the front structure of the utility model.

FIG. 2 is a schematic view of the reverse structure of FIG. 1 .

Fig. 3 is a connection block diagram of the utility model.

detailed description

In order to make the purpose, technical solutions and advantages of the embodiments of the utility model more clear, the technical solutions in the embodiments of the utility model will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the utility model. Obviously, the described The embodiments are some embodiments of the present utility model, but not all embodiments.

As shown in Figure 1 and Figure 2, the utility model is a PCIE BOX adapter board applied on the server, which is a rectangular adapter motherboard, and the adapter motherboard is arranged with PCIE high-speed signal connectors and CDFP lines Cable interface, Re-driver chip, power connector and power control chip.

As shown in Figure 3, in this embodiment, two sets of high-speed signal transmission mechanisms are arranged on the transfer motherboard, that is, the PCIEBOX transfer board includes two PCIE high-speed signal connectors, which function as high/low speed connections with the backplane. The function of signal connection; four CDFP cable interfaces are used to insert cables and connect to the front-end PCIE expansion board; eight Re-driver chips are used to optimize PCIE high-speed signals; four EEPROMs are used to store Re-driver chips Register parameters; four I2C Headers, used to access and modify the internal registers and EEPROM data of the Re-driver chip, and realize remote programming of EEPROM; two NeoScale high-speed connectors, used for the connection of PCIE adapter board and PCIE BOX, Obtain the power to control the Re-driver from the PCIE adapter board, and perform low-speed signal and high-speed PCIE signal interaction.

There are also 16 DIP switches arranged on the transfer motherboard for adjusting the pin level parameters of the Re-driver chip, and a power control chip is responsible for supplying power to the Re-driver chip.

When using the PCIE BOX adapter board, connect it with the NeoScale of the PCIE BOX through the Neo Scale high-speed connector. Work, because the set Re-driver chip optimizes the RX signal of the high-speed differential signal of PCIE and transmits it to the high-speed connector and the backplane interconnection; while the TX signal of the high-speed differential signal of PCIE directly connects the high-speed connector and the backplane Therefore, the CDFP cable interface and the Neo Scale high-speed connector can better transmit high-speed signals, so as to realize fast data interaction between the server's PCIE BOX, PCIE adapter board, and PCIE expansion board.

This PCIE BOX adapter board can better realize the transmission and application of big data and high-speed signals, and can form module design and products, which can be used in subsequent various servers to meet users' needs for PCIE expansion functions and reduce product cost. Development costs.

The technical contents not described in detail in the utility model are all known technologies.

Claims (6)

1. a kind of PCIE BOX switching boards applied on the server, including switching motherboard, it is characterised in that the switching is female Plate is a rectangular configuration, and Neo Scale high-speed signal connectors, CDFP cable interfaces, Re-driver are disposed with motherboard of transferring Chip, power connector and power supply control chip, the PCIE high-speed signal connectors connect with backboard high/low speed signal, Re- Driver chip strings, which are located between PCIE high-speed signal connectors and CDFP cable interfaces, to be used to optimize PCIE high speed signals.

2. a kind of PCIE BOX switching boards applied on the server according to claim 1, it is characterised in that described EEPROM and I2C Header are additionally provided with pcb board, the register of EEPROM with the Re-driver chips connects, described I2C Header are connected with Re-driver chip internal registers and EEPROM, for accessing and changing in Re-driver chips Portion's register and EEPROM data.

3. a kind of PCIE BOX switching boards applied on the server according to claim 2, it is characterised in that described CDFP cable interfaces are provided with 4, and each CDFP cable interfaces are connected by cable with PICE expansion board.

4. a kind of PCIE BOX switching boards applied on the server according to claim 3, it is characterised in that described Neo Scale high-speed signal connectors are provided with 2, and a Neo Scale high-speed signal connector connects with PCIE BOX, separately One Neo Scale high-speed signal connector is connected with PICE connecting plates.

5. a kind of PCIE BOX switching boards applied on the server according to claim 4, it is characterised in that described Re-driver chips are provided with 8, EEPROM and I2C Header are equipped with 4, and each I2C Header are respectively with 2 Individual Re-driver chips and 1 EEPROM connection.

6. a kind of PCIE BOX switching boards applied on the server according to claim 5, it is characterised in that described Switching motherboard is provided with the toggle switch for the pin level parameters for being used to adjust Re-driver chips, and the toggle switch is set There are 16.