CN207382679U - Capacitance and bury condenser network plate - Google Patents
Capacitance and bury condenser network plate Download PDFInfo
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- CN207382679U CN207382679U CN201720856074.4U CN201720856074U CN207382679U CN 207382679 U CN207382679 U CN 207382679U CN 201720856074 U CN201720856074 U CN 201720856074U CN 207382679 U CN207382679 U CN 207382679U
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Abstract
The utility model is related to capacitance and bury condenser network plate.The capacitance includes：High dielectric constant polymer composite layer；Ion implanted layer, the ion implanted layer make conductive material ion be injected into high dielectric constant polymer composite layer to be formed at a high speed by ion injection method；And metal layer, it is formed and is covered on the ion implanted layer.
Description
Technical field
The utility model is related to capacitance and bury condenser network plate.
Background technology
As electronic product tends to frivolous, high frequency and multifunctional direction development, circuit level is higher and higher, corresponding to collect
It is more and more into circuit pin and configuration, noise is caused to increase therewith.It, can be half in order to abate the noise or do electrical compensation
Increase passive device in conductor package structure to abate the noise and stabilizing circuit.For example, capacitance plays an important role of to store charge, it can
High frequency noise in a manner that energy is kept in is absorbed, so as to reduce system power supply fluctuation, ensures the integrality of signal transmission.
It is that passive device is incorporated on substrate with SMT surface mounting technologies to increase one of capacitive way, but is easily generated
Impedance, signal cross-talk, and exhibiting high surface attachment area is occupied, do not meet the increasingly strict light and short requirement of electronic product.
Another is that capacitance is embedded in package substrate or PCB circuit board, this to be known as burying capacitance（Buried capacitor
Device）.The substrate or circuit board fabrication of Embedded capacitance mainly include three key technologies：Capacitance embedment technology, internal interconnection technology
Capacitance technology is buried with used.The both sides for burying capacitance are metal layers, and centre is Jie of " high-k (Dk), low dielectric loss "
Matter layer, usual 10 μm of -25 μ m-thick, greatly promotes capacitance, and electric supply system can be helped to decouple and filter, reduce system power
The impedance of distribution and the resonance effects of high-frequency circuit.Be mainly used in high speed data transfer/communication apparatus, server, computer,
Test measurement, medical treatment, printer, display, military field and hand-held electronic product industry.
For identical voltage, frequency and capacitance, the heat generation of capacitance is decided by dielectric loss, it is desirable that burying capacitance has
Relatively low dielectric loss.Whether the surface-pasted capacitances of circuit board SMT or the embedment electricity set in the inner core of circuit board
Hold, all pursue higher, more stable capacitance.Increase capacitance, three factors can be changed：1) capacitor electrode superficial area is made
Increase；2) reduce medium thickness；3) increase dielectric layer constant Dk.Increase capacitor electrode superficial area, do not meet electricity
The light and short development trend of road plate；Therefore, medium thickness (≤25 μm), raising dielectric constant Dk, low-dielectric loss, which is thinned, is
The developing direction of capacitance will be buried from now on.
For medium thickness is thinned, insulating layer is had been reported that without using glass fiber material, using resin coated on copper foil
Mode had both improved reliability or can reduce dielectric thickness to 25 μm.Have been reported that use " sputtering, CVD, anodic oxidation "
The methods of, by the high Dk media (SiO of less than 1 μm of insulation2Or ceramic particle etc.) be attached on thick copper foil, the thickness of thin insulating medium
Degree reduces following to 1 μm of the limit, can substantially increase the capacitance of buried capacitor material, but since dielectric layer is too thin, easy to be crisp and lose,
Machinability and reliability are poor, are restricted burying capacitance applications field.
On the other hand, under the premise of the relatively low dielectric loss of material and machinability is ensured, insulative dielectric is improved as far as possible
Constant Dk, this is the highly difficult thing of part to burying capacitance.
The manufacturing process for burying capacitance is generally divided into three kinds：
1) silk-screen printing：Dielectric ink or high Dk materials are printed on copper foil, silk-screen printing is led on it again after curing
Electric ink etc. forms another layer of copper electrode, and capacitance is made.Silk-screen printing technique is simple, low cost, but the Embedded capacitance made
Value dispersiveness is larger, and capacitance precision controlling is poor.
2) less than 1 μm thin film dielectrics method：The methods of having been reported that using sputtering, CVD, anodic oxidation, by the insulation below 1 μm
High Dk media (generally inorganic ceramic material) are attached to thick copper foil or semiconductor silicon on piece, are formed close to 800oC high-temperature calcinations,
The thickness of thin insulating medium reduces to ultimate attainment, then makes another metal electrode；The technique can substantially increase capacitance because of thin dielectric substance
Amount, but since dielectric layer is too thin, poor (dielectric layer high-temperature calcination easily generates subtle cracking or gas for machinability and reliability
Bubble, the easy leakage current of capacitor, insulation proof voltage hydraulic performance decline), it is restricted burying the application of capacitance field.
3) lamination+etching：The industry overwhelming majority all buries capacitance in the form of laminating making is in copper-clad plate.Common practice is
High Dk material resins are coated on thick copper foil (RZ2-3 μm), dry, semi-solid preparation, then another layer of copper foil pressed and
Into；Its two sides copper foil is 18,35 and 70 μm, is convenient for being not easy embrittlement, snap-gauge when etching, process operation using thicker copper foil
Deng；Intermediate dielectric layer is generally 8,12,16,25 μm.Copper foil is covered to the copper-clad plate two sides to be etched, and forms the electricity of capacitance body
Pole, then contact laminating forms multilayer circuit board in a manner of core material, will bury capacitance and is placed in multilayer circuit board.It should " lamination
Etching " technique formation buries that capacitive way is similar with custom circuit plate manufacturing process, and simple for process, PCB producers are easily mastered.The work
Skill mostly using epoxy resin and the strong feature of copper foil bonding force, adds in high Dk inorganic particles (BaTiO3 etc.) and composite wood is made wherein
Material, but addition is more than certain limit, affects the combination power of resin and copper foil, removed when being easily laminated copper foil or blistering or
The brittleness of person's material becomes larger, and subsequent conditioning circuit plate processability is caused to be deteriorated.In addition, wrinkle in order to avoid copper face is laminated, the lamination work
Skill must use 18 μm or more copper foils, cause the area allowance control of capacitance electrode to become difficult, affect actual capacitance value
Control accuracy (general capacitance control accuracy is in 5-10%)；On the other hand, in the electrode embedment package substrate of thick copper foil, envelope is made
Filling substrate or semiconductor packages integral thickness increases, and is unfavorable for the development trend of thin panel design from now on.There is a kind of reduction to bury capacitance
The method of copper thickness is using carrier copper foil, and mainly 18 μm of copper foils or other materials does carrier, ensures rigidity, 2-5 μm thin
Copper foil is attached on carrier, peel-away removal carrier after lamination, is left thin copper and is made copper electrode；This carrier thin copper foil price is very
It is expensive, and be still difficult to overcome the problem of laminating copper foil roughness is larger, and insulating reliability is poor under thin insulating ambient condition.
4) sputtering method：Copper electrode is etched on circuit board core material, as " the lower floor's copper electrode " for burying capacitance；At it
On " lower floor's copper electrode ", spray to form dielectric material (such as high Dk inks) using 3D spraying methods, then sputter on the dielectric material
The metals such as target Ni, and dry film pattern transfer, etching etc. are pasted, it is thick relatively thin " upper strata copper electrode " to form copper；This method only one side
Copper electrode thickness reduces, and the function influence for reducing the circuit board overall thickness for burying capacitance is limited；And cumbersome, too long in flow is made, it is difficult
To overcome the shortcomings that sputtering copper electrode surface pinholes is excessive, capacitive property is unstable and peel strength less than normal, easily peelable and curved
The problems such as folding, therefore, the process, are difficult to extensive use on the market.
In summary, a kind of high-k Dk is developed（Dk>15）, high-capacitance, low-loss (Df ＜ 0.02), 25 μ m-thicks
Polymer composites below spending are as dielectric layer, dielectric thickness is uniform, heat-resisting and moisture-proof is high, levels copper electrode is thin
Copper design, copper electrode pin hole is less, cover copper high-peeling strength, is resistant to bending, the easy processing capacitance that buries covers copper product, is to bury electricity from now on
Hold the inevitable requirement of development trend.
The content of the invention
To solve problem above, the utility model is related to a kind of capacitance, condenser network plate and its manufacturing method are buried, is used
" ion implanting " technology is right≤25 μ m thick the metallization of " polymer+high Dk particles " composite material, solve high Dk granule contents
High composite material or thin-film material cover thin copper, cover the problem of copper is easily peelable, and combine roll-to-roll continuous " ion implanting+electricity
The design of plating+pattern transfer+etching+cutting " production process, can make and bury capacitance composite material, meet envelope from now on a large scale
Dress substrate is to burying capacitance slimming demand for development.
It is according to the present utility model in a first aspect, provide a kind of capacitance, including：High dielectric constant polymer composite material
Layer；Ion implanted layer, the ion implanted layer make conductive material ion be injected into high-k at a high speed by ion injection method
It is formed in polymer composite layer；And metal layer, it is formed and is covered on the ion implanted layer.
Preferably, which includes fluoropolymer resin and high dielectric constant particle.
Preferably due to inject the high-energy of metal ion, the injection material and the high dielectric of the ion implanted layer can be made
Biospecific polymer composite layer forms stable doped structure, and the doped structure is in the high dielectric constant polymer composite material
Multiple foundation piles are formed under the surface of layer.
Preferably, which further includes conductor sedimentary, which is covered on the ion implanted layer, and the gold
Belong to layer to be covered on the conductor sedimentary, which includes plasma deposited layers and/or magnetron sputtering deposition layer,
The plasma deposited layers form conductive material ion deposition by plasma deposition method；The magnetron sputtering layer passes through
Magnetically controlled sputter method makes conductive material atomic deposition and is formed.
Preferably, the plasma deposited layers and the magnetron sputtering layer include one or more layers conductor material, each layer
Conductor material is formed by one or many plasma-deposited or magnetron sputtering processes.
Preferably, the material of the ion implanted layer includes：One kind in Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb or
One kind in a variety of or binary between them, ternary and quaternary alloy.
Preferably, the material of the conductor sedimentary includes：One kind in Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb.
Preferably, the material of the metal layer includes：By Al, Mn, Fe, Ti, Cr, Co, Ni, Cu, Ag, Au, V, Zr, Mo, Nb
In one kind.
Preferably, which includes epoxy resin, BT resins, bismaleimide, cyanate, polyethylene, poly-
Styrene, Kynoar, polyester, makrolon, polyphenylene sulfide, fire resistant polypropylene, poly- 2,6 naphthalene diacid second diester, polyamides
One kind in imines, polytetrafluoroethylene (PTFE), polyphenylene oxide.
Preferably, which includes inorganic ceramic particle and/or conducting particles.
Preferably, which includes silica, barium titanate, strontium titanates, lead zirconate titanate, load lanthanium titanate, zirconium
One kind in lead plumbate lanthanum, strontium bismuth tantalate.
Preferably, which includes one kind in carbon nanotubes, carbon black, graphite composite powder, Al, Al2O3, Ag, Ni.
Preferably, the weight percent which accounts for the high dielectric constant polymer composite layer is
10-90%。
Preferably, the weight percent which accounts for the high dielectric constant polymer composite layer is
More than 80%.
Preferably, the one kind of the metal layer by electroplating, in chemical plating, vacuum evaporation coating obtains.
Preferably, the thickness of the high dielectric constant polymer composite layer is 8-25 μm.
Preferably, which is the capacitance of form of film.
Second aspect according to the present utility model provides one kind and buries condenser network plate, including：It is according to the present utility model
Capacitance；And the capacitance is embedded to circuit base material therein.
Compared with prior art, the beneficial effects of the utility model are as follows：
1. the utility model uses ion implantation technique, since the high-energy of injection metal ion is, it can be achieved that normal in dielectric
Number content reaches realizes metallization on more than 80% high dielectric constant polymer base material, has between metal layer and base material obtained
Compared with high-peeling strength.Compared with the magnetron sputtering method of the prior art or pressing method, the capacitance of more capacity can be made.Magnetron sputtering
Combination force difference made from method between metal layer and base material leads to not realization and is reaching more than 80% in dielectric constant content
Metallization is realized on high dielectric constant polymer base material.
2. the utility model uses ion implantation technique, reduce pin hole quantity.If there is pin hole on electrode, in circuit
Pickling liquid may cause thin insulating medium also to have pin along the high Dk inorganic particles in pin-hole corrosion dielectric layer in plate processing procedure
Hole, so that the easy leakage current of capacitor, insulation proof voltage hydraulic performance decline.If there is pin hole on electrode, the dielectric of capacitance material
Loss also will increase.
Meanwhile the ion implantation technique of the utility model can also solve the Bao Tonghe that covers of " high Dk composite materials " to cover copper easy
Stripping problem expands the content range applied using kind quantity and high Dk particles for burying capacitance polymer composites.
Field of circuit boards, for 8-25 μm of medium thickness, it is not necessary to using being coated on copper foil or being laminated copper foil, directly in dielectric thickness
Spend 8-25 μm of (composite material " resin+high Dk particles ") ion implanting metal layer；It can be to avoid the layer when high Dk granule contents are high
Press copper foil peeling.
Capacitance process is buried in laminating making, when the composite material of copper foil and high-content particle is laminated, be easily peeled off or
Blistering.For 8-25 μm of medium thickness, capacitance is buried applied to field of circuit boards, it is general to be applied using " high Dk material resins "
It overlays on RZ2-3 μm of thick copper foil, then dry, semi-solid preparation carries out another thickness copper foil to press；Its two sides copper foil is
18th, 35 and 70 μm.
Sputtering method because sputtering particle energy is low, speed is low, generate many particle discrete areas or transmitting from target
Angle is larger, thus the particle onto composite base material is more, and the pin hole quantity of formation is more, cause the easy leakage current of capacitor,
Insulate proof voltage hydraulic performance decline.For semiconductor applications or high power capacity device, below 1 μm of medium thickness, using sputtering,
The methods of CVD, spray coating, is SiO2、BaTiO3Ceramics etc. " high Dk particles " (non-polymer resin) are directly sputtered or sprayed and apply
It is layed onto on copper foil.
3. the utility model, can using roll-to-roll continuous " ion implanting+plating+pattern transfer+etching+cutting " technology
It is extensive make 10-25 μ m thicks, film morphology polymer composites bury capacitance, avoid manufacturing process because of dielectric layer mistake
It is thin, excessively crisp and bend or damaged, improve the machinability that circuit board making process buries capacitance.
4. in the utility model, bury the thin copper design of the levels copper electrode of capacitance and realize, when improving etching
Electrode area control accuracy, so as to improve the control accuracy of actual capacitance, also reduce in package substrate to bury capacitance total
Thickness finally improves the reliability of semiconductor packages.
Description of the drawings
The utility model is specifically described below with reference to attached drawing and in conjunction with the embodiments, the advantages of the utility model and realization
Mode will be apparent from, wherein, content shown in the drawings is only used for that the utility model is explained, without forming to this
Utility model in all senses on limitation, attached drawing is only illustrative, not strictly drawn to scale.In all attached drawings
In, identical reference number represents the same or similar part, wherein：
Fig. 1 shows the capacitance according to the utility model embodiment；
Fig. 2 is shown buries condenser network plate according to the utility model embodiment；
Fig. 3 is shown according to the manufacture capacitance of the utility model embodiment and the method for burying condenser network plate.
Reference number：
100 capacitances
102 fluoropolymer resins
104 ion implanted layers
106 metal layers
108 high Dk particles
200 bury condenser network plate
202 fluoropolymer resins
204 ion implanted layers
206 metal layers
208 high Dk particles
210 circuit base materials
High Dk particles with fluoropolymer resin are mixed and are dried to obtain high dielectric constant polymer composite material film by 302
304 pairs of high dielectric constant polymer composite material films carry out ion implanting to form ion implanted layer
306 in ion implanted layer overlying metal to form metal layer
308 pre-treatments, pad pasting, exposure, development, etching, AOI are checked
310 cut to obtain capacitance
312 will bury condenser network plate in capacitance lamination embedment circuit base material to obtain.
Specific embodiment
The utility model is related to capacitance, bury condenser network plate and its manufacturing method.Capacitance includes fluoropolymer resin and high Dk
Particle, 5 μm of overall thickness ＞；By liquid polymeric resins and high Dk particles mixing (skeletal supports such as no glass material), make
In the composite material of 10-90% scopes, material has certain bending resistance for film composite material or high Dk particle weights content, then
It is made " ion implanting covers copper, dry film pre-treatment, pad pasting, exposure, development, etching, AOI inspections, cutting " by roll-to-roll form
Flow scheme design is fabricated to the capacitance that buries comprising metal capacitance electrode, then is laminated in embedment multilayer circuit board.
I. ion implanting
Ion implanting can be realized by the following method：Using conductive material as target, under vacuum conditions, pass through electricity
Arc effect makes the conductive material in target ionize and generate ion.Then, the ion is made to accelerate under the electric field of high voltage and obtain
Very high energy (such as 1-1000keV, such as 50keV, 100keV, 200keV, 500keV).The conductive material ion of high energy
Then the surface of high dielectric constant polymer composite material is directly hit with very high speed, and is injected into high-k and gathers
In the certain depth bounds of the lower face of compound composite material.It polymerize in the conductive material ion injected with high-k
Chemical bond (such as ionic bond or covalent bond) is formd between the molecule of object composite material, so as to form doped structure.Chemical bond
Help to enhance the combination power between ion implanted layer and high dielectric constant polymer composite material so that ion implanted layer is not allowed
Easily come off from high dielectric constant polymer composite material.
Outer surface (or being upper surface) and the high dielectric constant polymer composite material of thus obtained ion implanted layer
Surface be flush, and its inner surface (or being lower surface) is then deep into the inside of high dielectric constant polymer composite material.
As a specific example, the ion of conductive material can be obtained during ion implanting 50-1000keV (such as 50keV, 100keV,
200keV, 300keV, 400keV, 500keV, 600keV, 700keV, 800keV, 900keV) energy, and can be injected into
High dielectric constant polymer composite material lower face 1-500nm (such as 10nm, 20nm, 50nm, 100nm, 200nm,
300nm, 400nm) depth.
It, can by controlling the various relevant parameters in ion implantation process, such as Injection Current, voltage, implantation dosage etc.
To adjust the depth that ion implanted layer is deep into high dielectric constant polymer composite inner, i.e. the interior table of ion implanted layer
Face depth residing below high dielectric constant polymer composite material surface.For example, the energy of injection ion is 5-
1000keV, the dosage of injection is 1.0 × 1012To 1.0 × 1018ions/cm2(it is highly preferred that implantation dosage is 1.0 × 1015Extremely
5.0×1016ions/cm2), so that the inner surface of ion implanted layer is located at the surface of high dielectric constant polymer composite material
The depth of lower section 5-50nm.In ion implantation process, it can use and the combination of high dielectric constant polymer composite material
Power stronger metal or alloy carries out ion implanting, for example, can be used Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, Al,
The metals such as Be, Co, Fe, Mg, Mn, Pt, Ta, W and binary between them, ternary or quaternary alloy (such as NiCr, TiCr,
VCr, CuCr, MoV, NiCrV, TiNiCrNb) in one or more as the target in ion implantation process, wherein, Ni,
Cr, Ti are preferred injection materials.In other words, the ion implanted layer of gained can by Ti, Cr, Ni, Cu, Ag, Au, V, Zr,
One or more in Mo, Nb, Al, Be, Co, Fe, Mg, Mn, Pt, Ta, W form or by the alloy group between these elements
Into.
In ion implantation process, conductive material ion is forcibly injected into high dielectric constant polymer with very high speed
The inside of composite material forms stable doped structure with high dielectric constant polymer composite material, is equivalent to normal in high dielectric
The lower face of number polymer composites forms large number of foundation pile.Due to the presence of foundation pile, and follow-up gold obtained
Belong to layer with foundation pile to be connected, therefore, base material and the peel strength being subsequently formed between metal layer thereon can reach 0.5N/mm with
On, even more than 0.8N/mm, such as up to 0.7-1.5N/mm.In contrast, in the case where conventional magnetron sputters, sputtering
The energy of particle is only up to several electron-volts, thus the particle can be deposited on substrate surface but not enter in base material
Portion, the combination power between the conductor layer and substrate surface of gained is not high, only up to 0.5N/mm or so, hence it is evident that is noted less than ion
Enter.Moreover, being usually nanoscale for the conductive material size of ion implanting, it is distributed during ion implanting than more uniform, and
It is and little to the incident angle difference of substrate surface.It is accordingly possible to ensure base material and being subsequently formed between metal layer thereon
Composition surface have relatively low surface roughness, be, for example, less than 0.4 μm, be even as low as 0.001-0.1 μm of (for example, about 0.02 μ
m).Therefore, in high frequency signal transmission, the loss of signal as caused by conductor layer can be significantly reduced, it is whole so as to further reduce
The body loss of signal.
Compared with capacitance is buried in laminating making, it is easily peeled off or blisters when being laminated copper foil；Using ion implantation technique, solve
The Bao Tonghe that covers of " high dielectric constant polymer composite material " covers the easily peelable problem of copper, expands and buries capacitance polymer resin material
Application kind quantity and scope.
Compared with sputtering, ion implantation be high energy ion injection high dielectric constant polymer composite material surface after,
Stable doped structure is formed, it is square into multiple foundation piles under the surface, thus conductive ion implanted layer polymerize with high-k
Object composite material combination power is more preferable, in circuit board making process (such as pad pasting, etching spray, live roller, carrying operation etc.)
Under the stress of impact or bending squeezes, metal copper layer forms entirety with polymer material resistant to bending, will not run into bending easily
And fracture, remove or blister, machinability is more preferable.Layers of copper causes copper electrode out-of-flatness (to be equivalent to dielectric layer under folding s tress
Thickness change), local capacitance variation is unfavorable for capacitance value stabilization and high-precision control.
High Dk inorganic ceramic materials in composite material, form by high-temperature calcination, and material is harder and fine and close, sputter low energy
The ion for measuring low speed can not be preferably in connection；Compared with sputtering, ion implantation is that the ion implanting of high-energy high speed arrives
Behind high Dk inorganic ceramic materials surface, form stable doped structure, it is square into multiple foundation piles under a surface, thus it is conductive from
Sub- implanted layer and base material combination power are more preferable.Sputtering simultaneously is because energy is low, many particle discrete areas or hair that are generated from target
The angle penetrated is larger, thus the particle onto base material is more, and the pin hole quantity of formation is more.
If there is pin hole on copper electrode, pickling liquid may be along the height in pin-hole corrosion dielectric layer in circuit board process
Dk inorganic particles cause thin insulating medium also to have pin hole, so that the easy leakage current of capacitor, insulation proof voltage hydraulic performance decline.
If there is pin hole on copper electrode, the dielectric loss of capacitance material also will increase.
II. plasma-deposited/magnetron sputtering
In addition to ion implanted layer, plasma deposited layers can also be formed on the surface of the substrate and/or magnetic control splashes
Penetrate layer.Plasma deposited layers and/or magnetron sputtering layer are made of conductive material, and can have the thickness of 1-10000nm,
For example, 100nm, 200nm, 500nm, 700nm, 1 μm, 2 μm, 5 μm, 7 μm or 10 μm etc..Plasma deposited layers and/or magnetic
Controlling the thickness of sputtering layer can set as desired by various deposition parameters are adjusted, for example, it can be set to for so that being formed with
The sheet resistivity of the substrate of the plasma deposited layers and/or magnetron sputtering layer be less than 200 Ω/, 100 Ω/, 80 Ω/,
50 Ω/, etc..In addition, as composition plasma deposited layers and/or magnetron sputtering layer conductive material, may be employed with
The identical or different various metals of ion implanted layer, alloy, conductive oxide, conductive carbide, conductive organic matter etc., but simultaneously
It is without being limited thereto.Can according to the constituent of selected base material and ion implanted layer and thickness etc. come select for etc. from
The conductive material of daughter deposition and/or magnetron sputtering.Preferably, come using the metal or alloy being well combined with ion implanted layer
Carry out plasma-deposited and/or magnetron sputtering, for example, can be used Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb and they
Between alloy in one or more, which is, for example, NiCr, TiCr, VCr, CuCr, MoV, NiCrV, TiNiCrNb etc..
Moreover, plasma deposited layers and/or magnetron sputtering can also include being made of identical or different material one or more layers.
III. capacitance
Fig. 1 shows the capacitance 100 according to the utility model embodiment, including high dielectric constant polymer composite material
Layer, ion implanted layer 104 and metal layer 106, wherein high dielectric constant polymer composite layer include fluoropolymer resin 102
(excellent heat resistance, mechanical property and machinability, at low cost) and high Dk particles 108 (excellent high Dk dielectric properties).It is high
Dielectric constant polymer composite layer can ensure that material has excellent processability, low-dielectric loss and high Dk dielectricities simultaneously
Energy；And polymer can be processed into film (8-25 μm of thickness), can play " thin dielectric layer " high-capacitance to greatest extent
Advantage, thus with preferable application prospect.
High Dk particles 108 include inorganic ceramic particle and conducting particles；In inorganic ceramic particle, BaTiO3 is as high dielectric
Ceramics and extensive use；Also the filling of conducting particles (carbon nanotubes, carbon black, graphite composite powder or other metallics etc.) is had been reported that
To the material of polymer, the dielectric constant close to percolation threshold material can increase extremely, but this kind of composite material dielectric properties weight
Existing property is poor, material Dk, Df stability is more difficult to control.Fluoropolymer resin includes two kinds of " non-polar and polar "；Non-polar polymer
(such as PTFE, PPE) only generates induced dipole square under external electric field, and dielectric loss is low, substantially from frequency and temperature change shadow
It rings, dielectric constant is relatively low (being less than 2.5)；Polar polymer under the action of an external electric field, can generate electron cloud displacement polarization, dipole
Orientation polarization and polar group polarization, dielectric loss is larger, is affected by frequency and temperature, and dielectric constant is also larger, generally
3-10 or so.
In short, after various polymer materials increase high Dk fillers, the increased amplitude of dielectric constant, dielectric loss respectively differs
A kind of sample, further-more it is desirable to make polymer composites simultaneously with " high Dk dielectric constants, low-loss, be easily worked ".
Fluoropolymer resin 102 includes epoxy resin epoxy, BT resin, bismaleimide BMI, cyanate CE, polyethylene
(HDPE or LDPE), polystyrene PS, Kynoar PVDf, polyester PET, polycarbonate, polyphenylene thioether PPS, high temperature resistant
Polypropylene HTPP, poly- 2,6 naphthalene diacid second diester PEN, polyimides PI, polytetrafluoroethylene PTFE, polyphenylene oxide PPE etc.；Polymer
The solids weight content 10%-90% of resin.
High Dk particles 108 or filler include inorganic ceramic particle and conducting particles, and inorganic ceramic particle includes SiO2, metatitanic acid
Barium (BaTiO3), strontium titanates (SrTiO3), lead zirconate titanate Pb (ZrTi) O3(common name PZT), load lanthanium titanate (PbLaTiO), lead zirconates
Lanthanum (PbLaZrO) (common name PLZT), strontium bismuth tantalate (SrBi2Ta2O9) one kind of perofskite type oxides or several such as (common name SBT)
Kind mixture；Conducting particles nano-particles and carbon black, graphite composite powder or Al, the Al such as including carbon nanotubes2O3, Ag, Ni metal
One or more of mixtures of particle etc..
Conductive material ion implanting is made to the surface of high dielectric constant polymer composite layer by ion injection method
Form ion implanted layer 104 down.Meanwhile on ion implanted layer 104 formed metal layer 106, by plating, chemical plating,
One or more in the methods of vacuum evaporation coating and obtain, to obtain the conductor layer with desired thickness and electrical conductivity.
It additionally, can also be on the surface of high dielectric constant polymer composite layer in addition to ion implanted layer
Conductor sedimentary is formed, conductor sedimentary is covered on ion implanted layer, and metal layer is covered on conductor sedimentary, conductor
Sedimentary includes plasma deposited layers and/or magnetron sputtering deposition layer, and plasma deposited layers pass through plasma-deposited side
Method makes conductive material ion deposition and is formed；Magnetron sputtering layer makes conductive material atomic deposition and shape by magnetically controlled sputter method
Into.
IV. condenser network plate is buried
Fig. 2 is shown buries condenser network plate 200 according to the utility model embodiment, including capacitance shown in FIG. 1 and
Capacitance is embedded to circuit base material 210 therein.The capacitance includes high dielectric constant polymer composite layer, ion implanted layer
204 and metal layer 206, wherein high dielectric constant polymer composite layer includes fluoropolymer resin 202 and high Dk particles 208.
Capacitance is embedded in package substrate or PCB circuit board, therefore need not weld to reduce inductance and source impedance, and solder joint
After reduction, solder joint failure phenomenon is reduced, and the reliability of wiring board or encapsulation also gets a promotion.On the other hand, Embedded capacitance device
Valuable surface area has been saved, has reduced plate suqare, has shortened circuit, has reduced the distance of capacitor element and chip chamber, has enhanced electrical resistance
Can, circuit board is made progressively to move towards lightness and slimming.
V. capacitance and the manufacturing method for burying condenser network plate
Fig. 3 is shown according to the manufacture capacitance of the utility model embodiment and the method for burying condenser network plate, including such as
Lower step：
Step 302：High Dk particles 108,208 with fluoropolymer resin 102,202 are mixed and are dried to obtain high-k
Polymer composites；
Step 304：To high dielectric constant polymer composite material carry out ion implanting with formed ion implanted layer 104,
204；
Step 306：In ion implanted layer 104,204 overlying metals to form metal layer 106,206；
Step 308：Pre-treatment, pad pasting, exposure, development, etching, AOI are checked；
Step 310：It cuts to obtain capacitance 100；
Step 312：Capacitance 100 is laminated in embedment circuit base material 210 and buries condenser network plate 200 to obtain.
In above-mentioned steps, high dielectric constant polymer composite material is into form of film and rolled.It is roll-to-roll continuous
" ion implanting+cover copper+pattern transfer+etching+cutting " technology, can make 10-25 μ m thicks, film morphology polymer on a large scale
The capacitance of composite material avoids manufacturing process bending or damaged when dielectric layer is excessively thin, excessively crisp, improves circuit board making process
The machinability of capacitance.
VI. embodiment 1
Substrate component：Epoxy resin is 20%, BaTiO3For 80%
Resin thickness：15 microns
Dielectric constant：20, far below the 35 of prior art similar material
Dielectric loss factor：0.009, far below the 0.014 of prior art similar material.
Ion implanting nickel is carried out to base material first, carries out plasma-deposited nickel-copper afterwards（10-90）Gold is made in alloy
Belong to layer, so as to obtain capacitor.The static capacity of final capacitance obtained：35, performance exceeds conventional capacitive more than 50%.
VII. embodiment 2
Substrate component：PI resins are 15%, high-k filler is 85%
Resin thickness：10 microns
Dielectric constant：15, far below the 40 of prior art similar material
Dielectric loss factor：0.010, far below the 0.029 of prior art similar material.
Ion implanting nickel-chromium alloy is carried out to base material first, carries out magnetron sputtering deposition nickel afterwards, magnetic control is carried out afterwards and splashes
Deposition copper is penetrated, metal layer is made, so as to obtain capacitor.The static capacity of final capacitance obtained：25, performance is beyond common electricity
Hold more than 80%.
VIII. embodiment 3
Substrate component：Epoxy resin is 15%, high-k filler is 85%
Resin thickness：20 microns
Dielectric constant：15, far below the 40 of prior art similar material
Dielectric loss factor：0.010, far below the 0.047 of prior art similar material.
Ion implanting nickel-chromium alloy is carried out to base material first, carries out magnetron sputtering deposition nickel afterwards, magnetic control is carried out afterwards and splashes
Deposition copper is penetrated, metal layer is made, so as to obtain capacitor.The static capacity of final capacitance obtained：30, performance is beyond common electricity
Hold more than 90%.
IX. conclusion
The utility model may be implemented in dielectric constant granule content and reach on more than 80% high dielectric constant polymer base material
It realizes metallization, has between metal layer and base material obtained compared with high-peeling strength.Magnetron sputtering method or pressing with the prior art
Method is compared, and the capacitance of more capacity can be made.Combination force difference made from magnetron sputtering method between metal layer and base material, causes nothing
Method is realized realizes metallization on the high dielectric constant polymer base material for reach more than 80% in dielectric constant granule content.
It, should be easily geographical although the utility model has been described in detail together with only a limited number of embodiment
Solution, the utility model are not restricted to this disclosed embodiment.And on the contrary, the utility model can change not having before including
Any number of change that spirit and scope be described but with the utility model match, replacement, replacement are equal to cloth
It puts.In addition, notwithstanding the various embodiments of the utility model, it is to be understood that the aspect of the utility model can wrap
Include in the embodiment of description more only.Therefore, the utility model will be not seen as limited by the foregoing description, but only by weighing
The scope limitation of profit requirement.
Claims (15)
1. a kind of capacitance, including：
High dielectric constant polymer composite layer；
Ion implanted layer, the ion implanted layer by ion injection method makes conductive material ion, and to inject supreme dielectric normal at a high speed
It is formed in number polymer composite layer；And
Metal layer is formed and is covered on the ion implanted layer.
2. capacitance according to claim 1, which is characterized in that the injection material of the ion implanted layer and the high dielectric
Biospecific polymer composite layer forms doped structure, and the doped structure is in the high dielectric constant polymer composite layer
Surface under form multiple foundation piles.
3. capacitance according to claim 1, which is characterized in that the capacitance further includes conductor sedimentary, and the conductor sinks
Lamination is covered on the ion implanted layer, and the metal layer is covered on the conductor sedimentary, the conductor deposition
Layer includes plasma deposited layers and/or magnetron sputtering deposition layer, and the plasma deposited layers pass through plasma-deposited side
Method makes conductive material ion deposition and is formed；The magnetron sputtering layer by magnetically controlled sputter method make conductive material atomic deposition and
It is formed.
4. capacitance according to claim 3, which is characterized in that the plasma deposited layers and the magnetron sputtering layer are equal
Including one or more layers conductor material, each layer conductor material passes through one or many described plasma-deposited or magnetic controls
Sputtering process is formed.
5. according to the capacitance any one of claim 1-4, which is characterized in that the material of the ion implanted layer includes：
One kind in Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb.
6. the capacitance according to claim 3 or 4, which is characterized in that the material of the conductor sedimentary includes：Ti、Cr、
One kind in Ni, Cu, Ag, Au, V, Zr, Mo, Nb.
7. according to the capacitance any one of claim 1-4, which is characterized in that the material of the metal layer includes：By Al,
One kind in Mn, Fe, Ti, Cr, Co, Ni, Cu, Ag, Au, V, Zr, Mo, Nb.
8. capacitance according to claim 1, which is characterized in that the polymerization of the high dielectric constant polymer composite layer
Resin includes epoxy resin, BT resins, bismaleimide, cyanate, polyethylene, polystyrene, Kynoar, poly-
Ester, makrolon, polyphenylene sulfide, fire resistant polypropylene, poly- 2,6 naphthalene diacid second diester, polyimides, polytetrafluoroethylene (PTFE), polyphenyl
One kind in ether.
9. capacitance according to claim 1, which is characterized in that the Gao Jie of the high dielectric constant polymer composite layer
Dielectric constant particles include inorganic ceramic particle and/or conducting particles.
10. capacitance according to claim 9, which is characterized in that the inorganic ceramic particle includes silica, metatitanic acid
One kind in barium, strontium titanates, lead zirconate titanate, load lanthanium titanate, lead zirconates lanthanum, strontium bismuth tantalate.
11. capacitance according to claim 9, which is characterized in that the conducting particles includes carbon nanotubes, carbon black, graphite
Powder, Al, Al2O3, one kind in Ag, Ni.
12. according to the capacitance any one of claim 1-4, which is characterized in that the metal layer passes through plating, chemistry
Plating, one kind in vacuum evaporation coating and obtain.
13. according to the capacitance any one of claim 1-4, which is characterized in that the high dielectric constant polymer is compound
The thickness of material layer is 8-25 μm.
14. according to the capacitance any one of claim 1-4, which is characterized in that the capacitance is the capacitance of form of film.
15. one kind buries condenser network plate, including：
According to the capacitance any one of claim 1-14；And
The capacitance is embedded to circuit base material therein.
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| CN201720856074.4U CN207382679U (en) | 2017-07-14 | 2017-07-14 | Capacitance and bury condenser network plate |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107231747A (en) * | 2017-07-14 | 2017-10-03 | 武汉光谷创元电子有限公司 | Electric capacity, bury condenser network plate and its manufacture method |
| CN109348649A (en) * | 2018-09-20 | 2019-02-15 | 武汉光谷创元电子有限公司 | Heat sink composite material plating process and its product |
-
2017
- 2017-07-14 CN CN201720856074.4U patent/CN207382679U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107231747A (en) * | 2017-07-14 | 2017-10-03 | 武汉光谷创元电子有限公司 | Electric capacity, bury condenser network plate and its manufacture method |
| CN109348649A (en) * | 2018-09-20 | 2019-02-15 | 武汉光谷创元电子有限公司 | Heat sink composite material plating process and its product |
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