CN207369020U - A kind of radio frequency front end chip - Google Patents
A kind of radio frequency front end chip Download PDFInfo
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- CN207369020U CN207369020U CN201721514693.1U CN201721514693U CN207369020U CN 207369020 U CN207369020 U CN 207369020U CN 201721514693 U CN201721514693 U CN 201721514693U CN 207369020 U CN207369020 U CN 207369020U
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Abstract
The utility model embodiment discloses a kind of radio frequency front end chip.Wherein radio frequency front end chip includes：Variable gain amplifier, indicating circuit, analog demodulator and control circuit；Variable gain amplifier, for input radio frequency signal to be carried out signal amplification, and outgoing carrier signal according to current gain；Indicating circuit, is electrically connected with variable gain amplifier and control circuit respectively, generates indication signal for extracting the first voltage of carrier signal, and according to first voltage and internal reference voltage, and indication signal is sent to control circuit；Analog demodulator, is electrically connected with variable gain amplifier and control circuit；Control circuit, is electrically connected with variable gain amplifier, for generating gain-adjusted signal according to indication signal, and gain-adjusted signal is sent to variable gain amplifier.Improve receiving sensitivity and antijamming capability of the radio frequency front end chip to radiofrequency signal.
Description
Technical field
The utility model embodiment is related to wireless communication technique, more particularly to a kind of radio frequency front end chip.
Background technology
With the continuous development of wireless communication technique, the branch of NFC (Near Field Communication, near-field communication)
The application for the mode of paying is more and more extensive, and NFC front-end chips are integrated in the intelligent terminals such as smart mobile phone, Intelligent bracelet
In so that intelligent terminal has the function of that NFC is paid, and improves the convenience of user's payment.
But when radio frequency front end chip is arranged at intelligent terminal, due in intelligent terminal signal shielding than normal radio frequency
Label is serious, while when the antenna miniaturization problem in terminal causes the current radio frequency front end chip to be integrated in intelligent terminal, spirit
Sensitivity is low, can not meet the demands such as the payment of user.
Utility model content
The utility model provides a kind of radio frequency front end chip, to realize the sensitivity for improving radio frequency front end chip.
In a first aspect, the utility model embodiment provides a kind of radio frequency front end chip, the radio frequency front end chip includes
Variable gain amplifier, indicating circuit, analog demodulator and control circuit：Wherein,
The variable gain amplifier, for input radio frequency signal to be carried out signal amplification according to current gain, and exports
Carrier signal；
The indicating circuit, is electrically connected with the variable gain amplifier and the control circuit, for extracting respectively
State the first voltage of carrier signal, and indication signal is generated according to the first voltage and internal reference voltage, and by the finger
Show that signal is sent to the control circuit；
The analog demodulator, is electrically connected with the variable gain amplifier and the control circuit, described for parsing
Carrier signal, and the analysis instruction of generation is sent to the control circuit；
The control circuit, is electrically connected with the variable gain amplifier, for generating gain according to the indication signal
Regulate signal, and the gain-adjusted signal is sent to the variable gain amplifier, so that the variable gain amplifier
The current gain is adjusted, and signal amplification is carried out to the input radio frequency signal according to the current gain after adjusting, is additionally operable to
When the indication signal meets preset condition, return parameters are generated according to corresponding analysis instruction.
Further, active amplifying circuit is further included；Wherein,
The control circuit is electrically connected with the active amplifying circuit, is additionally operable to generate state control according to the indication signal
Signal processed, receives the clock signal that the active amplifying circuit is sent, and when the indication signal meets preset condition, root
According to return parameters and clock signal generation returned data；
The active amplifying circuit, is electrically connected with the variable gain amplifier, for according to the state control signal
Switch operating state, and to according to the corresponding clock signal of the carrier signal and returned data generation under enabled state
Modulated signal carry out signal amplification, generation output radiofrequency signal, wherein the working status include enabled state and pause shape
State.
Further, the active amplifying circuit includes clock and data recovery module, data simultaneous module and amplifier, its
In,
The clock and data recovery module, is electrically connected with the variable gain amplifier and the control circuit respectively, uses
In receiving the state control signal, according to the state control signal switch operating state, it is additionally operable in the enabled state
The clock signal of the lower extraction carrier signal, when the clock signal is sent to the control circuit, and generates and is described
The homologous amplifier control signal of clock signal；
The control circuit, specifically for generating the returned data according to the clock signal and the return parameters；
The data simultaneous module, is electrically connected with the clock and data recovery module and the control circuit, is used for respectively
The clock signal and the returned data are synchronized, generate the modulated signal；
The amplifier, is electrically connected with the clock and data recovery module and the data simultaneous module respectively, for pair
The modulated signal is amplified, and generates the output radiofrequency signal, and according to the amplifier control signal in the output
Energy dissipation is carried out after radiofrequency signal output.
Further, the radio frequency front end chip further includes privately owned GPIO interface；Wherein,
The privately owned GPIO interface, is connected with the control circuit and external security module respectively, for by the parsing
Instruction is transmitted to external security module, so that the external security module carries out safety verification to the analysis instruction, and by institute
The transmission of feedback information of external security module is stated to the control circuit；
The control circuit, is additionally operable to when the feedback information of the external security module is is proved to be successful, according to correspondence
Analysis instruction generation return parameters, when the feedback information of the external security module is authentication failed, abandon the parsing
Instruction.
Further, the coding mode of the privately owned GPIO interface is the nrz encoding mode with start stop bit.
Further, the privately owned GPIO interface is led to the communications of the external security module using multiplexing
Road, the communication protocol of the privately owned GPIO interface uses the half duplex mode of communication of principal and subordinate's question and answer, wherein the external security mould
Block is the host side of communication, and the radio frequency front end chip is the slave generator terminal of communication.
Further, the Configuration of baud rate of the privately owned GPIO interface communication protocol is preset division, wherein described default
Frequency dividing is less than or equal to 372 frequency dividings, and more than or equal to 7 frequency dividings.
The utility model embodiment will be determined through the amplified carrier signal of variable gain amplifier by indicating circuit
First voltage generates the adjusting indication signal of the adjusting of variable gain amplifier compared with internal reference voltage so that control
Circuit control variable gain amplifier processed controls and adjusts the gain amplifier of variable gain amplifier, realizes to different size of defeated
Enter radiofrequency signal and determine suitable gain amplifier, improve radio frequency front end chip to the receiving sensitivity of radiofrequency signal and anti-interference
Ability.
Brief description of the drawings
Fig. 1 is a kind of structure diagram for radio frequency front end chip that the utility model embodiment one provides；
Fig. 2 is a kind of structure diagram for radio frequency front end chip that the utility model embodiment one provides；
Fig. 3 is the schematic diagram of the coding mode for the privately owned GPIO interface that the utility model embodiment one provides；
Fig. 4 is the radio frequency front end chip and the transmission schematic diagram of external security module that the utility model embodiment one provides；
Fig. 5 is the transmission signal schematic diagram that the utility model embodiment one provides；
Fig. 6 is a kind of flow chart of the processing method for radiofrequency signal that the utility model embodiment two provides.
Embodiment
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model, rather than the restriction to the utility model.Further need exist for
It is bright, for the ease of description, part relevant with the utility model rather than entire infrastructure are illustrate only in attached drawing.
Embodiment one
Fig. 1 be the utility model embodiment one provide a kind of radio frequency front end chip structure diagram, the radio-frequency front-end
Chip can be integrated in the intelligent terminal of smart mobile phone, bracelet or intelligent watch etc., as radio frequency analog label, realized
Safe and reliable NFC (Near Field Communication, near-field communication) payment function.
Referring to Fig. 1, which specifically includes variable gain amplifier 110, indicating circuit 120, analog demodulator
Device 130 and control circuit 140；Wherein,
Variable gain amplifier 110, for input radio frequency signal to be carried out signal amplification according to current gain, and exports load
Ripple signal；
Indicating circuit 120, is electrically connected with variable gain amplifier 110 and control circuit, for extracting carrier signal respectively
First voltage, and indication signal is generated according to first voltage and internal reference voltage, and indication signal is sent to control electricity
Road；
Analog demodulator 130, is electrically connected with variable gain amplifier 110 and control circuit, for parsing carrier signal, and
The analysis instruction of generation is sent to control circuit；
Control circuit 140, is electrically connected with variable gain amplifier 110, for generating gain-adjusted letter according to indication signal
Number, and gain-adjusted signal is sent to variable gain amplifier 110, so that variable gain amplifier 110 adjusts current gain,
And signal amplification is carried out to input radio frequency signal according to the current gain after adjusting, it is additionally operable to meet preset condition in indication signal
When, return parameters are generated according to corresponding analysis instruction.
In the present embodiment, variable gain amplifier 110 has the function of gain-variable, can be according to different gain amplifiers pair
Input radio frequency signal carries out different degrees of signal amplification.Wherein, input radio frequency signal can be received by antenna, exemplary
, input radio frequency signal can be that card reader is launched, and carry the radiofrequency signal of interactive instruction.Wherein, current gain refers to
When being input radio frequency signal input variable gain amplifier 110, the gain that stores in variable gain amplifier 110.
Variable gain amplifier 110 carries out letter when receiving input radio frequency signal, according to current gain to radiofrequency signal
Number amplification, generates carrier signal, which equally carries the interactive instruction of input radio frequency signal.Variable gain amplifier
110 output terminal is connected with the input terminal of indicating circuit 120, and carrier signal is sent to indicating circuit 120, indicating circuit 120
The first voltage of the carrier signal is extracted, wherein first voltage can be the envelope of carrier signal.Optionally, indicating circuit 120
It can be RSSI (Received Signal Strength Indication, received signal strength indicator) indicator.Instruction electricity
The operation principle on road 120 be by the first voltage of carrier signal compared with internal reference voltage, generated according to comparative result
The indication signal of 2bit.Exemplary, if the indication signal that indicating circuit 120 generates is 01 or 10, show carrier signal
In normal condition, it is further known that input radio frequency signal is in normal condition, the current gain of variable gain amplifier 110 without
Need to adjust；If the indication signal that indicating circuit 120 generates is 00, show that carrier signal diminishes, it is further known that input radio frequency
Signal diminishes, and the current gain of variable gain amplifier 110 needs to increase；If the indication signal that indicating circuit 120 generates is 11,
Then show that carrier signal becomes larger, it is further known that input radio frequency signal becomes larger, the current gain of variable gain amplifier 110 needs
Reduce.
Control circuit 140 receives the indication signal that indicating circuit 120 is sent, and generates gain-adjusted letter according to indication signal
Number, send to variable gain amplifier 110, wherein gain-adjusted signal includes gain increase signal, gain reduces signal and increasing
Benefit keeps signal.If gain-adjusted signal increases signal for gain or gain reduces signal, variable gain amplifier 110 is according to increasing
Beneficial Regulate signal adjusts current gain, and amplification is re-started to input radio frequency signal according to the gain after adjusting, and repeats
Step is stated, until indicating circuit 120 generates 01 or 10 indication signal.
In the present embodiment, the gain-adjusted of variable gain amplifier is that iteration performs, to different input radio frequency signals
Determine different gain amplifiers, solve due to input radio frequency signal it is excessive it is either too small caused by can not handle or handle mistake
The problem of difference is big, the radiofrequency signal that can be sent to different distance radio-frequency apparatus carry out reception processing, improve connecing for radiofrequency signal
Sensitivity and antijamming capability are received, while the size requirements of terminal antenna can be reduced.
Wherein, the input terminal of analog demodulator 130 is connected with the input terminal of variable gain amplifier 110, receives variable increasing
The carrier signal that beneficial amplifier 110 is sent, can parse carrier signal, extract the analysis instruction of carrier signal, and should
Analysis instruction is sent to control circuit 140.
Control circuit 140 can be when indication signal meets preset condition, receive the parsing that analog demodulator 130 is sent
Instruction, wherein, the preset condition of indication signal can be for 01 or 10, i.e. gain keeps the corresponding indication signal of signal to meet in advance
If condition.Wherein, return parameters are the response parameters of analysis instruction, exemplary, if analysis instruction instructs for Card Reader, are returned
Parameter is current card data message.
The technical solution of the present embodiment, will be determined through the amplified carrier signal of variable gain amplifier by indicating circuit
First voltage compared with internal reference voltage, generate the adjusting indication signal of variable gain amplifier so that control electricity
Road control variable gain amplifier adjusts the gain amplifier of variable gain amplifier, realizes to different size of input radio frequency signal
Determine suitable gain amplifier, improve receiving sensitivity and antijamming capability of the radio frequency front end chip to radiofrequency signal.
Optionally, which further includes active amplifying circuit 150；Exemplary, referring to Fig. 2, Fig. 2 is this reality
A kind of structure diagram of the radio frequency front end chip provided with new embodiment one.Wherein,
Control circuit 140 is electrically connected with active amplifying circuit 150, is additionally operable to generate state control letter according to indication signal
Number, receive the clock signal that active amplifying circuit is sent, and when indication signal meets preset condition, according to return parameters and
Clock signal generates returned data；
Active amplifying circuit 150, is electrically connected with variable gain amplifier 110, for switching work according to state control signal
Make state, and to being carried out according to the modulated signal of the corresponding clock signal of carrier signal and returned data generation under enabled state
Signal amplifies, and generation output radiofrequency signal, wherein working status includes enabled state and halted state.
In the present embodiment, control circuit 140 generates state control letter while indication signal is received, according to indication signal
Number, which is used for the working status for controlling active amplifying circuit 150.Exemplary, state control signal can be with
It is to be made of logical zero and logical one, such as when state control signal is placed in " 0 ", active amplifying circuit 150 can be at temporarily
Stop state, when state control signal is placed in " 1 ", active amplifying circuit 150 can be at enabled state.Wherein, indication signal is worked as
For 01 or 10 when, can be that state control signal is arranged to " 1 ", when indication signal be 11 or 00 when, can be by state control
Signal processed is arranged to " 0 ".
Active 150 reception state control signal of amplifying circuit, and according to state control signal switch operating state, if being in
Halted state, then do not receive the carrier signal of the transmission of variable gain amplifier 110, if be in enabled state, receive the carrier wave
Signal, and extract the clock signal of the carrier signal.
Control circuit 140 receives the clock signal that active amplifying circuit 150 is sent, and return parameters are loaded in clock signal
On, returned data is generated, wherein returned data is to carry the carrier signal of return parameters.
In the present embodiment, since clock signal enters during control circuit 140 generates returned data, it is necessary to through excessive
Level program, there is delay in the returned data for easily leading to generation, in order to avoid error caused by time delay, by returned data and when
Clock signal synchronizes, modulated signal of the generation with clock signal with frequency.Amplified adjustment signal is determined as exporting radio frequency
Signal.
In the present embodiment, the working status of active amplifying circuit 150 is controlled by state control signal, i.e., only variable
The gain amplifier of gain amplifier can just enter enabled state after the completion of adjusting, and avoid the amplification increasing in variable gain amplifier
The problem of output radiofrequency signal generated during benefit adjusting is gathered by terminal antenna again, causes signal chaotic, reduces nothing
The interference of OFF signal.
Optionally, active amplifying circuit 150 includes clock and data recovery module 151, data simultaneous module 152 and amplifier
153, referring to Fig. 2, wherein,
Clock and data recovery module 151, is electrically connected with variable gain amplifier 110 and control circuit 140, for connecing respectively
State control signal is received, according to state control signal switch operating state, is additionally operable to extract carrier signal under enabled state
Clock signal, clock signal is sent to control circuit, and is generated and the homologous amplifier control signal of clock signal；
Control circuit 140, specifically for generating returned data according to clock signal and return parameters；
Data simultaneous module 152, is electrically connected with clock and data recovery module 151 and control circuit 140 respectively, for pair when
Clock signal and returned data synchronize, and generate modulated signal；
Amplifier 153, is electrically connected with clock and data recovery module 151 and data simultaneous module 152 respectively, for modulation
Signal is amplified, generation output radiofrequency signal, and carries out energy after output radiofrequency signal output according to amplifier control signal
Amount dissipates.
In the present embodiment, clock and data recovery (clock data recovery, CDR) module 151 can recovered carrier signal
Clock signal, since data simultaneous module 152 and amplifier 153 are required to clock signal, when clock data recovery module 151
When placed in a suspend state, data simultaneous module 152 and amplifier 153 are in halted state, control and believe without single state
Number.
Clock and data recovery module 151 is connected with control circuit 140, and clock signal is sent to control circuit 140, and is connect
Receive the returned data that control circuit 140 is fed back.
Data simultaneous module 152 synchronizes clock signal and returned data, eliminates the time delay in returned data,
And cause the modulated signal of generation and the same frequency of clock signal.
In the present embodiment, the clock signal of amplifier control signal and carrier signal is homologous, for being carried out to amplifier 153
Control, when amplifier 153 completes to export emission of radio frequency signals, dissipates remaining energy in amplifier 153, avoids
Rudimental energy influences the transmitting of follow-up output radiofrequency signal.
In the present embodiment, the gain of amplifier 153 can be fixed, and for carrying out signal amplification to modulated signal, make
The output radiofrequency signal that must be generated has higher sensitivity, improves the output sensitivity of radiofrequency signal, while can reduce end
Hold the size requirements of antenna.
Optionally, radio frequency front end chip further includes privately owned GPIO interface 160；Wherein,
Privately owned GPIO (General Purpose Input Output, universal input/output) interface 160, respectively with control
Circuit 140 processed is connected with external security module, for analysis instruction to be transmitted to external security module, so that external security module
Safety verification is carried out to analysis instruction, and by the transmission of feedback information of external security module to control circuit；
Control circuit 140, is additionally operable to when the feedback information of exterior security module is is proved to be successful, according to corresponding parsing
Instruction generation return parameters, when the feedback information of exterior security module is authentication failed, abandon analysis instruction.
In the present embodiment, in order to improve the security of radio frequency front end chip and external device communication, it is necessary to analysis instruction
Safety verification is carried out, wherein, external security module is used to carry out safety verification to analysis instruction, it is arranged at radio frequency front end chip
Outside terminal predeterminated position, communicated with radio frequency front end chip by privately owned GPIO interface.
The analysis instruction that external security module reception control circuit 140 is sent, feedback validation information after verification, wherein,
If feedback information is when being proved to be successful, control circuit 140 performs the operation that return parameters are generated according to analysis instruction, if feedback
Information is authentication failed, then control circuit 140 interrupts the response to input radio frequency signal, abandons the analysis instruction.
In the present embodiment, by the safety verification to analysis instruction, radio frequency front end chip and external device communication are improved
Security.
Optionally, for the NRZ with start stop bit, (Non-Return to Zero, do not return the coding mode of privately owned GPIO interface
Zero) coding mode.
Optionally, the unit of the nrz encoding mode with start stop bit is 8byte.Specifically, the coding staff of privately owned GPIO interface
Formula includes start bit, data bit, parity check bit, stop position and spare bits.Wherein, above-mentioned start bit, data bit, even-odd check
The position of position, stop position and spare bits is determined by interface protocol.Exemplary, referring to Fig. 3, Fig. 3 is the utility model embodiment
The schematic diagram of the coding mode of the one privately owned GPIO interface provided.Wherein, start bit represents to pass by sending logical zero signal
Defeated character starts.Data bit is arranged at after start bit, and using 8 data bit, data are transmitted since minimum data position, i.e., from
Bit0, wherein data bit are positioned based on clock.Parity check bit is arranged at after data bit, including odd parity and even parity check, its
The digit of middle logical one is that even number is even parity check, and the digit of logical one is that odd number is odd parity.Optionally, used in the present embodiment
In even parity check.Stop position is used for the end of tab character data, optionally, using 1 stop position.When spare bits are arranged to logic
When " 1 ", no data transmission on current line is represented.
In the present embodiment, by setting the privately owned GPIO interface with the nrz encoding mode with start stop bit, radio frequency is improved
Front-end chip and the safety and reliability of the data transfer of external security module, the data avoided in data transmission procedure are lost
The problems such as losing or revealing.
Optionally, privately owned GPIO interface with the communications of external security module uses multiplexer channel, privately owned
The communication protocol of GPIO interface uses the half duplex mode of communication of principal and subordinate's question and answer, and wherein external security module is the host of communication
End, radio frequency front end chip are the slave generator terminal of communication.
In the present embodiment, privately owned GPIO interface includes following pin：(Digital Input/Output, digital quantity are defeated by DIO
Enter output port) pin, IRQ (Interrupt Request, interrupt requests) pins and CLK (CLOCK, clock) pin.Respectively
It is used for transmission data-signal, interrupt signal and clock signal.Exemplary, referring to table 1, table 1 is privately owned GPIO interface pin
Definition.
Table 1
In the present embodiment, privately owned GPIO interface uses multiplexer channel with the communications of external security module, number
It is believed that number, interrupt signal and clock signal be transmitted respectively by different transmission channels, improve the reliable of signal transmission
Property.Exemplary, referring to Fig. 4, Fig. 4 is the radio frequency front end chip and external security module that the utility model embodiment one provides
Transmit schematic diagram.
In the present embodiment, using the half duplex mode of communication of principal and subordinate's question and answer, wherein external security module is the host of communication
End, radio frequency front end chip are the slave generator terminal of communication.Wherein, clock signal is always initiated by host side, when host side needs to initiate
During communication, send clock signal and send data from DIO pins, response is carried out by slave；It is logical when needing to initiate from generator terminal
During letter, interrupt request singal is sent by IRQ pins, when host side receives interrupt request singal, passes through CLK pin and DIO
Pin sends inquiry, and response is carried out by slave.
Optionally, the Configuration of baud rate of privately owned GPIO interface communication protocol is preset division, wherein preset division be less than etc.
In 372 frequency dividings, and more than or equal to 7 frequency dividings.
In the present embodiment, preset division refers to the Data flipping number in the range of 1bit, exemplary, referring to Fig. 5, figure
5 be the transmission signal schematic diagram that the utility model embodiment one provides, and the frequency dividing of 1bit is 7 in wherein Fig. 5.Turned over by setting
Turn, multiple data can be gathered in the range of 1bit, multiple data can be carried out with smooth wait and handled to improve transmission data accuracy,
Reduce influence of the data error to transmission quality.
In the present embodiment, the frequency dividing of privately owned GPIO interface communication protocol can be adjusted according to demand, wherein dividing number
Bigger, communication quality is higher, and transmission speed is slower, otherwise frequency dividing number is smaller, and communication quality is lower, and transmission speed gets over block.
Optionally, it is necessary to which explanation, control circuit 140 can also be digital baseband circuit.Digital baseband circuit possesses
The function of automatic SDD (Single device detection, single device detection), can complete the operation of card selection.Band proprietary protocol
GPIO communications data be the SDD stages after activation and ISO_DEP/NFC_DEP data, merchandise sensitivity data
It is in more than the layer, so what is transmitted in the communication of the GPIO with proprietary protocol is encryption data, can prevents side-channel attack, protects
The communication security in the stage is demonstrate,proved.
In the present embodiment, EEPROM (Electrically Erasable of the radio frequency front end chip in 0.18um
Programmable read only memory, band electrically erasable programmable read-write memory) design and stream are completed in technique
Piece.Actual receiving sensitivity reaches the rank of 1mVrms in rf inputs mouth, and output antenna uses the PCB of 1cmx1cm
During (Printed Circuit Board, printed circuit board (PCB)) antenna, the output energy reached is 50 times of traditional passive mode
Left and right.The connection with Infineon SLE97 and STMicw Electronics's ST33 security encryption chips is realized with privately owned instruction GPIO, is realized
Reliable and stable data communication.
Embodiment two
Fig. 6 be the utility model embodiment two provide a kind of radiofrequency signal processing method flow chart, the present embodiment
The situation of radio frequency front end chip processing radiofrequency signal in intelligent terminal is applicable to, this method can be by the utility model embodiment
The radio frequency front end chip of offer performs.Specifically comprise the following steps：
S210, obtain input radio frequency signal, and determines the gain amplifier of input radio frequency signal.
Wherein, corresponding gain amplifier is determined for each input radio frequency signal, wherein the gain amplifier can be
Adjust what is determined by successive ignition.
Optionally, step S210 includes：Signal amplification, generation carrier wave letter carry out input radio frequency signal according to current gain
Number；The first voltage of carrier signal is extracted, compares first voltage and internal reference voltage, and instruction letter is determined according to comparative result
Number；Gain-adjusted signal is generated according to indication signal, and current gain is adjusted according to gain-adjusted signal, determines gain amplifier.
Optionally, gain-adjusted signal includes gain increase signal, gain reduces signal and gain keeps signal, accordingly
, and current gain is adjusted according to gain-adjusted signal, determine gain amplifier, including：If gain-adjusted signal increases for gain
Signal, then gain amplifier for current gain and reference gain and, and redefine indication signal；If gain-adjusted signal is increasing
Benefit reduces signal, then gain amplifier is the difference of current gain and reference gain, and redefines indication signal；If gain-adjusted is believed
Number signal is kept for gain, then stop adjusting to current gain.
Wherein, change in gain amount when reference gain refers to gain-adjusted each time.
In the present embodiment, when detecting that gain-adjusted signal keeps signal for gain, determine that gain-adjusted is completed, and it is right
Carrier signal through definite gain amplifier processing generation carries out subsequent treatment.
S220, carry out input radio frequency signal according to gain amplifier signal amplification, generation carrier signal.
Analysis instruction entrained by S230, the extraction carrier signal, and return parameters are generated according to the analysis instruction.
S240, merge the return parameters and the clock signal of the carrier signal, generation output radiofrequency signal.
Optionally, step S240 includes：The return parameters and the clock signal of the carrier signal are merged, it is raw
Into returned data；The clock signal of the returned data and the carrier signal is synchronized, generates modulated signal；To described
Modulated signal carries out signal amplification, and generation output radiofrequency signal simultaneously exports.
In the present embodiment, signal amplification is carried out to modulated signal so that the output radiofrequency signal of generation has higher spirit
Sensitivity, improves the output sensitivity of radiofrequency signal.
Optionally, before radio frequency output signal is determined according to analysis instruction and is exported, further include：Analysis instruction is based on
Privately owned GPIO interface is transmitted to external security module, carries out safety verification to analysis instruction, and receive the anti-of external security module
Feedforward information；If feedback information generates return parameters to be proved to be successful, according to analysis instruction；If feedback information is authentication failed,
Then abandon analysis instruction.
In the present embodiment, by the safety verification to analysis instruction, radio frequency front end chip and external device communication are improved
Security.
The technical solution of the present embodiment, by adjusting the gain amplifier of input radio frequency signal, realizes to different size of
Input radio frequency signal determines suitable gain amplifier, obtains the analysis instruction of carrier signal, and generates return parameters, joins returning
Number is loaded onto clock signal generation output radiofrequency signal, improves the sensitivity of reception and the transmitting of radiofrequency signal and anti-interference energy
Power.
Note that it above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, can carry out for a person skilled in the art various bright
Aobvious change, readjust and substitute without departing from the scope of protection of the utility model.Therefore, although passing through above example
The utility model is described in further detail, but the utility model is not limited only to above example, is not departing from
In the case that the utility model is conceived, other more equivalent embodiments can also be included, and the scope of the utility model is by appended
Right determine.
Claims (7)
1. a kind of radio frequency front end chip, it is characterised in that including variable gain amplifier, indicating circuit, analog demodulator and control
Circuit processed；Wherein,
The variable gain amplifier, for input radio frequency signal to be carried out signal amplification, and outgoing carrier according to current gain
Signal；
The indicating circuit, is electrically connected with the variable gain amplifier and the control circuit respectively, for extracting the load
The first voltage of ripple signal, and indication signal is generated according to the first voltage and internal reference voltage, and the instruction is believed
Number send to the control circuit；
The analog demodulator, is electrically connected with the variable gain amplifier and the control circuit, for parsing the carrier wave
Signal, and the analysis instruction of generation is sent to the control circuit；
The control circuit, is electrically connected with the variable gain amplifier, for generating gain-adjusted according to the indication signal
Signal, and the gain-adjusted signal is sent to the variable gain amplifier, so that the variable gain amplifier is adjusted
The current gain, and signal amplification is carried out to the input radio frequency signal according to the current gain after adjusting, it is additionally operable in institute
When stating indication signal and meeting preset condition, return parameters are generated according to corresponding analysis instruction.
2. radio frequency front end chip according to claim 1, it is characterised in that further include active amplifying circuit；Wherein,
The control circuit is electrically connected with the active amplifying circuit, is additionally operable to generate state control letter according to the indication signal
Number, the clock signal that the active amplifying circuit is sent is received, and when the indication signal meets preset condition, according to returning
Return parameter and clock signal generation returned data；
The active amplifying circuit, is electrically connected with the variable gain amplifier, for being switched according to the state control signal
Working status, and to the tune according to the corresponding clock signal of the carrier signal and returned data generation under enabled state
Signal processed carries out signal amplification, generation output radiofrequency signal, wherein the working status includes enabled state and halted state.
3. radio frequency front end chip according to claim 2, it is characterised in that the active amplifying circuit includes clock data
Recovery module, data simultaneous module and amplifier, wherein,
The clock and data recovery module, is electrically connected with the variable gain amplifier and the control circuit, for connecing respectively
The state control signal is received, according to the state control signal switch operating state, is additionally operable to carry under the enabled state
The clock signal of the carrier signal is taken, the clock signal is sent to the control circuit, and generates and believes with the clock
Number homologous amplifier control signal；
The control circuit, specifically for generating the returned data according to the clock signal and the return parameters；
The data simultaneous module, is electrically connected with the clock and data recovery module and the control circuit, for institute respectively
State clock signal and the returned data synchronizes, generate the modulated signal；
The amplifier, is electrically connected with the clock and data recovery module and the data simultaneous module, for described respectively
Modulated signal is amplified, and generates the output radiofrequency signal, and according to the amplifier control signal in the output radio frequency
Energy dissipation is carried out after signal output.
4. radio frequency front end chip according to claim 1, it is characterised in that the radio frequency front end chip further includes privately owned
GPIO interface；Wherein,
The privately owned GPIO interface, is connected with the control circuit and external security module respectively, for by the analysis instruction
External security module is transmitted to, so that the external security module carries out the analysis instruction safety verification, and will be described outer
The transmission of feedback information of portion's security module is to the control circuit；
The control circuit, is additionally operable to when the feedback information of the external security module is is proved to be successful, according to corresponding solution
Analysis instruction generation return parameters, when the feedback information of the external security module is authentication failed, abandon the analysis instruction.
5. radio frequency front end chip according to claim 4, it is characterised in that the coding mode of the privately owned GPIO interface is
Nrz encoding mode with start stop bit.
6. radio frequency front end chip according to claim 4, it is characterised in that the privately owned GPIO interface with the outside
The communications of security module use multiplexer channel, and the communication protocol of the privately owned GPIO interface is using the half of principal and subordinate's question and answer
Duplex communication mode, wherein host side of the external security module for communication, the radio frequency front end chip is the slave of communication
End.
7. radio frequency front end chip according to claim 4, it is characterised in that the ripple of the privately owned GPIO interface communication protocol
Special rate is arranged to preset division, wherein the preset division is less than or equal to 372 frequency dividings, and more than or equal to 7 frequency dividings.
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| CN107733457A (en) * | 2017-11-14 | 2018-02-23 | 上海坤锐电子科技有限公司 | A kind of processing method of radio frequency front end chip and radiofrequency signal |
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| CN107733457A (en) * | 2017-11-14 | 2018-02-23 | 上海坤锐电子科技有限公司 | A kind of processing method of radio frequency front end chip and radiofrequency signal |
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