CN207338422U

CN207338422U - A kind of LED chip of positive assembling structure

Info

Publication number: CN207338422U
Application number: CN201721381811.6U
Authority: CN
Inventors: 陈明辉; 吴质朴; 何畏; 陈强
Original assignee: JIANGMEN AOLUNDE PHOTOELECTRIC Co Ltd
Current assignee: JIANGMEN AOLUNDE PHOTOELECTRIC Co Ltd
Priority date: 2017-10-24
Filing date: 2017-10-24
Publication date: 2018-05-08
Anticipated expiration: 2027-10-24

Abstract

The utility model discloses a kind of LED chip of positive assembling structure, the substrate top surface is provided with epitaxial layer, the epitaxial layer includes cushion, N-type GaN layer, multiple quantum well layer and the p-type GaN layer set gradually from the bottom to top, ITO conductive layer is provided with the p-type GaN, conducting metal is provided with ITO conductive layer as P electrode；The epitaxial layer forms low step by etching p-type GaN layer arrival N-type GaN layer, and a raised GaN islands are remained with the low step, N electrode is provided with GaN islands.The utility model is by retaining one on low step raised GaN island, in the case where not increasing electrode feed consumption, avoids N electrode routing and contacts the problem of high step PN junction causes electric leakage；Island height is high as step at the same time, then does electrode on this basis so that P electrode and N electrode can use same technology to prepare, and improve bonding wire efficiency and yield, chip reliability is significantly lifted.

Description

A kind of LED chip of positive assembling structure

Technical field

The present invention relates to a kind of LED chip manufacture technology field, more particularly to a kind of LED chip of positive assembling structure.

Background technology

LED chip is broadly divided into three kinds of structures：Inverted structure, positive assembling structure and vertical stratification, as shown in Figure 1, the LED core The P electrode and N electrode of piece are located on the same side plane of substrate, belong to positive assembling structure.Formal dress structure LED chip is generally with blue precious Masonry is substrate, and grown buffer layer, N-type layer, multiple quantum wells and P-type layer on substrate successively, since N-type layer is by multiple quantum wells Covered with P-type layer, so needing to remove the multiple quantum wells and P-type layer being covered in N-type layer, respectively in the P-type layer and N-type exposed Corresponding P electrode and N electrode are grown on layer, material is thus formed a P-type layer in high step, in the N-type layer of low step. Go out P electrode and N electrode to two Step Growths respectively again, energization forward conduction makes LED shine.

The overall every yield requirement of the chip of charactron is high, is not allow for dead lamp phenomenon absolutely, during its bonding wire, If N electrode solder joint is excessive, the step of chip, i.e. PN junction (Quantum Well) are readily accessed, so as to easily leak electricity；Also or train off To step, can also leak electricity dead lamp.How effectively to solve the problems, such as this, be always the emphasis of chip production.

All the time, the height of electrode is substantially in 1um or so thickness, and shoulder height is generally 1.4um or so, and N electrode is high Degree is less than step, and in the case that precision is inadequate during routing, solder joint easily touches the PN junction on step, and then leak electricity dead lamp.For Solve the problems, such as this, it will usually which the ratio step that electrode is done is high, but the component of electrode is Au, and cost increase is very much, obtains and does not repay Lose.

The content of the invention

To solve the above problems, can be cost-effective and can be to avoid formal dress knot it is an object of the invention to provide one kind Solder joint in structure LED chip N electrode touches step PN sections and LED chip of positive assembling structure of short circuit and preparation method thereof occurs.

Technical solution is used by the present invention solves the problems, such as it：

A kind of LED chip of positive assembling structure, including substrate, the substrate top surface are provided with epitaxial layer, the epitaxial layer Including cushion, N-type GaN layer, multiple quantum well layer and the p-type GaN layer set gradually from the bottom to top, it is provided with the p-type GaN ITO conductive layer, is provided with conducting metal as P electrode on ITO conductive layer；The epitaxial layer is reached by etching p-type GaN layer N-type GaN layer forms low step, and a raised GaN islands are remained with the low step, N electrode is provided with GaN islands.

Further, the narrow lower end in GaN islands upper end is wide, and side is an inclined-plane.

Further, the range of grade on the inclined-plane is 72 ° ± 5 °.

Further, GaN islands are completely covered in the N electrode.

Further, the height of the GaN islands is identical with the upper level of p-type GaN layer.

Further, the upper surface of the N electrode and the upper surface of P electrode maintain an equal level.

The beneficial effects of the invention are as follows：The LED chip and its implementation for a kind of positive assembling structure that the present invention uses, pass through Retain p-type GaN layer and the multiple quantum well layer on low step, obtain a raised GaN island, electrode will be higher by step and be permitted It is more, in the case where not increasing electrode feed consumption, avoid N electrode routing and contact the problem of high step PN junction causes electric leakage；At the same time A GaN island is done in N electrode region, island height is high as step, then does electrode on this basis so that P electrode and N Electrode can use same technology to prepare, and improve bonding wire efficiency and yield, chip reliability is significantly lifted.

Brief description of the drawings

The invention will be further described with example below in conjunction with the accompanying drawings.

Fig. 1 is a kind of top view of the LED chip structure of positive assembling structure of the present invention；

Fig. 2 is a kind of side schematic view of the LED chip structure of positive assembling structure of the present invention；

In figure, 1-N types GaN layer, 2- multiple quantum well layers, 3-P types GaN layer, 4-ITO conductive layers, 5-P electrodes, 6-N electrodes, 7-GaN islands, 8- cushions, 9 substrates.

Embodiment

With reference to Fig. 2, a kind of LED chip of positive assembling structure of the invention,

A kind of LED chip of positive assembling structure, adheres to cushion 8, N-type GaN layer 1, multiple quantum well layer successively in substrate surface 2nd, p-type GaN layer 3 and ITO conductive layer 4, the epitaxial layer form low step, phase by etching the arrival N-type of p-type GaN layer 3 GaN layer 1 The corresponding side not being etched is high step, and conducting metal is provided with the ITO conductive layer 4 of high step as P electrode 5, position Retain a raised GaN islands 7 in the N-type GaN layer 1 on low step, which includes p-type GaN layer 3, more from top to bottom A part for quantum well layer 2 and N-type GaN layer 1, the N electrode 6 of chip are grown on the GaN islands 7 of protrusion.The present invention is different from It is in place of the LED chip of existing positive assembling structure：When ICP etchings are carried out, 3 on the N-type GaN of low step, remain One raised GaN island 7, and N electrode 6 is deposited on GaN islands 7.By raising the position of N electrode 6, avoid in N electricity The problem of high step multiple quantum wells 2 can be touched on pole 6 during routing, improve the stability of LED chip, while small by GaN The mode on island 7 carrys out elevated position, without being realized by directly increasing the N electrode 6 (gold) of costliness, saves LED productions Cost, is conducive to the LED illumination device of clean energy-saving to the popularization in market.

Further, the narrow lower end in 7 upper end of GaN islands is wide, and side is an inclined-plane.It is etching effect there are the reason for inclined-plane There is certain difference on the vertical plane.The gradient of GaN islands 7 is also a necessary presence at the same time, if GaN islands 7 are It is completely vertical, then the luminous efficiency of LED chip will be influenced.

Further, the height of the GaN islands 7 is identical with the upper level of p-type GaN layer 3.Due to GaN islands 7 and height Structure of the step on vertical has only differed one layer of ITO conductive layer 4, thus the two highly can approximation regard identical as.Due to GaN The height of island 7 is identical with the height of step, so it is ensured that will not touch the PN of high step in N electrode 6 during bonding wire again Knot, avoids LED chip leak current fault.

Further, the upper surface of the N electrode and the upper surface of P electrode maintain an equal level.Since 6 height of N electrode and P electrode 5 are high Spend identical, therefore to N electrode 6 and when 5 bonding wire of P electrode, be more convenient to operate compared to structure one high and one low before, together When and bonding wire it is more efficient, and same means bonding wire can be used, ensure that the uniformity and stability of the two bonding wire.

As the optimization of above-described embodiment, 7 range of grade of GaN islands is 72 ° ± 5 °.According to inventor to the present invention Long-time manufacture and study discovery, 7 range of grade of GaN islands is to have best effect for 72 ° ± 5 °.If the gradient Too small when may result in evaporation N electrode 6, N electrode 6 may be attached on PN junction, can also influence shining for LED chip Efficiency.

Further, GaN islands 7 are completely covered in the N electrode.Since the vertical stratification of GaN islands 7 is successively from top to bottom P-type GaN layer 3, multiple quantum well layer 2, lowermost layer are only N-type GaN layer 1, so in order to ensure that LED chip can work normally, The N electrode 6 of LED chip is asked to be completely covered on the growth of 7 surface of GaN islands.Add contact of the N electrode 6 with GaN islands 7 at the same time Area so that the stability of N electrode 6 is more preferable.

It is a kind of production method of the LED chip of positive assembling structure of the present invention below for above-described embodiment.

The first step of the making of LED chip needs to obtain epitaxial layer by epitaxy, is used as and served as a contrast using sapphire in the present embodiment Bottom 9, Sapphire Substrate 9 have the advantages of many：First, the production technology of Sapphire Substrate 9 is ripe, device quality is preferable；Secondly, Sapphire stability is fine, can be used in higher temperature growth processes；Finally, sapphire high mechanical strength, is easily handled And cleaning.Then the epitaxial layer of GaN base material and device is made mainly to be grown in Sapphire Substrate 9.Epitaxy technique mainly uses Chemical vapor deposition (CVD) realizes that the present embodiment is using metal oxide chemical vapor sedimentation most ripe at present (MOCVD) epitaxy technique is realized.A thin layer of cushion is grown in Sapphire Substrate 9 using MOCVD device first (GaN and AlN), for making 9 surface of Sapphire Substrate smooth；Then the N-type GaN of one layer of 4um thickness is grown on the buffer layer Layer 1 provides radiation recombination electronics as active layer；And then one layer of multiple quantum well layer 2 is grown on N-type GaN3 again, its component is Indium gallium compound and GaN, the component by adjusting indium have the function that adjusting wavelength, improve luminous efficiency；Finally in Multiple-quantum Growth P-type GaN layer 3 provides radiation recombination hole as active area in well layer 2.So far, epitaxy technique is completed, and obtains one The epitaxial layer of LED chip.

The second step of the making of LED chip needs to draw domain and makes mask plate, and mask plate is used in first time photoetching (MESA) the preliminary profile of structure of the present invention is provided in.

As shown in Fig. 2, the committed step of the present invention is exactly realized since the 3rd step of the making of LED chip, and this An innovative point and improvement for invention.Cleaned firstly the need of the epi-layer surface for obtaining the first step, it is unnecessary to remove Impurity；Then one layer of ITO conductive layer 4, i.e. tin indium oxide is deposited, ITO has and leads well as nano indium tin metal oxide Electrically and the transparency, therefore also known as transparency conducting layer, harmful electron radiation can be cut off, such as ultraviolet and remote red Outside line.Followed by the mask plate made in second step, first time photoetching is done, is MESA photoetching, litho machine can be by mask plate Shape portray on the surface of epitaxial layer, make 7 figure of Cutting Road and GaN islands.

4th step of the making of LED chip, is etching first, is typically carried out after MESA photoetching processes.Pass through quarter Erosion, after photoetching process, desired figure is stayed on epitaxial wafer, etching is final and most important pattern transfer work Skill.In etching process, the photoresist layer (or mask layer) for having figure will not be subject to source of corrosion significantly to corrode or etch, and can make To shelter film, the part special area on epitaxial wafer is protected, and is not photo-etched the region of glue protection, then by the etching of selectivity Fall.The present embodiment selects ICP etching technics, i.e. inductively coupled plasma (ICP) etches.ICP etchings use side wall passivation skill Art, with etching alternately, anisotropic etching effect is good, and lower in precisely controlling line width can etch high-aspect-ratio shape for deposition Looks.

Then second of photoetching, ITO photoetching are carried out；The purpose of ITO photoetching is in order on the ITO conductive layer 4 of the 3rd step Determine the position of P electrode 5, while all erode the ITO conductive layer 4 of 7 upper surface of GaN islands when doing ITO photoetching.Successively Including whirl coating, front baking, exposure, development, post bake.Then carry out growing layer of silicon dioxide, dioxy on the surface of chip The effect of SiClx is to do an insulation protection to the outer surface of epitaxial layer.

5th step of the making of LED chip, is to carry out third time photoetching first, i.e. PAD photoetching, its effect is in epitaxial layer Silicon dioxide layer on leak out electrode zone.Then electrode is done by plated film, includes evaporation successively, peels off, alloy, institute State to be evaporated to and plate one or more layers metal (gold, nickel, aluminium etc.) in chip surface, be placed under high-temperature vacuum, by molten metal Steam on chip；Described peel off is the gold for removing light-emitting zone；The alloy is the multiple layer metal molecule made during evaporation Between even closer combination, reduce contact resistance.Two electrodes, ITO layer of the P electrode 5 setting in p-type GaN1 are thus obtained On, i.e., on high step；And N electrode 6 is then provided on GaN islands 7, and since GaN islands 7 are p-type successively from top to bottom GaN layer 3, multiple quantum wells 2, then the bottom is only N-type GaN layer 1, so should to be all covered in GaN small for the golden film of N electrode 6 On island 7, electrically conducting between p-type GaN layer 3 and N-type GaN layer 1 so just can guarantee that.Finally pass through the technique such as thinned of annealing again The nude film of a LED chip has just been obtained, the LED chip sold on the market is can be obtained by after encapsulation.

The first step of making for the LED chip of above-described embodiment to the 5th step, the wherein making of LED chip the 3rd First time photoetching (MESA) in step, can increase exposure, make lines thicker in the case of permission, the inclined-plane of such GaN islands 7 The gradient can diminish, the increase of electrode adhesiveness stability；Usually the gradient of island is most suitable scope at 72 ° ± 5 °.Due to The reason for ICP is etched, the high step residing for p-type GaN layer 3 be able to can not also be realized complete vertical there are certain gradient.

The first step of making for the LED chip of above-described embodiment to the 5th step, the wherein making of LED chip the 5th The technique of electrode evaporation in step, the upper surface and the upper surface of P electrode 5 that should control N electrode 6 maintain an equal level, and at least high appearance Rank 1um, ensures bonding wire reliability.It is on high step residing for due to p-type GaN layer 3 to have plated one layer of ITO conductive layer 4 more, so P is electric The height of pole 5 and N electrode 6 has a slight difference, but very little.And ensure at least to be higher by step 1um, so in routing When the bonding wire in N electrode 6 would not be touched to the multiple quantum wells 2 of high step, simultaneously because the height of two electrodes is almost Unanimously, so bonding wire can be convenient to when bonding wire, while the stability and reliability of bonding wire are ensured.

The above, is presently preferred embodiments of the present invention, the invention is not limited in the above embodiment, as long as It reaches the technique effect of the present invention with identical means, should all belong to protection scope of the present invention.

Claims

A kind of 1. LED chip of positive assembling structure, it is characterised in that：Including substrate, the substrate top surface is provided with epitaxial layer, institute State cushion, N-type GaN layer, multiple quantum well layer and p-type GaN layer that epitaxial layer includes setting gradually from the bottom to top, the p-type GaN On be provided with ITO conductive layer, conducting metal is provided with ITO conductive layer as P electrode；The epitaxial layer is by etching p-type GaN layer reaches N-type GaN layer and forms low step, and a raised GaN islands are remained with the low step, are provided with GaN islands N electrode.
A kind of 2. LED chip of positive assembling structure according to claim 1, it is characterised in that：Under the GaN islands upper end is narrow End is wide, and side is an inclined-plane.
A kind of 3. LED chip of positive assembling structure according to claim 2, it is characterised in that：The range of grade on the inclined-plane For 72 ° ± 5 °.
4. according to a kind of LED chip of any positive assembling structures of claim 1-3, it is characterised in that：The N electrode is complete Cover GaN islands.
A kind of 5. LED chip of positive assembling structure according to claim 4, it is characterised in that：The height of the GaN islands with The upper level of p-type GaN layer is identical.
A kind of 6. LED chip of positive assembling structure according to claim 5, it is characterised in that：The upper surface of the N electrode with The upper surface of P electrode maintains an equal level.