CN207249602U

CN207249602U - Reset circuit

Info

Publication number: CN207249602U
Application number: CN201720747382.3U
Authority: CN
Inventors: 潘峰; 徐坤显
Original assignee: Xiamen Shierwo Electronic Technology Co ltd; Guangzhou Shiyuan Electronics Thecnology Co Ltd
Current assignee: Xiamen Shierwo Electronic Technology Co ltd; Guangzhou Shiyuan Electronics Thecnology Co Ltd
Priority date: 2017-06-23
Filing date: 2017-06-23
Publication date: 2018-04-17
Anticipated expiration: 2027-06-23

Abstract

The utility model discloses a reset circuit, which comprises a trigger switch, a reset detection circuit and a reset pulse generation circuit; the trigger switch is provided with a first connecting end, a second connecting end and a switch button; the reset detection circuit is provided with a trigger signal detection end and a reset level output end; the reset pulse generating circuit is provided with a reset level input end and N reset pulse output ends which are used for connecting a device to be reset; the first connecting end of the trigger switch is grounded, and the second connecting end of the trigger switch is connected with the trigger signal detecting end of the reset detecting circuit; the reset level output end of the reset detection circuit is connected with the reset level input end of the reset pulse generation circuit. Adopt the embodiment of the utility model provides a, can make electronic equipment can realize not cutting off the power supply and reset in the course of the work, simplified the operation of outage and power-on to the impact of power-on in-process electric current and voltage has been reduced firmly.

Description

Reset circuit

Technical field

It the utility model is related to electronic technology field, more particularly to a kind of reset circuit.

Background technology

During the use of electronic equipment, the factor such as program error inside the interference of external environment or equipment may Electronic equipment is caused not work normally, at this time, it may be necessary to be resetted to electronic equipment, i.e. allow electronic equipment to return to State.

At present, when electronic device works are abnormal, mostly it is the power supply of direct cut-out equipment, then re-powers equipment, with Electronic equipment is returned to state by this.However, existing scheme is cumbersome, thereby increases and it is possible to causes the time that equipment is restarted to prolong It is long, if things go on like this, because of the impact of electric current and voltage the service life of electronic equipment may be caused to shorten.As can be seen here, it would be highly desirable to one Kind reset circuit enables electronic equipment to realize not power-off restoration during the work time.

Utility model content

The technical problem to be solved by the embodiment of the utility model is, provide a kind of reset circuit so that electronic equipment Not power-off restoration can be realized during the work time, simplifies reset operation, avoid rushing for electric current and voltage in power up Hit.

In order to solve the above-mentioned technical problem, the utility model embodiment proposes a kind of reset circuit, including trigger switch, Reset detection circuit and reset pulse generative circuit；

The trigger switch has the first connecting pin, second connection end and switch button；The reset detection circuit has Trigger signal test side and reset level output terminal；The reset pulse generative circuit has reset level input terminal and N number of use The reset pulse output terminal of reset device is treated in connection；N is positive integer；

The first connecting pin ground connection of the trigger switch, the second connection end connect the triggering of the reset detection circuit Signal detection end；The reset level output terminal of the reset detection circuit connects the reset level of the reset pulse generative circuit Input terminal.

Preferably, the reset detection circuit also has the first power access end and second source incoming end；It is and described multiple Position detection circuit includes pull-up sub-circuit, power supply control sub-circuit and reset level output sub-circuit；

The pull-up sub-circuit has the first power end and the first clamper end；The power supply control sub-circuit has controlled End, second source end and power supply control end；The reset level output sub-circuit has the 3rd power end and level output end；

First power end of the pull-up sub-circuit connects the first power access end of the reset detection circuit, and described the One clamper end is the trigger signal test side of the reset detection circuit, and the first clamper end is also connected with the power supply control The controlled end of sub-circuit；The second source that the second source end of the power supply control sub-circuit connects the reset detection circuit connects Enter end, the power supply control end connects the 3rd power end of the reset level output sub-circuit；Reset level output The level output end of circuit is the reset level output terminal of the reset detection circuit.

Preferably, the power supply control sub-circuit includes first resistor and first switch pipe；

The first end of the first resistor be the power supply control sub-circuit controlled end, the second end of the first resistor Connect the controlled end of the first switch pipe；First connecting pin of the first switch pipe is the of the power supply control sub-circuit Two power ends, the second connection end of the first switch pipe are the power supply control end of the power supply control sub-circuit.

Preferably, the reset level output sub-circuit includes the first capacitance, functional chip and delay unit；

The functional chip has power input, time delayed signal collection terminal and level signal output terminal；The delay is single Member has time delayed signal output and ground；

The power input of the functional chip exports the 3rd power end of sub-circuit, and described for the reset level Three power ends connect the first end of first capacitance, and the time delayed signal collection terminal connects the time delayed signal of the delay unit Output terminal, the level signal output terminal export the level output end of sub-circuit for the reset level；First capacitance Second end is grounded.

Preferably, the delay unit includes the second capacitance and the 3rd capacitance；

The first end of second capacitance be the delay unit time delayed signal output terminal, the second of second capacitance Hold as the ground terminal of the delay unit；3rd capacitance is in parallel with second capacitance.

Preferably, the reset detection circuit also has the 3rd power access end and the 4th power access end；It is and described multiple Position detection circuit includes second resistance, 3rd resistor, the 4th capacitance, the first diode, the second diode and second switch pipe；

The first end of the second resistance connects the 3rd power access end of the reset detection circuit, and second electricity The first end of resistance is also connected with the anode of first diode, and the second end of the second resistance connects second diode The first end of cathode and the 3rd resistor；The trigger signal inspection of the just extremely described reset detection circuit of second diode Survey end, the anode of second diode connects the cathode of first diode, the second end of the 3rd resistor, described the The controlled end of the first end of four capacitances and the second switch pipe；The second end ground connection of 4th capacitance；The second switch First connecting pin of pipe connects the 4th power access end of the reset detection circuit, the second connection end of the second switch pipe For the reset level output terminal.

Preferably, the reset pulse generative circuit determines sub-circuit, pulse-width adjustment sub-circuit and buffer sublayer including level Circuit；

The level determines that sub-circuit includes the second clamper end；The pulse-width adjustment sub-circuit includes level transition detection end With inceptive impulse output terminal；The buffering sub-circuit includes inceptive impulse input terminal and N number of shaped pulse output terminal；

The level determines that the second clamper end of sub-circuit is the reset level input terminal of the reset pulse generative circuit, The second clamper end connects the level transition detection end of the pulse-width adjustment sub-circuit；The pulse-width adjustment sub-circuit it is initial The inceptive impulse input terminal of the pulse output end connection buffering sub-circuit, the shaped pulse output terminal is the reset pulse The reset pulse output terminal of generative circuit.

Preferably, the reset pulse generative circuit also has the 5th power access end, and the level determines sub-circuit also With the 4th power end, the level determines that the 4th power end of sub-circuit is the 5th power supply of the reset pulse generative circuit Incoming end；And the level determines that sub-circuit includes the 4th resistance and the 5th resistance；

The first end of 4th resistance determines the 4th power end of sub-circuit for the level, the of the 4th resistance Two ends determine the second clamper end of sub-circuit for the level, and the second end of the 4th resistance is also connected with the 5th resistance First end；The second end ground connection of 5th resistance.

Preferably, the pulse-width adjustment sub-circuit includes the 5th capacitance and the 6th resistance；

The first end of 5th capacitance be the pulse-width adjustment sub-circuit level transition detection end, the 5th capacitance Second end be the pulse-width adjustment sub-circuit inceptive impulse output terminal, and the second end connection described the of the 5th capacitance The first end of four resistance；The second end ground connection of 4th resistance.

Preferably, the buffering sub-circuit includes N number of buffering branch, and N number of each buffering branch buffered in branch has There are input terminal and output terminal, and inceptive impulse input terminal of the input terminal of N number of buffering branch all with the buffering sub-circuit Connection, the output terminal of N number of buffering branch is respectively N shaped pulse output terminal of the buffering sub-circuit；Wherein, i-th A buffering branch is the positive integer less than or equal to N for the first buffering branch or the second buffering branch, i；

The first buffering branch includes the 7th resistance and the 3rd switching tube；The first end of 7th resistance is used to access DC power signal, the second end of the 7th resistance connect the first connecting pin of the 3rd switching tube；3rd switch The second connection end of pipe is the output terminal of buffering branch, and the controlled end of the 3rd switching tube is the input terminal of buffering branch；

The second buffering branch includes the 8th resistance, the 9th resistance, the 4th switching tube and the 5th switching tube；Described 8th The first end of resistance is used to access DC power signal, and the second end of the 8th resistance connects the first of the 4th switching tube Connecting pin and the controlled end of the 5th switching tube；The second connection end ground connection of 4th switching tube, the 4th switching tube Controlled end for buffering branch input terminal；First connecting pin of the 5th switching tube connects the first of the 9th resistance End, the second connection end of the 5th switching tube are the output terminal of buffering branch；The second end of 9th resistance is used to access DC power signal.

Implement the utility model embodiment, have the advantages that：

The reset circuit that the utility model embodiment provides, is provided with trigger switch, reset detection circuit and reset pulse Generative circuit；Wherein, trigger switch has the first connecting pin, second connection end and switch button；Reset detection circuit, which has, to be touched Signalling test side and reset level output terminal；Reset pulse generative circuit have reset level input terminal and it is N number of be used for connect Treat the reset pulse output terminal of reset device；Also, the first connecting pin ground connection of trigger switch, second connection end connection reset inspection The trigger signal test side of slowdown monitoring circuit；The reset of the reset level output terminal connection reset pulse generative circuit of reset detection circuit Level input.Using the utility model embodiment, enable to electronic equipment to realize during the work time and constantly reply by cable Position, simplifies reset operation, and reduces the impact of electric current and voltage in reseting procedure.

Brief description of the drawings

Fig. 1 is the structure diagram of one embodiment of reset circuit provided by the utility model；

Fig. 2 is the signal waveforms of each endpoint in reset pulse generative circuit provided by the utility model；

Fig. 3 is the circuit diagram of another embodiment of reset circuit provided by the utility model；

Fig. 4 is the circuit diagram of another embodiment of reset circuit provided by the utility model.

Embodiment

The following is a combination of the drawings in the embodiments of the present utility model, and the technical scheme in the embodiment of the utility model is carried out Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are without creative efforts All other embodiments obtained, shall fall within the protection scope of the present invention.

Referring to Fig. 1, it is the structure diagram of one embodiment of reset circuit provided by the utility model.The present embodiment The reset circuit of offer, including trigger switch 10, reset detection circuit 20 and reset pulse generative circuit 30；

The trigger switch 10 has the first connecting pin, second connection end and switch button；The reset detection circuit 20 With trigger signal test side and reset level output terminal；The reset pulse generative circuit 30 have reset level input terminal and It is N number of to be used to connect the reset pulse output terminal (OUT1, OUT2...OUTN) for treating reset device；N is positive integer；

The first connecting pin ground connection of the trigger switch 10, the second connection end connect the reset detection circuit 20 Trigger signal test side；The reset level output terminal of the reset detection circuit 20 connects the reset pulse generative circuit 30 Reset level input terminal.

It should be noted that the reset circuit that the utility model embodiment provides, suitable for various electronic equipments, such as electricity Son shows tablet.When it is implemented, by N number of reset pulse output terminal of reset pulse generative circuit 30 (OUT1, OUT2...OUTN the corresponding connection of reset device) is treated with N number of in electronic equipment, for example, treating that reset device can be electronics Functional chip in equipment, correspondingly, the reset pin for the functional chip that the connection of reset pulse output terminal is needed to reset.

In the utility model embodiment, trigger switch 10 is used for the reset operation for responding user, starts or stops reset The work of circuit, in other words, when user needs to reset electronic equipment, reset state is placed in by trigger switch 10, multiple Position circuit then starts the delay timework resetted, trigger switch 10 is placed in non-reset state, reset circuit is then stopped. Wherein, the type of trigger switch 10 can have multiple choices, such as key switch, rotary switch, soft-touch control, for example, triggering Switch 10 is when be key switch, and when its switch button is pressed, trigger switch 10 is in state over the ground, its first connecting pin with Second connection end connects, and reset circuit is then started to work, conversely, when its switch button is lifted, trigger switch 10 is in non- Reset state, its first connecting pin and second connection end disconnect, and reset circuit is then stopped.

In the utility model embodiment, reset detection circuit 20 is used for the level signal according to its trigger signal test side Reset level signal is exported in its reset level output terminal.Specifically, when trigger switch 10 is in reset state, trigger signal Test side is low level, and reset level output terminal exports reset level signal, i.e. high level signal, on the contrary, working as trigger switch 10 when being in non-reset state, and trigger signal test side is high level, and reset level output terminal is without reset level signal output.Separately Outside, reset detection circuit 20 can be realized using functional chip, can also be realized using resolution element, and the utility model is not made to have Body limits.

In the utility model embodiment, reset pulse generative circuit 30 is used for the level according to its reset level input terminal Situation exports corresponding reseting pulse signal on its corresponding reset pulse output terminal, is connected with realizing with reset pulse output terminal What is connect treats the reset of reset device.Specifically, in reset pulse generative circuit 30, it is under reset level input terminal default conditions Low level, when detecting that reset level input terminal there occurs during saltus step from low level to high level, then resetting arteries and veins accordingly Rush on output terminal and export corresponding reseting pulse signal.

It should be noted that reset pulse generative circuit 30 treats that the reset pulse of reset device is defeated with N number of for connecting Outlet (OUT1, OUT2...OUTN), and N is positive integer, illustrates that the reset circuit that the utility model embodiment provides can be answered only Reset device is treated in position one, can also at the same time reset and multiple treat reset device.Also, treat that the species of reset device is various, it is different Treat that the reseting pulse signal that reset device needs is different, such as partly treat that reset device needs high level pulse signal to realize Reset, partly need low level pulse signal, therefore, N number of reset pulse output terminal (OUT1, OUT2...OUTN) output is answered The type of digit pulse signal treats that reset device determines by what is be attached thereto.In the specific implementation, N number of reset pulse output terminal The type of the reseting pulse signal of (OUT1, OUT2...OUTN) output is not quite similar more, it is understood, however, that root According to actual needs, N number of reset pulse output terminal (OUT1, OUT2...OUTN) can also all export same type of reset arteries and veins Rush signal.

More specifically, by taking intelligent display tablet as an example, in general, there are multiple functional circuit modules in flat-panel systems, also, In use, complete machine is electric constantly all the year.If things go on like this, the factor such as interference of external environment may be to the operation of system Have an impact, so that corresponding functional circuit module operation irregularity in system.Therefore, can be by the utility model embodiment The reset circuit of offer is added into flat-panel systems, when there is operation irregularity in system, then without carrying out power-off restarting to system, And only need to manipulate the trigger switch 10 of reset circuit accordingly, then it can be connected with a key by all with the reset circuit What is connect treats that reset device resets, and in other words, can simply and thoroughly be resetted by a key reset function of the reset circuit flat Plate system.

The operation principle of the utility model embodiment is described below：

When trigger switch 10 is placed in non-reset state, the first connecting pin of trigger switch 10 and second connection end are broken Open, the trigger signal test side of reset detection circuit 20 is high level, then its reset level output terminal is accordingly believed without reset level Number output, the reset level input terminal of reset pulse generative circuit 30 keep low level, then its all reset pulse output terminal All exported without reseting pulse signal, what is be attached thereto treats that reset device maintains original working status；

When trigger switch 10 is placed in reset state, the first connecting pin of trigger switch 10 is connected with second connection end, The trigger signal test side of reset detection circuit 20 is low level, then its reset level output terminal accordingly exports reset level letter Number, i.e., saltus step of the low level to high level occurs for high level signal, the reset level input terminal of reset pulse generative circuit 30, then Its corresponding reset pulse output terminal exports corresponding reseting pulse signal, and what is be attached thereto accordingly treats that reset device is answered Position.

In conclusion the reset circuit that the utility model embodiment provides, is provided with trigger switch 10, reset detection circuit 20 and reset pulse generative circuit 30；Wherein, trigger switch 10 has the first connecting pin, second connection end and switch button；It is multiple Position detection circuit 20 has trigger signal test side and reset level output terminal；Reset pulse generative circuit 30 has reset level Input terminal and N number of reset pulse output terminal (OUT1, OUT2...OUTN) for being used for connection and treating reset device；Also, trigger switch 10 the first connecting pin ground connection, the trigger signal test side of second connection end connection reset detection circuit 20；Reset detection circuit The reset level input terminal of 20 reset level output terminal connection reset pulse generative circuit 30.Implemented using the utility model Example, enables to electronic equipment to realize not power-off restoration during the work time, simplifies reset operation, and reduce and power on During electric current and voltage impact.

Fig. 2 is referred to, is the circuit diagram of another embodiment provided by the utility model.The utility model embodiment On the basis of embodiment illustrated in fig. 1, the structure of partial circuit is further optimized.In addition, it is necessary to explanation, Fig. 2 is only Show with N=2, and two buffering branches are respectively the situation of the first buffering branch and the second buffering branch.

Further, the reset detection circuit 20 also has the first power access end and second source incoming end；And institute Stating reset detection circuit 20 includes pull-up sub-circuit, power supply control sub-circuit and reset level output sub-circuit；

First power end of the pull-up sub-circuit connects the first power access end of the reset detection circuit 20, described First clamper end is the trigger signal test side of the reset detection circuit 20, and the first clamper end is also connected with the power supply Control the controlled end of sub-circuit；The second source end of the power supply control sub-circuit connects the second of the reset detection circuit 20 Power access end, the power supply control end connect the 3rd power end of the reset level output sub-circuit；The reset level The level output end for exporting sub-circuit is the reset level output terminal of the reset detection circuit 20.

In the utility model embodiment, the first power access end is used to access DC power signal, to pull up sub-circuit High level signal is provided.Second source incoming end is also used for access DC power signal, and sub-circuit power supply is exported for reset level. Preferably, both are all connected with the DC power supply 5V_STB of+5V.

In the utility model embodiment, the signal that pull-up sub-circuit is used to input on its first clamper end is non-low electricity It is multiple to ensure when trigger switch 10 is in non-reset state by its first clamper end clamper in high level state during ordinary mail Bit level output terminal is without reset level signal output.Preferably, pull-up sub-circuit includes the first of pull-up resistor, then pull-up resistor Hold to pull up the first power end of sub-circuit, the second end of pull-up resistor is the first clamper end of pull-up sub-circuit.

In the utility model embodiment, power supply control sub-circuit is used to control it according to the electric signal situation of its controlled end Second source end and the connection situation at power supply control end, and then control powering on for the 3rd power end of reset level output sub-circuit Situation.Specifically, when the controlled end of power supply control sub-circuit is low level, the power supply control end of power supply control sub-circuit and second Power end connects, the 3rd power end access DC power signal of reset level output sub-circuit, conversely, when power supply control electricity The controlled end on road is high level, and the power supply control end of power supply control sub-circuit and second source end disconnect, reset level output 3rd power end of circuit does not access the DC power signal.

In the utility model embodiment, reset level output sub-circuit is used for the electrifying condition according to its 3rd power end Export reset level signal.Specifically, when its 3rd power end is accessed without DC power signal, reset level output sub-circuit is not Work, its level output end are exported without reset level signal (high level signal), conversely, when its 3rd power end access direct current During source signal, reset level output sub-circuit normal work, also, its level output end output reset level signal, i.e., high electricity Ordinary mail number.In addition, in reset level exports sub-circuit, whether the 3rd power end, which powers on, is not whether level output end exports again The sole determinant of bit level signal, for example, in other alternative-embodiments, the 3rd power end powers on duration, also may be used To influence level output end output reset level signal.

The operation principle of reset detection circuit 20 in the utility model embodiment is：

When the first clamper end for pulling up sub-circuit inputs non-high level signal, pull-up sub-circuit is steady by its first clamper end It is set to high level state, the second source end of power supply control sub-circuit and power supply control end disconnect, reset level output sub-circuit The 3rd power end without DC power signal access, its level output end is without reset level signal output；

When pull up sub-circuit the first clamper end input low level signal when, the second source end of power supply control sub-circuit and Power supply control end connects, the 3rd power end access DC power signal of reset level output sub-circuit, its level output end is defeated Go out reset level signal, i.e. high level signal.

Further, the power supply control sub-circuit includes first resistor R1 and first switch pipe Q1；

The first end of the first resistor R1 is the controlled end of the power supply control sub-circuit, the of the first resistor R1 Two ends connect the controlled end of the first switch pipe Q1；The first connecting pin of the first switch pipe Q1 is power supply control The second source end of circuit, the second connection end of the first switch pipe Q1 are the power supply control of the power supply control sub-circuit End.

In the utility model embodiment, first switch pipe Q1 can be PNP triode.In addition, first switch pipe Q1 Can be PMOS tube, first resistor R1 is driving resistance, and specifically, the grid of PMOS tube is the controlled end of first switch pipe Q1, The source electrode of PMOS tube is the first connecting pin of first switch pipe Q1, and the drain electrode of PMOS tube connects for the second of first switch pipe Q1 End.Also, when can be overcome using PNP triode using PMOS tube the problem of existing PN junction voltage loss.

Further, the reset level output sub-circuit includes the first capacitance C1, functional chip and delay unit；

The power input of the functional chip exports the 3rd power end of sub-circuit, and described for the reset level Three power ends connect the first end of the first capacitance C1, and the time delayed signal collection terminal connects the delay letter of the delay unit Number output terminal, the level signal output terminal export the level output end of sub-circuit for the reset level；First capacitance The second end ground connection of C1.

In the utility model embodiment, in the electronic device, trigger switch 10 can be the power switch of electronic equipment, When it is implemented, when power switch is by short-press, start or the shut-off function of electronic equipment are realized, when power switch is long pressed When, realize the reset function of electronic equipment, in other words, in the electronic device, machine open/close and reset can share a switch. In the case, need to reset level export sub-circuit in delay unit is set, when functional chip power input after the power is turned on, Delay unit is also needed to export corresponding time delayed signal to the level letter of the time delayed signal collection terminal of functional chip, at this moment functional chip Number output terminal just exports reset level signal, i.e. high level signal, in other words, that is, needs the first connection for meeting trigger switch 10 End is connected with second connection end just exports reset level signal more than this condition of default time span, functional chip.Wherein, Delay unit includes a capacitance, and delay is realized by the discharge and recharge of capacitance.

It should be noted that trigger switch 10 may not be the power switch of electronic equipment, reset switch and power supply are opened Pass is independent of each other, i.e., in addition sets special reset switch in the electronic device.At this time, in reset level output sub-circuit Only include functional chip, without setting delay unit, then the time delayed signal collection terminal of functional chip can be hanging.

In the utility model embodiment, functional chip can be non-programmed logical device, such as general electrification reset Chip.In addition, the first capacitance C1 is filter capacitor.

Further, the delay unit includes the second capacitance C2 and the 3rd capacitance C3；

The first end of the second capacitance C2 is the time delayed signal output terminal of the delay unit, the second capacitance C2's Second end is the ground terminal of the delay unit；The 3rd capacitance C3 is in parallel with the second capacitance C2.

It should be noted that in general, the delay time being actually needed is difficult to select matching with a capacitance, therefore, at this In utility model embodiment, by the way of two capacitances are in parallel, so that the charging interval can preferably match prolonging for actual needs When the time.

Further, the reset pulse generative circuit 30 determines that sub-circuit, pulse-width adjustment sub-circuit ease up including level Punching pin circuit；

The level determines that the second clamper end of sub-circuit inputs for the reset level of the reset pulse generative circuit 30 End, the second clamper end connect the level transition detection end of the pulse-width adjustment sub-circuit；The pulse-width adjustment sub-circuit The inceptive impulse input terminal of the inceptive impulse output terminal connection buffering sub-circuit, the shaped pulse output terminal is the reset The reset pulse output terminal of pulse generation circuit 30.

In the utility model embodiment, level determines that sub-circuit is mainly used for not having high level letter at its second clamper end Number input when, by its second clamper end, clamper is low level state.In addition, when level determines the second clamper end input of sub-circuit Reset level signal when coming from functional chip, level determines that low level can also occur at its second clamper end for sub-circuit to high During the saltus step of level, play the role of aiding in pull-up, i.e. auxiliary improves the driving force of functional chip output high level.

In the utility model embodiment, pulse-width adjustment sub-circuit, which is used to generate, to be used to adjust to be supplied to treat reset device The inceptive impulse signal of the width of reseting pulse signal.Specifically, when the level transition detection end of pulse-width adjustment sub-circuit is detected To low level to during the saltus step of high level, the approximate pulse signal of inceptive impulse output terminal output of pulse-width adjustment sub-circuit is that is, first Initial pulse signal.

It should be noted that in general, the current driving ability of the inceptive impulse signal of pulse-width adjustment sub-circuit output compares Weak, which is only capable of meeting some detecting that what very weak voltage-reset signal just can realize reset treats restorer Part, therefore, if using the inceptive impulse signal as reseting pulse signal, is supplied directly to treat reset device, reset circuit can It is not high by property.Therefore, in the utility model embodiment, buffering sub-circuit is also set up, buffering sub-circuit is used for pulse-width adjustment The inceptive impulse signal enhancing driving of sub-circuit output and shaping is carried out, it is strong with output driving ability, and waveform standard is answered Digit pulse signal.

In addition, referring to Fig. 3, Fig. 3 is shown on the second clamper end, inceptive impulse output terminal and shaped pulse output terminal The comparison of wave shape of signal.

Further, the reset pulse generative circuit 30 also has the 5th power access end, and the level determines sub- electricity Road also has the 4th power end, and the level determines the 4th power end of sub-circuit for the of the reset pulse generative circuit 30 Five power access ends；And the level determines that sub-circuit includes the 4th resistance R4 and the 5th resistance R5；

The first end of the 4th resistance R4 determines the 4th power end of sub-circuit, the 4th resistance R4 for the level Second end determine the second clamper end of sub-circuit for the level, and the second end of the 4th resistance R4 be also connected with it is described The first end of 5th resistance R5；The second end ground connection of the 5th resistance R5.

In the utility model embodiment, the 5th power access end is used to access DC power signal, and son is determined for level Circuit provides high level signal, it is preferable that the DC power supply 5V_STB of the 5th power access end connection+5V.

In the utility model embodiment, the reset for treating reset device is realized, then need level to determine the of sub-circuit Saltus step from low level to high level occurs for two clamper ends, it is seen then that and the second clamper end is necessary for low level when not acting, because This, the 5th resistance R5 is pull down resistor, is mainly used for making the second clamper end stabilize to low level when not acting.In addition, the Four resistance R4 are pull-up resistor, are mainly used for playing the role of when the second clamper end saltus step is high level the pull-up of auxiliary, and auxiliary Help the driving force for improving functional chip output high level.Preferably, the resistance value of the 4th resistance R4 needs to be much larger than the 5th resistance The resistance value of R5, to ensure that the 4th resistance R4 does not influence the pull-down state of the 5th resistance R5.As it can be seen that the 4th resistance R4 and the 5th is set Resistance R5 can effectively ensure that the stability of reset circuit.

Further, the pulse-width adjustment sub-circuit includes the 5th capacitance C5 and the 6th resistance R6；

The first end of the 5th capacitance C5 is the level transition detection end of the pulse-width adjustment sub-circuit, the 5th electricity The second end for holding C5 is the inceptive impulse output terminal of the pulse-width adjustment sub-circuit, and the second end of the 5th capacitance C5 connects The first end of the 4th resistance R4；The second end ground connection of the 4th resistance R4.

In the utility model embodiment, treated by the 5th capacitance C5 and the 6th resistance R6 to generate to be supplied to for adjustment The inceptive impulse signal of the width of the reseting pulse signal of reset device.Specifically, the second clamper of sub-circuit is determined in level When holding input high level signal, the 5th capacitance C5 momentary charges, intercept this hopping edge from low level to high level, then pass through 6th resistance R6 discharges, then can obtain an approximate pulse signal, i.e. inceptive impulse signal.

Further, the buffering sub-circuit includes N number of buffering branch, N number of each buffering branch buffered in branch With input terminal and output terminal, and inceptive impulse of the input terminal of N number of buffering branch all with the buffering sub-circuit inputs End connection, the output terminal of N number of buffering branch is respectively N number of shaped pulse output terminal of the buffering sub-circuit；Wherein, I buffering branch is the positive integer less than or equal to N for the first buffering branch or the second buffering branch, i；

The first buffering branch includes the 7th resistance R7 and the 3rd switching tube Q3；The first end of the 7th resistance R7 For accessing DC power signal, the second end of the 7th resistance R7 connects the first connecting pin of the 3rd switching tube Q3； The second connection end of the 3rd switching tube Q3 is the output terminal of buffering branch, and the controlled end of the 3rd switching tube Q3 is buffering The input terminal of branch；

The second buffering branch includes the 8th resistance R8, the 9th resistance R9, the 4th switching tube Q4 and the 5th switching tube Q5； The first end of the 8th resistance R8 is used to access DC power signal, the second end connection of the 8th resistance R8 described the The first connecting pin of four switching tube Q4 and the controlled end of the 5th switching tube Q5；The second connection end of the 4th switching tube Q4 Ground connection, the controlled end of the 4th switching tube Q4 are the input terminal of buffering branch；The first connecting pin of the 5th switching tube Q5 The first end of the 9th resistance R9 is connected, the second connection end of the 5th switching tube Q5 is the output terminal of buffering branch；Institute The second end for stating the 9th resistance R9 is used to access DC power signal.

In the utility model embodiment, buffering sub-circuit includes N number of buffering branch, as described above, treats reset device Species it is various, the type of the different reseting pulse signals treated reset device and needed is different, such as some treats that reset device needs Want high level pulse signal, some need low level pulse signal.It is understood that to generate different types of reset pulse Signal, the then structure for buffering branch are also required to corresponding difference.

In the utility model embodiment, for the first buffering branch, the 3rd switching tube Q3 can select NMOS tube, have Body, when the grid of the 3rd switching tube Q3 obtains high pulse signal, the 3rd switching tube Q3 conductings, the of the 3rd switching tube Q3 Two connecting pins export low pulse signal, i.e. low level reset signal, in addition, passing through the public of the 5th capacitance C5 and the 6th resistance R6 Approximate pulse signal at node controls the time of the turn-on and turn-off of the 3rd switching tube Q3, then can obtain target requirement width Corresponding reseting pulse signal.

In the utility model embodiment, for the second buffering branch, the 4th switching tube Q4 can select NMOS tube, the Five switching tube Q5 can select PMOS tube, specifically, when the grid of the 4th switching tube Q4 obtains high pulse signal, the 4th switching tube Q4 is turned on, and the grid of the 5th switching tube Q5 obtains low pulse signal, and the 5th switching tube Q5 conductings, the second of the 5th switching tube Q5 connects End output high pulse signal, i.e. high level reset signal are connect, similarly, passes through the common node of the 5th capacitance C5 and the 6th resistance R6 The approximate pulse signal at place controls the time of the turn-on and turn-off of the 4th switching tube Q4, then can obtain the phase of target requirement width Answer reseting pulse signal.Further it will be understood that the second buffering branch is on the basis of the first buffering branch, add 4th switching tube Q4 and the 8th resistance R8, it is reverse as level-one level.

It should be noted that the approximate pulse signal control at the common node for passing through the 5th capacitance C5 and the 6th resistance R6 The time of the turn-on and turn-off of the switching tube (such as the 3rd switching tube Q3 and the 4th switching tube Q4) of rear class connection, so as to obtain target The corresponding reseting pulse signal of demand width, specifically, the 5th capacitance C5 is used for DC isolation, but for the saltus step of level, energy Of short duration skip signal coupling is played, then produces the positive spike arteries and veins of a saltus step in the grid for the switching tube being attached thereto Punching, by adjusting the parameter of the 5th capacitance C5 and the 6th resistance R6, then can adjust the width of this spike, and then obtain The corresponding reseting pulse signal of target requirement width.

It should also be noted that, if N number of buffer in branch, while buffers branch and second there are first and buffers branch, then When needing high level reset signal, the value of the 7th resistance R7 somewhat takes small, can obtain the stronger reset pulse of driving force Signal；When needing low level reset signal, the value of the 9th resistance R9 is larger with respect to taking, and it is stronger to obtain driving force Reseting pulse signal.

In addition, in the utility model embodiment, buffer each buffering branch in sub-circuit and not only acted as enhancing again The output driving ability of position signal, also plays good buffer action, some special to the reset signal of each mini system In the case of, such as when needing to carry out some functional chip software upgrading and the one of reset signal of independent control, then will not Other reset circuits are influenced, efficiently avoid the mistake homing action of generation system in escalation process.

It should be noted that in sub-circuit is buffered, switching tube selects metal-oxide-semiconductor, helps to subtract using voltage triggered driving The distortion of small-signal, while can also obtain in rear end the reset output signal of strong driving force.Also, since metal-oxide-semiconductor has very High input impedance, can guarantee that when needing multiple reseting pulse signals, can multiple buffering branches in parallel.

It should be noted that the structure of N number of buffering branch of buffering sub-circuit treats that reset device determines by what is be attached thereto, If what is be attached thereto treats that reset device needs low level reset signal, the corresponding branch that buffers selects the first buffering branch, instead It, if what is be attached thereto treats that reset device needs low level reset signal, the corresponding branch that buffers selects the second buffering branch. Also, according to the actual requirements, the structure of N number of buffering branch can be all identical, that is, is all the first buffering branch, or be all second Branch is buffered, can also be not quite similar, i.e., part is the first buffering branch, is partly the second buffering branch, does not make herein specific Limit.

Fig. 4 is referred to, is the circuit diagram of another embodiment provided by the utility model.In addition, it is necessary to explanation It is that Fig. 4 illustrate only with N=2, and two buffering branches are respectively the situation of the first buffering branch and the second buffering branch. Difference lies in the structure of reset detection circuit 20 to differ for the utility model embodiment and embodiment illustrated in fig. 2, specific as follows：

In the utility model embodiment, the reset detection circuit 20 also has the 3rd power access end and the 4th power supply Incoming end；And the reset detection circuit 20 include second resistance R2,3rd resistor R3, the 4th capacitance C4, the first diode D1, Second diode D2 and second switch pipe Q2；

The first end of the second resistance R2 connects the 3rd power access end of the reset detection circuit 20, and described the The first end of two resistance R2 is also connected with the anode of the first diode D1, described in the second end connection of the second resistance R2 The first end of the cathode of second diode D2 and the 3rd resistor R3；The just extremely described of the second diode D2 resets inspection The trigger signal test side of slowdown monitoring circuit 20, the anode of the second diode D2 connect the cathode of the first diode D1, institute State the controlled end of the second end of 3rd resistor R3, the first end of the 4th capacitance C4 and the second switch pipe Q2；Described The second end ground connection of four capacitance C4；The first connecting pin of the second switch pipe Q2 connects the of the reset detection circuit 20 Four power access ends, the second connection end of the second switch pipe Q2 is the reset level output terminal.

It should be noted that using the implementation of functional chip compared to embodiment illustrated in fig. 2, the utility model is implemented Example realizes the output control function of reset level signal using resolution element.Second resistance R2 is pull-up resistor, 3rd resistor R3 For discharge resistance, the 4th capacitance C4 is charging capacitor, and the first diode D1 and the second diode D2 are charge and discharge electric diode, the Two switching tube Q2 can select PMOS tube.

The operation principle of reset detection circuit 20 that the utility model embodiment provides is：

When second resistance R2,3rd resistor R3, the first diode D1 common node at input non-low level signal when, the Its second end is stabilized to high level state by two resistance R2, and the level of the 4th capacitance C4 is charged to more than 5V, second switch pipe Q2 is turned off, and the second connection end of second switch pipe Q2 is without reset level signal output；When second resistance R2,3rd resistor R3, At the common node of one diode D1 during input low level signal, the second end of second resistance R2 is low level state, and the 4th is electric Hold C4 to discharge by 3rd resistor R3, after discharge off, the controlled end of second switch pipe Q2 is close to zero level, second switch pipe Q2 is turned on, the second connection end output reset level signal of second switch pipe Q2, i.e. high level signal.

The reset circuit that the utility model embodiment provides, is provided with trigger switch, reset detection circuit and reset pulse Generative circuit；Wherein, trigger switch has the first connecting pin, second connection end and switch button；Reset detection circuit, which has, to be touched Signalling test side and reset level output terminal；Reset pulse generative circuit have reset level input terminal and it is N number of be used for connect Treat the reset pulse output terminal of reset device；Also, the first connecting pin ground connection of trigger switch, second connection end connection reset inspection The trigger signal test side of slowdown monitoring circuit；The reset of the reset level output terminal connection reset pulse generative circuit of reset detection circuit Level input.Using the utility model embodiment, enable to electronic equipment to realize during the work time and constantly reply by cable Position.

The above is the preferred embodiment of the utility model, it is noted that for the ordinary skill of the art For personnel, on the premise of the utility model principle is not departed from, some improvement and deformation can also be made, these improve and become Shape is also considered as the scope of protection of the utility model.

Claims

1. a kind of reset circuit, it is characterised in that including trigger switch, reset detection circuit and reset pulse generative circuit；Institute Stating trigger switch has the first connecting pin, second connection end and switch button；The reset detection circuit is examined with trigger signal Survey end and reset level output terminal；The reset pulse generative circuit have reset level input terminal and it is N number of be used to connect treat it is multiple The reset pulse output terminal of position device；N is positive integer；

The first connecting pin ground connection of the trigger switch, the second connection end connect the trigger signal of the reset detection circuit Test side；The reset level output terminal of the reset detection circuit connects the reset level input of the reset pulse generative circuit End.

2. reset circuit as claimed in claim 1, it is characterised in that the reset detection circuit also has the first plant-grid connection End and second source incoming end；And the reset detection circuit includes pull-up sub-circuit, power supply control sub-circuit and reset level Export sub-circuit；

The pull-up sub-circuit has the first power end and the first clamper end；The power supply control sub-circuit has controlled end, the Two power ends and power supply control end；The reset level output sub-circuit has the 3rd power end and level output end；

First power end of the pull-up sub-circuit connects the first power access end of the reset detection circuit, first pincers Position end is the trigger signal test side of the reset detection circuit, and the first clamper end is also connected with the power supply control electricity The controlled end on road；The second source end of the power supply control sub-circuit connects the second source access of the reset detection circuit End, the power supply control end connect the 3rd power end of the reset level output sub-circuit；The reset level output son electricity The level output end on road is the reset level output terminal of the reset detection circuit.

3. reset circuit as claimed in claim 2, it is characterised in that the power supply control sub-circuit includes first resistor and the One switching tube；The first end of the first resistor be the power supply control sub-circuit controlled end, the second of the first resistor End connects the controlled end of the first switch pipe；First connecting pin of the first switch pipe is the power supply control sub-circuit Second source end, the second connection end of the first switch pipe are the power supply control end of the power supply control sub-circuit.

4. reset circuit as claimed in claim 3, it is characterised in that the reset level output sub-circuit includes the first electricity Appearance, functional chip and delay unit；The functional chip has power input, time delayed signal collection terminal and level signal output End；The delay unit has time delayed signal output and ground；

The power input of the functional chip exports the 3rd power end of sub-circuit, and the 3rd electricity for the reset level Source connects the first end of first capacitance, and the time delayed signal collection terminal connects the time delayed signal output of the delay unit End, the level signal output terminal export the level output end of sub-circuit for the reset level；The second of first capacitance End ground connection.

5. reset circuit as claimed in claim 4, it is characterised in that the delay unit includes the second capacitance and the 3rd electricity Hold；The first end of second capacitance is the time delayed signal output terminal of the delay unit, and the second end of second capacitance is The ground terminal of the delay unit；3rd capacitance is in parallel with second capacitance.

6. reset circuit as claimed in claim 1, it is characterised in that the reset detection circuit also has the 3rd plant-grid connection End and the 4th power access end；And the reset detection circuit includes second resistance, 3rd resistor, the 4th capacitance, the one or two pole Pipe, the second diode and second switch pipe；The first end of the second resistance connects the 3rd power supply of the reset detection circuit Incoming end, and the first end of the second resistance is also connected with the anode of first diode, the second end of the second resistance Connect the cathode of second diode and the first end of the 3rd resistor；The just extremely described reset of second diode The trigger signal test side of detection circuit, the anode of second diode connect the cathode of first diode, described the The controlled end of the second end of three resistance, the first end of the 4th capacitance and the second switch pipe；The of 4th capacitance Two ends are grounded；First connecting pin of the second switch pipe connects the 4th power access end of the reset detection circuit, described The second connection end of second switch pipe is the reset level output terminal.

7. such as claim 1 to 6 any one of them reset circuit, it is characterised in that the reset pulse generative circuit includes Level determines sub-circuit, pulse-width adjustment sub-circuit and buffer sublayer circuit；The level determines that sub-circuit includes the second clamper end；Institute Stating pulse-width adjustment sub-circuit includes level transition detection end and inceptive impulse output terminal；The buffering sub-circuit includes inceptive impulse Input terminal and N number of shaped pulse output terminal；The level determines that the second clamper end of sub-circuit is reset pulse generation electricity The reset level input terminal on road, the second clamper end connect the level transition detection end of the pulse-width adjustment sub-circuit；It is described The inceptive impulse input terminal of the inceptive impulse output terminal connection buffering sub-circuit of pulse-width adjustment sub-circuit, the shaped pulse Output terminal is the reset pulse output terminal of the reset pulse generative circuit.

8. reset circuit as claimed in claim 7, it is characterised in that the reset pulse generative circuit also has the 5th power supply Incoming end, the level determine that sub-circuit also has the 4th power end, and the level determines that the 4th power end of sub-circuit is institute State the 5th power access end of reset pulse generative circuit；And the level determines that sub-circuit includes the 4th resistance and the 5th electricity Resistance；The first end of 4th resistance determines the 4th power end of sub-circuit, the second end of the 4th resistance for the level The second clamper end of sub-circuit is determined for the level, and the second end of the 4th resistance is also connected with the of the 5th resistance One end；The second end ground connection of 5th resistance.

9. reset circuit as claimed in claim 8, it is characterised in that the pulse-width adjustment sub-circuit includes the 5th capacitance and the Six resistance；The first end of 5th capacitance be the pulse-width adjustment sub-circuit level transition detection end, the 5th capacitance Second end be the pulse-width adjustment sub-circuit inceptive impulse output terminal, and the second end connection described the of the 5th capacitance The first end of four resistance；The second end ground connection of 4th resistance.

10. reset circuit as claimed in claim 7, it is characterised in that the buffering sub-circuit includes N number of buffering branch, N number of Each buffering branch in buffering branch has input terminal and an output terminal, and N number of input terminal for buffering branch all with institute The inceptive impulse input terminal connection of buffering sub-circuit is stated, the output terminal of N number of buffering branch is respectively the buffering sub-circuit N number of shaped pulse output terminal；Wherein, i-th of buffering branch is the first buffering branch or the second buffering branch, i to be less than or Positive integer equal to N；The first buffering branch includes the 7th resistance and the 3rd switching tube；The first end of 7th resistance is used In access DC power signal, the second end of the 7th resistance connects the first connecting pin of the 3rd switching tube；Described The second connection end of three switching tubes is the output terminal of buffering branch, and the controlled end of the 3rd switching tube is the input of buffering branch End；The second buffering branch includes the 8th resistance, the 9th resistance, the 4th switching tube and the 5th switching tube；8th resistance First end be used to access DC power signal, the second end of the 8th resistance connects the first connection of the 4th switching tube End and the controlled end of the 5th switching tube；4th switching tube second connection end ground connection, the 4th switching tube by Control input terminal of the end for buffering branch；First connecting pin of the 5th switching tube connects the first end of the 9th resistance, institute The second connection end for stating the 5th switching tube is the output terminal of buffering branch；The second end of 9th resistance is used to access direct current Source signal.