CN204290917U - Hard triggering boot-strap circuit and electronic equipment - Google Patents
Hard triggering boot-strap circuit and electronic equipment Download PDFInfo
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- CN204290917U CN204290917U CN201420815934.6U CN201420815934U CN204290917U CN 204290917 U CN204290917 U CN 204290917U CN 201420815934 U CN201420815934 U CN 201420815934U CN 204290917 U CN204290917 U CN 204290917U
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Abstract
The utility model discloses one and firmly trigger boot-strap circuit, comprise power input, potentiometer, edging trigger module, trigger control module, time delay module, mains switch control module and power output end; Trigger control module controls the trigger state of edging trigger module according to the state of potentiometer, to export by edging trigger module the break-make that control signal controls mains switch control module, whether export from power output end with the supply power voltage being controlled power input input by mains switch control module; Time delay module, when potentiometer is originally in power input input supply power voltage under open state, carries out time delay to the supply power voltage of the RESET input that will be input to edging trigger module, edging trigger module is not triggered.The invention also discloses a kind of electronic equipment, comprise above-mentioned hard triggering boot-strap circuit.The utility model can realize electronic equipment and just start shooting under the hard triggering situation of potentiometer, avoids electronic equipment to damage owing to powering on suddenly.
Description
Technical field
The utility model relates to electronic circuit technology field, particularly relates to a kind of hard triggering boot-strap circuit and electronic equipment.
Background technology
Most electronic equipment is all utilize potentiometer as start/shut down switch, and when potentiometer is in open state, when namely potentiometer closes, electronic equipment is just in open state, and when potentiometer is in off status, when namely potentiometer disconnects, electronic equipment is just in off-mode.The existing potentiometer that utilizes is as the electronic equipment of start/shut down switch, if when electronic equipment power-off (as cut off the electricity supply, pull out battery), potentiometer is in open state, then when electronic equipment is energized (as switch on power or plug battery) again, electronic equipment is started shooting immediately, now easily causes electronic equipment to damage because system powers on suddenly.
Utility model content
Main purpose of the present utility model is to provide a kind of hard triggering boot-strap circuit and electronic equipment, is intended to realize electronic equipment and just starts shooting under the hard triggering situation of potentiometer, avoid electronic equipment to damage owing to powering on suddenly.
In order to achieve the above object, the utility model provides one firmly to trigger boot-strap circuit, described hard triggering boot-strap circuit comprises power input, power output end, potentiometer, mains switch control module, for controlling the edging trigger module of the break-make of described mains switch control module, for controlling the trigger control module of the trigger state of described edging trigger module according to the state of described potentiometer, and during for being originally in described power input input supply power voltage under open state at described potentiometer, time delay is carried out to the supply power voltage of the RESET input that will be input to described edging trigger module, make the time delay module that described edging trigger module does not trigger,
Described power input is connected with described power output end by described mains switch control module; The RESET input of described edging trigger module is connected with described power input by described time delay module; The control end of trigger control module is connected with power input by potentiometer, and the energization input of trigger control module is connected with power input, and the output of trigger control module is connected with the RESET input of edging trigger module; The operating voltage input of edging trigger module is all connected with power input with the data input pin of edging trigger module, the input end of clock of edging trigger module is connected with power input by potentiometer, and the output of edging trigger module is connected with the control end of mains switch control module.
Preferably, described potentiometer comprises a control switch, and the first end of described control switch is connected with described power input, and the second end of described control switch is connected with the input end of clock of described edging trigger module.
Preferably, described edging trigger module comprises d type flip flop, the first resistance and the second resistance, the energization pins of described d type flip flop is connected with described power input, the ground pin ground connection of described d type flip flop, the data-out pin of described d type flip flop is connected with described power input via described first resistance, the clock input pin of described d type flip flop is connected with the second end of described control switch via described second resistance, the master reset input pin of described d type flip flop is connected with the output of described trigger control module, and be connected with the output of described time delay module, the triggering output pin of described d type flip flop is connected with the control end of described mains switch control module.
Preferably, described trigger control module comprises the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance and the first electric capacity; The grid of described first metal-oxide-semiconductor is via described 3rd grounding through resistance, and be connected with the second end of described control switch via described 4th resistance, the source ground of described first metal-oxide-semiconductor, the drain electrode of described first metal-oxide-semiconductor is connected with the grid of the second metal-oxide-semiconductor via described first electric capacity; The grid of described second metal-oxide-semiconductor is connected with described power input via described first electric capacity, described 6th resistance, and via described 5th grounding through resistance, the source ground of described second metal-oxide-semiconductor, the drain electrode of described second metal-oxide-semiconductor is connected with the RESET input of described edging trigger module.
Preferably, described time delay module comprises the 7th resistance and the second electric capacity; One end of described 7th resistance is connected with described power input, and the other end of described 7th resistance is via described second capacity earth; Described 7th resistance is connected with the RESET input of described edging trigger module with the common port of described second electric capacity.
Preferably, described time delay module also comprises electrostatic protection device, one end of described electrostatic protection device is connected with the common port of described 7th resistance and described second electric capacity, and is connected with the RESET input of described edging trigger module, the other end ground connection of described electrostatic protection device.
Preferably, described mains switch control module comprises the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor and the 8th resistance; The grid of described 3rd metal-oxide-semiconductor is connected with the output of described edging trigger module via described 8th resistance, the source ground of described 3rd metal-oxide-semiconductor, the drain electrode of described 3rd metal-oxide-semiconductor is connected with the grid of described 4th metal-oxide-semiconductor, the source electrode of described 4th metal-oxide-semiconductor is connected with described power input, and the drain electrode of described 4th metal-oxide-semiconductor is connected with described power output end.
Preferably, the described hard triggering boot-strap circuit supply power voltage also comprised for inputting described power input carries out the Voltage stabilizing module of voltage stabilizing, the input of described Voltage stabilizing module is connected with described power input, the output of described Voltage stabilizing module is connected with the operating voltage input of described edging trigger module and data input pin respectively, and is connected with the input of described time delay module.
Preferably, described Voltage stabilizing module comprises linear voltage regulator, the 3rd electric capacity and the 4th electric capacity; One end of described 3rd electric capacity is connected with described power input, the other end ground connection of described 3rd electric capacity; The energization pins of described linear voltage regulator is connected with described power input, the enable pin of described linear voltage regulator is connected with described power input, the grounding pin ground connection of described linear voltage regulator, the output pin of described linear voltage regulator is connected with the operating voltage input of described edging trigger module and data input pin respectively, and is connected with the input of described time delay module; One end of described 4th electric capacity is connected with the output pin of described linear voltage regulator, the other end ground connection of described 4th electric capacity.
In addition, in order to achieve the above object, the utility model also provides a kind of electronic equipment, described electronic equipment comprises and firmly triggers boot-strap circuit, described hard triggering boot-strap circuit comprises power input, power output end, potentiometer, mains switch control module, for controlling the edging trigger module of the break-make of described mains switch control module, for controlling the trigger control module of the trigger state of described edging trigger module according to the state of described potentiometer, and during for being originally in described power input input supply power voltage under open state at described potentiometer, time delay is carried out to the supply power voltage of the RESET input that will be input to described edging trigger module, make the time delay module that described edging trigger module does not trigger,
Described power input is connected with described power output end by described mains switch control module; The RESET input of described edging trigger module is connected with described power input by described time delay module; The control end of trigger control module is connected with power input by potentiometer, and the energization input of trigger control module is connected with power input, and the output of trigger control module is connected with the RESET input of edging trigger module; The operating voltage input of edging trigger module is all connected with power input with the data input pin of edging trigger module, the input end of clock of edging trigger module is connected with power input by potentiometer, and the output of edging trigger module is connected with the control end of mains switch control module.
The hard triggering boot-strap circuit that the utility model provides and electronic equipment, by time delay module when potentiometer is originally in power input input supply power voltage under open state, time delay is carried out to the supply power voltage of the RESET input that will be input to edging trigger module, edging trigger module is not triggered, thus control the shutoff of mains switch control module, the supply power voltage that power input is inputted can not export from power output end, thus make under potentiometer is in open state, during the supply power voltage that power input inputs, electronic equipment can not be started shooting, only have first potentiometer to be closed to have no progeny and open potentiometer again, electronic equipment just can be made to start shooting, achieve electronic equipment just to start shooting under the hard triggering situation of potentiometer, electronic equipment is avoided to damage owing to powering on suddenly.
Accompanying drawing explanation
Fig. 1 is the theory diagram that the utility model triggers boot-strap circuit one embodiment firmly;
Fig. 2 is the theory diagram that the utility model triggers another embodiment of boot-strap circuit firmly;
Fig. 3 is the electrical block diagram that the utility model triggers boot-strap circuit one embodiment firmly.
The realization of the purpose of this utility model, functional characteristics and advantage, will in conjunction with the embodiments, and be described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
The utility model provides one firmly to trigger boot-strap circuit, and this firmly triggers boot-strap circuit and can be applicable in the electronic equipments such as audio & video equipment, and this electronic equipment can be built-in with battery.
Reference Fig. 1, Fig. 1 are the theory diagram that the utility model triggers boot-strap circuit one embodiment firmly.
In one embodiment, hard triggering boot-strap circuit of the present utility model comprises power input VPIN, potentiometer 10, edging trigger module 20, trigger control module 30, time delay module 40, mains switch control module 50 and power output end VPOUT.
Wherein, edging trigger module 20 is for controlling the break-make of mains switch control module 50, trigger control module 30 is for controlling the trigger state of edging trigger module 20 according to the state of potentiometer 10, time delay module 40 was for being originally in power input VPIN input supply power voltage under open state during at potentiometer 10, time delay is carried out to the supply power voltage of the RESET input that will be input to edging trigger module 20, edging trigger module 20 is not triggered.
Power input VPIN is connected VPOUT by mains switch control module 50 with power output end, namely the input of mains switch control module 50 is connected with power input VPIN, the output of mains switch control module 50 is connected with power output end VPOUT, and power output end VPOUT is for being connected to the load of electronic equipment; The RESET input of edging trigger module 20 is connected VPIN by time delay module 40 with power input, and namely the input of time delay module 40 is connected with power input VPIN, and the output of time delay module 40 is connected with the RESET input of edging trigger module 20; The control end of trigger control module 30 is connected with power input VPIN by potentiometer 10, and the energization input of trigger control module 30 is connected with power input VPIN, and the output of trigger control module 30 is connected with the RESET input of edging trigger module 20; The operating voltage input of edging trigger module 20 is all connected with power input VPIN with the data input pin of edging trigger module 20, the input end of clock of edging trigger module 20 is connected with power input VPIN by potentiometer 10, and the output of edging trigger module 20 is connected with the control end of mains switch control module 50.
In the present embodiment, supply power voltage is inputted at power input VPIN, namely external power source (as adapter) or by the battery-powered situation of in-built electrical connected by electronic equipment, when potentiometer 10 is in open state, trigger control module 30 controls edging trigger module 20 and triggers, what edging trigger module 20 triggered rear output high level controls signal to mains switch control module 50, control the conducting of mains switch control module 50, the supply power voltage that now power input VPIN inputs exports the load of electronic equipment to from power output end VPOUT by mains switch control module 50, to the load supplying of electronic equipment, thus electronic equipment is started shooting.
When power input VPIN inputs supply power voltage, when potentiometer 10 is in off status, trigger control module 30 controls edging trigger module 20 and does not trigger, now edging trigger module 20 output low level control signal to mains switch control module 50, control mains switch control module 50 to turn off, cut off the output of supply power voltage, namely the supply power voltage making power input VPIN input can not export the load of electronic equipment to from power output end VPOUT, thus electronic equipment is shut down.
Under potentiometer 10 was originally in open state, when power input VPIN inputs supply power voltage, namely external power source or when plugging internal battery connected by electronic equipment, the supply power voltage of time delay module to the RESET input that will be input to edging trigger module 20 carries out time delay, edging trigger module 20 is not triggered, thus the control signal of edging trigger module 20 output low level control mains switch control module 50 turns off, the supply power voltage that power input VPIN is inputted can not export from power output end VPOUT, thus make under potentiometer 10 is in open state, during the supply power voltage that power input VPIN inputs, electronic equipment can not be started shooting, only have first potentiometer 10 to be closed to have no progeny and open potentiometer 10 again, electronic equipment just can be made to start shooting, achieve electronic equipment just to start shooting under the hard triggering situation of potentiometer 10, electronic equipment is avoided to damage owing to powering on suddenly.
Refer again to Fig. 2, Fig. 2 is the theory diagram that the utility model triggers another embodiment of boot-strap circuit firmly.
With firmly trigger shown in Fig. 1 boot-strap circuit unlike, hard triggering boot-strap circuit shown in Fig. 2 also comprises Voltage stabilizing module 60, this Voltage stabilizing module 60 carries out voltage stabilizing for the supply power voltage inputted power input VPIN, the input of Voltage stabilizing module 60 is connected with power input VPIN, the output of Voltage stabilizing module 60 is connected with the operating voltage input of edging trigger module 20 and data input pin respectively, and is connected with the input of time delay module 40.
After the supply power voltage that Voltage stabilizing module 60 couples of power input VPIN input carries out voltage stabilizing process, export the supply power voltage after voltage stabilizing process to edging trigger module 20 and time delay module 40 again, guarantee that the supply power voltage exporting edging trigger module 20 and time delay module 40 to is stablized.
Refer again to Fig. 3, Fig. 3 is the electrical block diagram that the utility model triggers boot-strap circuit one embodiment firmly.
As shown in Figure 3, potentiometer 10 comprises a control switch S1, and the first end of control switch S1 is connected with power input VPIN, and second end of control switch S1 is connected with the input end of clock of edging trigger module 20.
Particularly, edging trigger module 20 comprises d type flip flop U1, the first resistance R1 and the second resistance R2.The energization pins VCC1 of d type flip flop U1 is as the operating voltage input of edging trigger module 20, the data-out pin D of d type flip flop U1 is as the data input pin of edging trigger module 20, the clock input pin CP of d type flip flop U1 as the input end of clock of edging trigger module 20, the master reset input pin of d type flip flop U1
the RESET input as edging trigger module 20 connects, and the triggering output pin Q of d type flip flop U1 is as the output of edging trigger module 20.
The energization pins VCC1 of d type flip flop U1 is connected with power input VPIN, the ground pin GND1 ground connection of d type flip flop U1, the data-out pin D of d type flip flop U1 is connected with power input VPIN via the first resistance R1, the clock input pin CP of d type flip flop U1 is connected with second end of control switch S1 via the second resistance R2, the master reset input pin of d type flip flop U1
be connected with the output of trigger control module 30, and be connected with the output of time delay module 40, the triggering output pin Q of d type flip flop U1 is connected with the control end of mains switch control module 50.
Particularly, trigger control module 30 comprises the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6 and the first electric capacity C1.Wherein, the first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 is NMOS tube.
The grid of the first metal-oxide-semiconductor M1 is as the control end of trigger control module 30, via the 3rd resistance R3 ground connection, and be connected with second end of control switch S1 via the 4th resistance R4, the source ground of the first metal-oxide-semiconductor M1, the drain electrode of the first metal-oxide-semiconductor M1 is connected with the grid of the second metal-oxide-semiconductor M2 via the first electric capacity C1; The grid of the second metal-oxide-semiconductor M2 is as the energization input of trigger control module 30, be connected with power input VPIN via the first electric capacity C1, the 6th resistance R6, and via the 5th resistance R5 ground connection, the source ground of the second metal-oxide-semiconductor M2, the drain electrode of the second metal-oxide-semiconductor M2 is as the output of trigger control module 30, be connected with the RESET input of edging trigger module 20, as in Fig. 3, the drain electrode of the second metal-oxide-semiconductor M2 and the master reset input pin of d type flip flop U1
connect.
Particularly, time delay module 40 comprises the 7th resistance R7 and the second electric capacity C2.
One end of 7th resistance R7, as the input of time delay module 40, is connected with power input VPIN, and the other end of the 7th resistance R7 is via the second electric capacity C2 ground connection; The common port of the 7th resistance R7 and the second electric capacity C2, as the output of time delay module 40, is connected with the RESET input of edging trigger module 20, as in Fig. 3, and the common port of the 7th resistance R7 and the second electric capacity C2 and the master reset input pin of d type flip flop U1
connect.
Particularly, time delay module 40 also comprises electrostatic protection device ESD1, one end of electrostatic protection device ESD1 is connected with the common port of the 7th resistance R7 and the second electric capacity C2, and is connected with the RESET input of edging trigger module 20, the other end ground connection of electrostatic protection device ESD1.
Particularly, mains switch control module 50 comprises the 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4 and the 8th resistance R8.Wherein, the 3rd metal-oxide-semiconductor M3 is NMOS tube, and the 4th metal-oxide-semiconductor M4 is PMOS.
The grid of the 3rd metal-oxide-semiconductor M3 is as the control end of mains switch control module 50, be connected with the output of edging trigger module 20 via the 8th resistance R8, as in Fig. 3, the grid of the 3rd metal-oxide-semiconductor M3 is connected with the triggering output pin Q of d type flip flop via the 8th resistance R8, the source ground of the 3rd metal-oxide-semiconductor M3, the drain electrode of the 3rd metal-oxide-semiconductor M3 is connected with the grid of the 4th metal-oxide-semiconductor M4, the source electrode of the 4th metal-oxide-semiconductor M4 is as the input of mains switch control module 50, be connected with power input VPIN, the drain electrode of the 4th metal-oxide-semiconductor M4 is as the output of mains switch control module 50, be connected with power output end VPOUT.
Particularly, Voltage stabilizing module 60 comprises linear voltage regulator U2, the 3rd electric capacity C3 and the 4th electric capacity C4.
One end of 3rd electric capacity C3 is connected with power input VPIN, the other end ground connection of the 3rd electric capacity C3, the energization pins VCC2 of linear voltage regulator U2 is as the input of Voltage stabilizing module 60, be connected with power input VPIN, the enable pin CE of linear voltage regulator U2 is connected with power input VPIN, the grounding pin GND2 ground connection of linear voltage regulator U2, the output pin VOUT of linear voltage regulator U2 is as the output of Voltage stabilizing module 60, be connected with the operating voltage input of edging trigger module 20 and data input pin respectively, and be connected with the input of time delay module 40, as in Fig. 3, the output pin VOUT of linear voltage regulator U2 is connected with the data-out pin D of d type flip flop U1 via the 4th resistance R4, the output pin VOUT of linear voltage regulator U2 is also connected with the energization pins VCC1 of d type flip flop U1, the output pin VOUT of linear voltage regulator U2 is also successively via the 7th resistance R7, second electric capacity C2 ground connection, one end of 4th electric capacity C4 is connected with the output pin VOUT of linear voltage regulator U2, the other end ground connection of the 4th electric capacity C4.
As shown in Figure 3, the utility model firmly trigger boot-strap circuit operation principle specifically describe as follows:
Supply power voltage is inputted at power input VPIN, namely external power source (as adapter) or by the battery-powered situation of in-built electrical connected by electronic equipment, when potentiometer 10 is in open state, namely when the control switch S1 of potentiometer 10 closes, the supply power voltage that power input VPIN inputs is by being input to the clock input pin CP of d type flip flop U1 after the control switch S1 of potentiometer 10, to clock input pin CP rising edge pulse of d type flip flop U1, the supply power voltage of power input VPIN input is simultaneously by being input to the grid of the first metal-oxide-semiconductor M1 through the 4th resistance R4 after the control switch S1 of potentiometer 10, make the first metal-oxide-semiconductor M1 conducting, now the first electric capacity C1 discharges to the first metal-oxide-semiconductor M1, the grid of the second metal-oxide-semiconductor M2 is dragged down, the grid of the second metal-oxide-semiconductor M2 is made to be low level, second metal-oxide-semiconductor M2 ends, and the drain electrode of the second metal-oxide-semiconductor M2, the i.e. master reset input pin of d type flip flop U1
high level state is maintained when the rising edge pulse of the clock input pin CP of d type flip flop U1 arrives, therefore the triggering output pin Q of d type flip flop U1 exports the grid controlling signal to the 3rd metal-oxide-semiconductor M3 of high level, make the 3rd metal-oxide-semiconductor M3 conducting, the now drain electrode of the 3rd metal-oxide-semiconductor M3 is dragged down, the grid of the 4th metal-oxide-semiconductor M4 is low level, supply power voltage due to power input VPIN input is input to the source electrode of the 4th metal-oxide-semiconductor M4, the source electrode of the 4th metal-oxide-semiconductor M4 is high level, thus the 4th metal-oxide-semiconductor M4 conducting, the supply power voltage that now power input VPIN inputs exports from power output end VPOUT via the 4th metal-oxide-semiconductor M4, to the load supplying of electronic equipment, thus electronic equipment start.
When power input VPIN still inputs supply power voltage, when potentiometer 10 is in off status, namely when the control switch S1 of potentiometer 10 closes, the grid of the first metal-oxide-semiconductor M1 is dragged down by the 3rd resistance R3, first metal-oxide-semiconductor M1 ends, the voltage that now power input VPIN inputs charges to the first electric capacity C1 through the 6th resistance R6, the first electric capacity C1, the 5th resistance R5, the grid of the second metal-oxide-semiconductor M2 is made to be high level, second metal-oxide-semiconductor M2 conducting, the now drain electrode of metal-oxide-semiconductor is dragged down, i.e. the master reset input pin of d type flip flop U1
for low level, the grid controlling signal to the 3rd metal-oxide-semiconductor M3 of the triggering output pin Q output low level of d type flip flop U1,3rd metal-oxide-semiconductor M3 is ended, 4th metal-oxide-semiconductor M4 also ends, the supply power voltage that now power input VPIN inputs can not export the load of electronic equipment to from power output end VPOUT, thus electronic equipment shutdown.
Under potentiometer 10 was originally in open state, when power input VPIN inputs supply power voltage, namely external power source or when plugging internal battery connected by electronic equipment, supply power voltage moment is inputted at power input VPIN, supply power voltage is input to the clock input pin CP of d type flip flop U1 by potentiometer 10, thus the clock input pin CP of d type flip flop U1 is once the rising edge pulse that powered on; But, the supply power voltage that power input VPIN inputs also will charge to the second electric capacity C2 through the 7th resistance R7, the second electric capacity C2, and charging to the second electric capacity C2 through the 7th resistance R7, the second electric capacity C2 after linear voltage regulator U2 voltage stabilizing, thus the 7th resistance R7 and the second electric capacity C2 is to the master reset input pin that will be input to d type flip flop U1
supply power voltage carry out time delay, make the master reset input pin of d type flip flop U1
arriving at the rising edge pulse of the clock input pin CP of d type flip flop U1 is not high level, and be low level, therefore, make the grid controlling signal to the 3rd metal-oxide-semiconductor M3 of the triggering output pin Q output low level of d type flip flop U1,3rd metal-oxide-semiconductor M3 is ended, and the 4th metal-oxide-semiconductor M4 also ends.Thus make under potentiometer 10 is in open state, during the supply power voltage that power input VPIN inputs, electronic equipment can not be started shooting, only have first potentiometer 10 to be closed to have no progeny and open potentiometer 10 again, electronic equipment just can be made to start shooting, namely potentiometer 10 only just can make electronic equipment start shooting under hard triggering situation, thus electronic equipment can be avoided to damage owing to powering on suddenly.
The utility model also provides a kind of electronic equipment, and this electronic equipment comprises and firmly triggers boot-strap circuit, and this triggers the circuit structure of boot-strap circuit, operation principle and the beneficial effect that brings firmly all with reference to above-described embodiment, repeats no more herein.
The foregoing is only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (10)
1. one kind is triggered boot-strap circuit firmly, it is characterized in that, comprise power input, power output end, potentiometer, mains switch control module, for controlling the edging trigger module of the break-make of described mains switch control module, for controlling the trigger control module of the trigger state of described edging trigger module according to the state of described potentiometer, and during for being originally in described power input input supply power voltage under open state at described potentiometer, time delay is carried out to the supply power voltage of the RESET input that will be input to described edging trigger module, make the time delay module that described edging trigger module does not trigger,
Described power input is connected with described power output end by described mains switch control module; The RESET input of described edging trigger module is connected with described power input by described time delay module; The control end of trigger control module is connected with power input by potentiometer, and the energization input of trigger control module is connected with power input, and the output of trigger control module is connected with the RESET input of edging trigger module; The operating voltage input of edging trigger module is all connected with power input with the data input pin of edging trigger module, the input end of clock of edging trigger module is connected with power input by potentiometer, and the output of edging trigger module is connected with the control end of mains switch control module.
2. firmly trigger boot-strap circuit as claimed in claim 1, it is characterized in that, described potentiometer comprises a control switch, and the first end of described control switch is connected with described power input, and the second end of described control switch is connected with the input end of clock of described edging trigger module.
3. firmly trigger boot-strap circuit as claimed in claim 2, it is characterized in that, described edging trigger module comprises d type flip flop, the first resistance and the second resistance;
The energization pins of described d type flip flop is connected with described power input, the ground pin ground connection of described d type flip flop, the data-out pin of described d type flip flop is connected with described power input via described first resistance, and the clock input pin of described d type flip flop is connected with the second end of described control switch via described second resistance; The master reset input pin of described d type flip flop is connected with the output of described trigger control module, and is connected with the output of described time delay module; The triggering output pin of described d type flip flop is connected with the control end of described mains switch control module.
4. firmly trigger boot-strap circuit as claimed in claim 2, it is characterized in that, described trigger control module comprises the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance and the first electric capacity;
The grid of described first metal-oxide-semiconductor is via described 3rd grounding through resistance, and be connected with the second end of described control switch via described 4th resistance, the source ground of described first metal-oxide-semiconductor, the drain electrode of described first metal-oxide-semiconductor is connected with the grid of the second metal-oxide-semiconductor via described first electric capacity; The grid of described second metal-oxide-semiconductor is connected with described power input via described first electric capacity, described 6th resistance, and via described 5th grounding through resistance, the source ground of described second metal-oxide-semiconductor, the drain electrode of described second metal-oxide-semiconductor is connected with the RESET input of described edging trigger module.
5. firmly trigger boot-strap circuit as claimed in claim 1, it is characterized in that, described time delay module comprises the 7th resistance and the second electric capacity;
One end of described 7th resistance is connected with described power input, and the other end of described 7th resistance is via described second capacity earth; Described 7th resistance is connected with the RESET input of described edging trigger module with the common port of described second electric capacity.
6. firmly trigger boot-strap circuit as claimed in claim 5, it is characterized in that, described time delay module also comprises electrostatic protection device, one end of described electrostatic protection device is connected with the common port of described 7th resistance and described second electric capacity, and be connected with the RESET input of described edging trigger module, the other end ground connection of described electrostatic protection device.
7. firmly trigger boot-strap circuit as claimed in claim 1, it is characterized in that, described mains switch control module comprises the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor and the 8th resistance;
The grid of described 3rd metal-oxide-semiconductor is connected with the output of described edging trigger module via described 8th resistance, the source ground of described 3rd metal-oxide-semiconductor, the drain electrode of described 3rd metal-oxide-semiconductor is connected with the grid of described 4th metal-oxide-semiconductor, the source electrode of described 4th metal-oxide-semiconductor is connected with described power input, and the drain electrode of described 4th metal-oxide-semiconductor is connected with described power output end.
8. firmly trigger boot-strap circuit as claimed in any of claims 1 to 7 in one of claims, it is characterized in that, the described hard triggering boot-strap circuit supply power voltage also comprised for inputting described power input carries out the Voltage stabilizing module of voltage stabilizing, the input of described Voltage stabilizing module is connected with described power input, the output of described Voltage stabilizing module is connected with the operating voltage input of described edging trigger module and data input pin respectively, and is connected with the input of described time delay module.
9. firmly trigger boot-strap circuit as claimed in claim 8, it is characterized in that, described Voltage stabilizing module comprises linear voltage regulator, the 3rd electric capacity and the 4th electric capacity;
One end of described 3rd electric capacity is connected with described power input, the other end ground connection of described 3rd electric capacity; The energization pins of described linear voltage regulator is connected with described power input, the enable pin of described linear voltage regulator is connected with described power input, the grounding pin ground connection of described linear voltage regulator, the output pin of described linear voltage regulator is connected with the operating voltage input of described edging trigger module and data input pin respectively, and is connected with the input of described time delay module; One end of described 4th electric capacity is connected with the output pin of described linear voltage regulator, the other end ground connection of described 4th electric capacity.
10. an electronic equipment, is characterized in that, described electronic equipment comprises the hard triggering boot-strap circuit in claim 1 to 9 described in any one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420815934.6U CN204290917U (en) | 2014-12-18 | 2014-12-18 | Hard triggering boot-strap circuit and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420815934.6U CN204290917U (en) | 2014-12-18 | 2014-12-18 | Hard triggering boot-strap circuit and electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204290917U true CN204290917U (en) | 2015-04-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420815934.6U Expired - Fee Related CN204290917U (en) | 2014-12-18 | 2014-12-18 | Hard triggering boot-strap circuit and electronic equipment |
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| Country | Link |
|---|---|
| CN (1) | CN204290917U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104917144A (en) * | 2015-06-04 | 2015-09-16 | 科力远混合动力技术有限公司 | Relay control circuit in high-voltage system for hybrid electric vehicle |
| CN117278015A (en) * | 2023-11-21 | 2023-12-22 | 成都怡康科技有限公司 | Low-power-consumption multi-trigger-source switching-on and switching-off circuit |
-
2014
- 2014-12-18 CN CN201420815934.6U patent/CN204290917U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104917144A (en) * | 2015-06-04 | 2015-09-16 | 科力远混合动力技术有限公司 | Relay control circuit in high-voltage system for hybrid electric vehicle |
| CN117278015A (en) * | 2023-11-21 | 2023-12-22 | 成都怡康科技有限公司 | Low-power-consumption multi-trigger-source switching-on and switching-off circuit |
| CN117278015B (en) * | 2023-11-21 | 2024-01-30 | 成都怡康科技有限公司 | Low-power-consumption multi-trigger-source switching-on and switching-off circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150422 Termination date: 20201218 |