CN207198843U - Usb circuit - Google Patents

Abstract

The application provides a kind of usb circuit.Usb circuit includes USB3.0 interfaces and signal switching circuit.USB3.0 interfaces include differential signal anode, differential signal negative terminal, ultrahigh speed and send differential signal anode, ultrahigh speed transmission signal negative terminal, ultrahigh speed reception differential signal anode and ultrahigh speed reception differential signal negative terminal.It is vacant state that ultrahigh speed, which sends differential signal anode and ultrahigh speed transmission signal negative terminal,.Signal switching circuit receives differential signal anode with the ultrahigh speed of USB3.0 interfaces and ultrahigh speed receives differential signal negative terminal and is connected, it is high-impedance state that ultrahigh speed can be made, which to receive differential signal anode and ultrahigh speed reception differential signal negative terminal, makes differential signal anode and differential signal negative terminal differential signal transmission.

Description

Usb circuit

Technical field

The application is related to communication technique field, more particularly to a kind of usb circuit.

Background technology

USB (Universal Serial Bus, USB) is the Peripheral Interface rule being most widely used at present Model, for being connected and communicate with for specification computer and external equipment.With the development in epoch, the progress of external equipment, USB interface rule Model also has corresponding supporting upgrading, after USB2.0, newest USB interface specification occurs：USB3.0 is (also referred to as SuperSpeed USB, high speed USB).USB3.0 transmission speed can reach 5Gbps, using the teaching of the invention it is possible to provide up to 600MB/S band It is wide.USB3.0 can replace USB interface as debugging interface, also can be as the interface of user equipment grafting.But some users With there is the problem of nonrecognition in equipment, i.e., probability nonrecognition problem after USB3.0 interface grafting.

Utility model content

The application provides a kind of usb circuit, can solve certain customers' equipment with being failed to see after USB3.0 interface grafting Other problem.

The embodiment of the present application provides a kind of usb circuit, and the usb circuit includes：USB3.0 interfaces, including difference It is poor that signal anode, differential signal negative terminal, ultrahigh speed send differential signal anode, ultrahigh speed sends signal negative terminal, ultrahigh speed receives Sub-signal anode and ultrahigh speed receive differential signal negative terminal, and the ultrahigh speed sends differential signal anode and the ultrahigh speed is sent Signal negative terminal is vacant state；And signal switching circuit, with the ultrahigh speeds of the USB3.0 interfaces receive differential signal anode and Ultrahigh speed receives the connection of differential signal negative terminal, and ultrahigh speed can be made to receive differential signal anode and ultrahigh speed reception differential signal negative terminal For high-impedance state, make the differential signal anode and the differential signal negative terminal differential signal transmission.

Further, the USB3.0 interfaces include signal return earth terminal, and the signal switching circuit is cut including signal Switch chip is changed, there is the Enable Pin being connected with signal return earth terminal.

Further, the signal shift switch chip includes differential data anode and differential data negative terminal, the difference Data anode receives differential signal anode with the ultrahigh speed of the USB3.0 interfaces and is connected, the differential data negative terminal and institute State ultrahigh speed and receive the connection of differential signal negative terminal.

Further, the signal switching circuit includes negative circuit, is connected to the signal of the USB3.0 interfaces Return between earth terminal and the Enable Pin of the signal shift switch chip, for the signal to be returned to the letter of earth terminal The Enable Pin is supplied to after number anti-phase.

Further, the negative circuit includes triode, the base stage of the triode and the institute of the USB3.0 interfaces State signal and return to earth terminal connection, colelctor electrode is connected with the Enable Pin of the signal shift switch chip and is connected to electricity Source, grounded emitter.

Further, the signal switching circuit includes signal shift switch chip and selection circuit, the signal switching Switch chip includes the first high-speed data end, the second high-speed data end and selection end, the selection circuit and is connected to described Between USB3.0 interfaces and the selection end, for providing selection signal to described when the signal shift switch chip is enabled Signal shift switch chip, to select the first high-speed data end or the second high-speed data end differential signal transmission.

Further, the USB3.0 interfaces include signal return earth terminal, and the selection circuit is connected to the signal Return to earth terminal.

Further, the selection circuit includes being connected to the signal and returns to the triode of earth terminal and by three pole The switch that the base stage of pipe is connected to the ground, the switch is normal open switch.

Further, the colelctor electrode of the triode is connected to the signal and returns to earth terminal, and base stage is additionally coupled to power supply, Grounded emitter.

Further, the selection circuit includes diode, and the positive pole of the diode connects the signal and returns to ground connection End and the colelctor electrode of the triode, the negative pole of the diode connect the signal shift switch chip and ground connection.

The ultrahigh speed of the USB3.0 interfaces of the usb circuit of the embodiment of the present application sends differential signal anode and ultrahigh speed It is vacant state to send signal negative terminal, signal switching circuit can make the ultrahigh speed of USB3.0 interfaces receive differential signal anode with It is high-impedance state that ultrahigh speed, which receives differential signal negative terminal, equivalent to vacant state, so makes USB3.0 can backward compatible conduct USB2.0, certain customers' equipment is avoided with the problem of nonrecognition, that is, solving probability nonrecognition after USB3.0 interface grafting and asking Topic, improve Consumer's Experience.

Brief description of the drawings

Fig. 1 show the schematic block diagram of one embodiment of the application usb circuit；

Fig. 2 show the circuit diagram of one embodiment of the usb circuit shown in Fig. 1.

Embodiment

Here exemplary embodiment will be illustrated in detail, its example is illustrated in the accompanying drawings.Following description is related to During accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawings represent same or analogous key element.Following exemplary embodiment Described in embodiment do not represent all embodiments consistent with the application.On the contrary, they be only with it is such as appended The example of the consistent apparatus and method of some aspects be described in detail in claims, the application.

It is only merely for the purpose of description specific embodiment in term used in this application, and is not intended to be limiting the application. Unless otherwise defined, technical term or scientific terminology used in this application, which are should be in the utility model art, has one As technical ability the ordinary meaning that is understood of personage." first " " second " used in present specification and claims with And similar word is not offered as any order, quantity or importance, and it is used only to distinguish different parts.Together Sample, the similar word such as "one" or " one " do not indicate that quantity limits yet, but represent to exist at least one." comprising " or The similar word such as "comprising", which means to appear in element or object of the " comprising " either before "comprising" to cover, appears in " comprising " The either element of "comprising" presented hereinafter or object and its equivalent, it is not excluded that other elements or object." connection " or The similar word such as " connected " is not limited to physics or mechanical connection, and can include electrical connection, no matter It is direct or indirect." one kind " of singulative used in present specification and appended claims, " described " and "the" are also intended to including most forms, unless context clearly shows that other implications.It is also understood that herein The term "and/or" used refers to and any or all may be combined comprising the associated list items purpose of one or more.

The usb circuit of the embodiment of the present application includes USB3.0 interfaces and signal switching circuit.USB3.0 interfaces include Differential signal anode, differential signal negative terminal, ultrahigh speed send differential signal anode, ultrahigh speed sends signal negative terminal, superelevation quick access Astigmat sub-signal anode and ultrahigh speed receive differential signal negative terminal.Ultrahigh speed sends differential signal anode and ultrahigh speed sends signal Negative terminal is vacant state.The ultrahigh speed of signal switching circuit and USB3.0 interfaces receives differential signal anode and ultrahigh speed reception is poor Sub-signal negative terminal connects, and it is high-impedance state that ultrahigh speed can be made, which to receive differential signal anode and ultrahigh speed reception differential signal negative terminal, Make differential signal anode and differential signal negative terminal differential signal transmission.The ultrahigh speeds of USB3.0 interfaces send differential signal anode and It is vacant state that ultrahigh speed, which sends signal negative terminal, and signal switching circuit can make the ultrahigh speed of USB3.0 interfaces receive differential signal It is high-impedance state that anode and ultrahigh speed, which receive differential signal negative terminal, equivalent to vacant state, so makes USB3.0 backward compatible As USB2.0, certain customers' equipment is avoided with the problem of nonrecognition, that is, solving probability fail to see after USB3.0 interface grafting Other problem, improve Consumer's Experience.

Fig. 1 show the schematic block diagram of one embodiment of usb circuit 10.Usb circuit 10 includes USB3.0 Interface 11, control process circuit 13 and signal switching circuit 15.USB3.0 interfaces 11 can be A types or Type B USB3.0 interfaces, can To be socket or plug.Control process circuit 13 includes the USB2.0 interfaces 130 being connected with USB3.0 interfaces 11.Signal switching electricity Road 15 is connected with USB3.0 interfaces 11 and is connected with control process circuit 13.In one of the states, signal switching circuit 15 can be with Make USB3.0 interfaces 11 and the differential signal transmission of USB2.0 interfaces 130, realize the external equipment (example for being connected to USB3.0 interfaces 11 Such as user mobile phone, USB flash disk) with control process circuit 13 by USB3.0 interfaces 11 and the transmission signal of USB2.0 interfaces 130, now 11 backward compatible USB2.0 of USB3.0 interfaces.In another state, USB3.0 interfaces 11 pass through letter with control process circuit 13 Number transmission signal of switching circuit 15, it is possible to achieve the signal of external equipment (such as commissioning device) and control process circuit 13 passes It is defeated.

Fig. 2 show the circuit diagram of one embodiment of usb circuit 10.Wrapped with reference to reference to figure 1, USB3.0 interfaces 11 Include differential signal anode D+ (for the 3rd pin in figure), differential signal negative terminal D- (for the 2nd pin in figure), ultrahigh speed and send difference Signal anode STAD_SSTX+ (for the 9th pin in figure), ultrahigh speed send signal negative terminal STAD_SSTX- and (drawn for the in figure the 8th Pin), ultrahigh speed receive differential signal anode STAD_SSRX+ (for the 6th pin in figure) and ultrahigh speed reception differential signal negative terminal STAD_SSRX- (for the 5th pin in figure).In the illustrated embodiment, ultrahigh speed sends differential signal anode STAD_SSTX+ and surpassed It is vacant state to send signal negative terminal STAD_SSTX- at a high speed.The USB2.0 interface 130 and differential signal of control process circuit 13 Anode D+ connects with differential signal negative terminal D-.The ultrahigh speed of signal switching circuit 15 and USB3.0 interfaces 11 is receiving differential signal just End STAD_SSRX+ receives differential signal negative terminal STAD_SSRX- with ultrahigh speed and connected.Signal switching circuit 15 is in not enabled state Under, it is high resistant ultrahigh speed is received differential signal anode STAD_SSRX+ and ultrahigh speed reception differential signal negative terminal STAD_SSRX- State, USB3.0 interfaces 11 are made to pass through USB2.0 interfaces 130 and the differential signal transmission of control process circuit 13.In enabled state Under, the ultrahigh speed of USB3.0 interfaces 11 is received into differential signal anode STAD_SSRX+ and ultrahigh speed receives differential signal negative terminal STAD_SSRX- is connected with control process circuit 13, carrys out transmission signal.

Specifically, in the illustrated embodiment, the ultrahigh speed of USB3.0 interfaces 11 sends differential signal anode STAD_SSTX+ It is hanging to send signal negative terminal STAD_SSTX- with ultrahigh speed, is not connected with other circuits.In other embodiments, ultrahigh speed is sent Differential signal anode STAD_SSTX+ and ultrahigh speed transmission signal negative terminal STAD_SSTX- can be connected and be at vacant state Other circuits.The differential signal anode D+ of USB3.0 interfaces 11 is connected with the differential signal anode of USB2.0 interfaces 130, The differential signal negative terminal D- of USB3.0 interfaces 11 is connected with the differential signal negative terminal of USB2.0 interfaces 130, for transmitting difference letter Number, such as can be by the data transfer in the equipment such as user mobile phone to control process circuit 13 (such as CPU (Central of computer Processing Unit, central processing unit)).USB3.0 interfaces 11 also include signal and return to earth terminal GND_DRAIN (in figure 7th pin).Signal returns to earth terminal GND_DRAIN and is connected with signal switching circuit 15.USB3.0 interfaces 11 are socket in figure.

In the illustrated embodiment, control process circuit 13 includes the first control process chip 132 and the second control process core Piece 134.In one embodiment, the first control process chip 132 (Integrated Circuit, can integrate including main IC Circuit), such as CPU.Main IC may include the first UART (Universal Asynchronous Receiver/Transmitter, Universal asynchronous receiving-transmitting transmitter).In one embodiment, the first control process chip 132 is connected with USB2.0 interfaces 130. In one embodiment, the second control process chip 134 can include MCU (Microprogrammed Control Unit, shred Sequence controller), such as single-chip microcomputer, FPGA (Field Programmable Gate, field programmable gate array).MCU may include 2nd UART.

Signal switching circuit 15 includes signal shift switch chip U1, has and returns to ground connection with the signal of USB3.0 interfaces 11 Hold the Enable Pin of GND_DRAIN connectionsSignal switching circuit 15 returns to earth terminal GND_DRAIN signal according to signal (high level or low level) is operated in enabled state or non-enabled state.In the illustrated embodiment, signal shift switch chip U1 Dual channel high speed USB2.0 switching switch chip FSUSB30MUX, but not limited to this can be used, can also be opened using other switchings Close chip.Signal shift switch chip U1 include differential data anode D+, differential data negative terminal D-, high-speed data end HSD1+, HSD1-, HSD2+ and HSD2-.Wherein, signal shift switch chip U1 differential data anode D+ and USB3.0 interfaces 11 is super The STAD_SSRX+ connections of differential signal anode are received at a high speed, and differential data negative terminal D- receives differential signal negative terminal with ultrahigh speed STAD_SSRX- connections.Signal shift switch chip U1 connects with the first control process chip 132 and the second control process chip 134 Connect, wherein, first high-speed data end HSD1+, HSD1- is connected with the first control process chip 132, the second high-speed data end HSD2 + and HSD2- be connected with the second control process chip 134.In one embodiment, signal shift switch chip U1 the first high speed Data terminal HSD1+, HSD1- are connected to the first UART of the first control process chip 132, the second high-speed data end HSD2+, HSD2- is connected to the 2nd UART of the second control process chip 134.

In the illustrated embodiment, signal switching circuit 15 includes negative circuit 150, is connected to the signal of USB3.0 interfaces 11 Return to earth terminal GND_DRAIN and signal shift switch chip U1 Enable PinBetween, for signal is returned into earth terminal Enable Pin is supplied to after GND_DRAIN signal inversionSignal shift switch chip U1 returns to earth terminal GND_ in signal It is not enabled state when DRAIN signal is low level, is when the signal that signal returns to earth terminal GND_DRAIN is high level Enabled state.

Negative circuit 150 includes triode QV1, and triode QV1 base stage is returned with the signal of USB3.0 interfaces 11 and is grounded Hold GND_DRAIN connections, colelctor electrode and signal shift switch chip U1 Enable PinConnection.Colelctor electrode is additionally coupled to power supply, Grounded emitter.In the present embodiment, triode QV1 colelctor electrode is connected to bus power source VBUS by resistance R1, and base stage is led to Resistance R4 is crossed to be connected with the signal return earth terminal GND_DRAIN of USB3.0 interfaces 11.Triode QV1 is NPN type triode.

Signal switching circuit 15 also includes selection circuit 152, selection circuit 152 be connected with signal shift switch chip U1 and Signal shift switch chip U1 is given for providing selection signal, makes signal shift switch chip U1 selections and the first control process core A transmission signal in the control process chip 134 of piece 132 and second.Selection circuit 152 is connected to USB3.0 interfaces 11 and letter Between number switching switch chip U1 selection end Sel, for provided when signal shift switch chip U1 is enabled selection signal to Signal shift switch chip U1, to select first high-speed data end HSD1+, HSD1- or second high-speed data end HSD2+, HSD2- Differential signal transmission.Signal shift switch chip U1 is supplied to selection end Sel selection signal (high electricity according to selection circuit 152 Flat or low level) select first high-speed data end HSD1+, HSD1- work or second high-speed data end HSD2+, HSD2- work Make.In the illustrated embodiment, selection circuit 152 is connected to the signals of USB3.0 interfaces 11 and returns to earth terminal GND_DRAIN, can be with The signal that signal is returned to earth terminal GND_DRAIN is converted into selection signal.

In one embodiment, selection circuit 152 includes being connected to the triode Q1 that signal returns to earth terminal GND_DRAIN With the switch KEY for being connected to the ground triode Q1 base stage, switch KEY is normal open switch.Triode Q1 base stage passes through resistance R5 connects with switch KEY.Triode Q1 base stage is additionally coupled to power supply VCC, and electricity is connected to by series resistance R5 and resistance R3 Source VCC.Triode Q1 colelctor electrode is connected to signal and returns to earth terminal GND_DRAIN, and being connected to signal by resistance R2 returns Earth terminal GND_DRAIN.Triode Q1 grounded emitter.Triode Q1 is NPN type triode.

Selection circuit 152 also includes diode D1, is connected to signal and returns to earth terminal GND_DRAIN and signal shift switch Between chip U1, diode D1 positive pole connection signal returns to earth terminal GND_DRAIN and triode Q1 colelctor electrode, diode D1 negative pole connection signal shift switch chip U1 and ground connection.Diode D1 positive pole is connected to signal return by resistance R2 and connect Ground terminal GND_DRAIN.Diode D1 negative pole is connected to signal shift switch chip U1 selection end Sel, and passes through resistance R6 Ground connection.The output end SEL/BOOT0 of selection circuit 152 is connected to diode D1 negative pole.

When USB3.0 interfaces 11 (such as USB3.0 sockets in figure) with matched USB3.0 interfaces (such as USB3.0 plugs) such as user equipment external equipment grafting after, signal returns to earth terminal GND_DRAIN ground connection, and signal returns Tieback ground terminal GND_DRAIN is low level, and the resistance R4 for the negative circuit 150 that earth terminal GND_DRAIN is connected is returned with signal One end ISP_DET be low level, triode QV1 base stage is low level, therefore current collection extremely high level, i.e., connects with colelctor electrode The terminal Switch_EN connect is high level, the Enable Pin being connected with thisFor high level, signal shift switch chip U1 does not make Energy.

It is now high-impedance state between differential data anode D+ and differential data negative terminal D-, therefore USB3.0 interfaces 11 is super It is high resistant shape to receive at a high speed between differential signal anode STAD_SSRX+ and ultrahigh speed reception differential signal negative terminal STAD_SSRX- State, equivalent to vacant state.Now ultrahigh speed receives differential signal anode STAD_SSRX+, ultrahigh speed receives differential signal negative terminal STAD_SSRX-, ultrahigh speed send differential signal anode STAD_SSTX+ and ultrahigh speed transmission signal negative terminal STAD_SSTX- is Vacant state, therefore USB3.0 can be changed into USB2.0 states with backward compatible.External equipment passes through the He of USB3.0 interfaces 11 USB2.0 interfaces 130 transmit data with control process circuit 13.Portion of external equipment can be so avoided to insert USB3.0 interfaces The problem of complete machine is to the equipment nonrecognition afterwards, that is, solve the problems, such as probability nonrecognition, improve Consumer's Experience.In diagram embodiment In, external equipment transmits data by USB3.0 interfaces 11 and USB2.0 interfaces 130 and main IC.Such as CPU and USB2.0 interfaces The external equipment insertion USB3.0 such as 130 connections, user mobile phone interfaces 11, data are transmitted by USB2.0 interfaces 130 and CPU.

In one embodiment, the outward appearance that can design USB3.0 interfaces 11 is identical with the outward appearance of USB2.0 interfaces.For example, Tongue among the terminal of USB3.0 interfaces 11 can be designed as the color as the tongue of USB2.0 interfaces, such as black. For example, the outside silk-screen of USB3.0 interfaces 11 is USB2.0.Although hardware is USB3.0 interfaces, but for general user Use USB2.0 function.Above-mentioned design can intuitively feel that for its grafting be USB2.0 interfaces to general user, It uses USB2.0 functions, avoids general user from producing puzzlement when using, improves Consumer's Experience.

Such as when the external equipment of commissioning device and USB3.0 11 grafting of interface, signal is set to return to earth terminal GND_DRAIN Signal be high level.Such as settable external equipment connects power supply with the signal return earth terminal GND_DRAIN terminals being connected, High level is, so that it is high level that signal, which returns to earth terminal GND_DRAIN,.Signal returns to earth terminal GND_DRAIN For high level when, the output end Switch_EN of negative circuit 150 is low level, signal shift switch chip U1 Enable Pin For low level, signal shift switch chip U1 is enabled.In addition, the selection circuit being connected with signal return earth terminal GND_DRAIN 152 input ISP_DET is high level, triode Q1 saturation conductions, and triode Q1 colelctor electrode is pulled low, and diode D1 is cut Only, the output end SEL/BOOT0 of selection circuit 152 is grounded by resistance R6, is low level.It is connected with output end SEL/BOOT0 Signal shift switch chip U1 selection end Sel be low level, first high-speed data end HSD1+, HSD1- is chosen.

Now USB3.0 interfaces 11 receive differential signal anode STAD_SSRX+ by ultrahigh speed, ultrahigh speed receives difference and believed Number negative terminal STAD_SSRX- receives the differential signal of external equipment input, and is supplied to signal shift switch chip U1 difference number According to end D+, D-.Signal shift switch chip U1 is further provided differential signal by first high-speed data end HSD1+, HSD1- The first UART to the main IC of the first control process chip 132.In this way, by signal shift switch chip U1 by external equipment UART is connected with main IC the first UART, main IC is received the information of external equipment.Such as external equipment provides what needs printed Debugging message, the function of printing can be realized by USB3.0 interfaces 11, Debugging message can be printed in debugging.

In another case, long-press switch KEY, by the external equipment of such as commissioning device and USB3.0 interface grafting, It is high level signal is returned to earth terminal GND_DRAIN, and signal shift switch chip U1 is enabled.Triode Q1 base stage is because of switch KEY is pressed and is grounded, and triode Q1 is in cut-off state.The input ISP_DET of selection circuit 152 is high level, diode D1 is turned on, therefore the output end SEL/BOOT0 of selection circuit 152 is high level.So as to signal shift switch chip U1 selection End Sel is high level, and second high-speed data end HSD2+, HSD2- is chosen.Similarly, USB3.0 interfaces 11 pass through superelevation quick access Astigmat sub-signal anode STAD_SSRX+, ultrahigh speed receive the difference that differential signal negative terminal STAD_SSRX- receives external equipment input Sub-signal, and it is supplied to signal shift switch chip U1 differential data end D+, D-.Signal shift switch chip U1 further leads to Cross differential signal is supplied to the MCU of the second control process chip 134 by second high-speed data end HSD2+, HSD2- second UART.In this way, the UART of external equipment is connected with MCU the 2nd UART by signal shift switch chip U1, receive MCU The information of external equipment.

In the illustrated embodiment, the output end SEL/BOOT0 and MCU (i.e. the second control process chip) of selection circuit 152 Burning start port BOOT0 connections, when output end SEL/BOOT0 be high level, it is high that MCU burning, which starts port BOOT0, Level, MCU enter burning BOOTLOADER (bootload) state of wait.The UART of external equipment passes through signal shift switch core Piece U1 is connected with MCU the 2nd UART, and the burning program that external equipment is provided leads to MCU, therefore when switch KEY is pressed The function of burning program can be realized by crossing USB3.0 interfaces 11, and burning program can be carried out to MCU in debugging.

In summary, in the illustrated embodiment, when signal shift switch chip U1 is enabled, USB3.0 interfaces can pass through Signal shift switch chip U1 is connected with control process circuit 13, so as to the differential signal transmission for receiving USB3.0 interfaces 11 To control process circuit 13, it can will so need the Debugging message that print and/or need the program of burning to pass at control Circuit 13 is managed, realizes the function of printing Debugging message and/or burning program.

Fig. 2 is only exemplary example, and usb circuit 10 is not limited to the circuit shown in Fig. 2.In some embodiments In, usb circuit 10 may also include the component not shown in Fig. 2, or part component can omit or by other yuan in Fig. 2 Device replaces.

The preferred embodiment of the application is the foregoing is only, not limiting the application, all essences in the application God any modification, equivalent substitution and improvements done etc., should be included within the scope of the application protection with principle.

Claims (10)

1. A kind of 1. usb circuit, it is characterised in that：It includes：

   USB3.0 interfaces, including differential signal anode, differential signal negative terminal, ultrahigh speed send differential signal anode, ultrahigh speed hair The number of delivering letters negative terminal, ultrahigh speed receive differential signal anode and ultrahigh speed receives differential signal negative terminal, and the ultrahigh speed sends difference It is vacant state that signal anode and the ultrahigh speed, which send signal negative terminal,；And

   Signal switching circuit, receive differential signal anode with the ultrahigh speed of the USB3.0 interfaces and ultrahigh speed receives differential signal Negative terminal connects, and it is high-impedance state that ultrahigh speed can be made, which to receive differential signal anode and ultrahigh speed reception differential signal negative terminal, is made described Differential signal anode and the differential signal negative terminal differential signal transmission.
2. 2. usb circuit as claimed in claim 1, it is characterised in that：The USB3.0 interfaces include signal and return to ground connection End, the signal switching circuit include signal shift switch chip, have the Enable Pin being connected with signal return earth terminal.
3. 3. usb circuit as claimed in claim 2, it is characterised in that：The signal shift switch chip includes difference number According to anode and differential data negative terminal, the ultrahigh speed of the differential data anode and the USB3.0 interfaces receives differential signal Anode connects, and the differential data negative terminal receives differential signal negative terminal with the ultrahigh speed and is connected.
4. 4. usb circuit as claimed in claim 2, it is characterised in that：The signal switching circuit includes negative circuit, even The signal for being connected to the USB3.0 interfaces is returned between earth terminal and the Enable Pin of the signal shift switch chip, For the Enable Pin will be supplied to after the signal inversion of signal return earth terminal.
5. 5. usb circuit as claimed in claim 4, it is characterised in that：The negative circuit includes triode, three pole The base stage of pipe returns to earth terminal with the signal of the USB3.0 interfaces and is connected, colelctor electrode and the signal shift switch chip Enable Pin connection and be connected to power supply, grounded emitter.
6. 6. usb circuit as claimed in claim 1, it is characterised in that：The signal switching circuit includes signal switching and opened Closing chip and selection circuit, the signal shift switch chip includes the first high-speed data end, the second high-speed data end and selection End, the selection circuit is connected between the USB3.0 interfaces and the selection end, in the signal shift switch core Selection signal is provided when piece is enabled to the signal shift switch chip, to select the first high-speed data end or the second high-speed data Hold differential signal transmission.
7. 7. usb circuit as claimed in claim 6, it is characterised in that：The USB3.0 interfaces include signal and return to ground connection End, the selection circuit are connected to the signal and return to earth terminal.
8. 8. usb circuit as claimed in claim 7, it is characterised in that：The selection circuit includes being connected to the signal The switch for returning to the triode of earth terminal and being connected to the ground the base stage of the triode, the switch is normal open switch.
9. 9. usb circuit as claimed in claim 8, it is characterised in that：The colelctor electrode of the triode is connected to the letter Number earth terminal is returned to, base stage is additionally coupled to power supply, grounded emitter.
10. 10. usb circuit as claimed in claim 8, it is characterised in that：The selection circuit includes diode, and described two The positive pole of pole pipe connects the colelctor electrode that the signal returns to earth terminal and the triode, described in the negative pole connection of the diode Signal shift switch chip and ground connection.