CN105740193B - A kind of usb circuit, terminal device, signaling interface and external equipment - Google Patents
A kind of usb circuit, terminal device, signaling interface and external equipment Download PDFInfo
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- CN105740193B CN105740193B CN201610060086.6A CN201610060086A CN105740193B CN 105740193 B CN105740193 B CN 105740193B CN 201610060086 A CN201610060086 A CN 201610060086A CN 105740193 B CN105740193 B CN 105740193B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
Abstract
The embodiment of the present invention provides a kind of usb circuit, terminal device, signaling interface and external equipment, is related to electronic technology field, can directly transmit speech simulation signal by USB interface.The circuit includes two digital signal pins, two digital signal ports and at least one analog signal port；Two input terminals of usb signal recognition unit are respectively connected to described two digital signal pins；The input terminal of gating unit is connected at least one of described two digital signal pins, the output end of the gating unit is connected to described two digital signal ports and/or at least one described analog signal port, the control terminal of the gating unit connect the output end of the usb signal recognition unit.The embodiment of the present invention is used for usb circuit.
Description
Technical field
The embodiment of the present invention is related to electronic technology field more particularly to a kind of usb circuit, terminal device, signal
Interface and external equipment.
Background technique
Under application scenes, such as certain TVs for teaching, the real-time amplification of voice is needed support, realizes this
Function way more at present is using USB (English：Universal Serial Bus, Chinese：Universal serial bus) formula wheat
Gram wind, the working principle of this microphone are the data packet formats for first converting the collected simulation human voice signal of microphone to USB,
TV master chip is transferred to by the USB jack of TV again, then analog or digital voice signal is reduced to by master chip transcoding, and
It is transported to power amplifier amplification output.
Using the advantages of the method be USB interface on the market microphone it is more, be easy adaptation；But the method also has one
A disadvantage needs certain computing resource from the data packet format restoring acoustical signal of USB, and when TV master chip function is inadequate
Qiang Shi, it is possible that more serious delay phenomenon, causes the person of giving lessons when saying next, what loudspeaker amplified out be on
One the case where.
Summary of the invention
The embodiment of the present invention provides a kind of usb circuit, terminal device, signaling interface and external equipment, Neng Goutong
It crosses USB interface and directly transmits speech simulation signal.
In a first aspect, provide a kind of usb circuit, including two digital signal pins, two digital signal ports and
At least one analog signal port；
Two input terminals of usb signal recognition unit, the usb signal recognition unit are respectively connected to described two numbers
Signal pins, the usb signal recognition unit are configured as detecting that described two digital signal pin input signals are moulds
When quasi- signal, first control signal is exported in output end, when detecting input signal is digital signal, in output end output the
Two control signals；
Gating unit, the input terminal of the gating unit are connected at least one of described two digital signal pins,
The output end of the gating unit is connected to described two digital signal ports and/or at least one described analog signal port,
The control terminal of the gating unit connects the output end of the usb signal recognition unit, and the gating unit is configured as connecing
At least one described analog signal port is gated when receiving first control signal, to export at least one described digital signal pin
Input signal, described two digital signal ports are gated when receiving second control signal, it is described two to export respectively
The input signal of digital signal pin.
Second convenience provides a kind of terminal device, including above-mentioned usb circuit.
The third aspect provides a kind of signaling interface, including at least one analog signal output pin, wherein the simulation is believed
Number output pin is used for, and is connect with the digital signal pin of analog signal channel described in above-mentioned usb circuit, and to right
The digital signal pin output analog signal answered.
Fourth aspect provides a kind of external equipment, including above-mentioned signaling interface.
Usb circuit, signaling interface and the external equipment that the embodiment of the present invention provides, usb signal recognition unit
Two input terminals are respectively connected to two digital signal pins, and usb signal recognition unit is configured as detecting two numbers
When signal pins input signal is analog signal, first control signal is exported in output end, is detecting that input signal is number
When signal, second control signal is exported in output end；The input terminal of gating unit is connected in two digital signal pins extremely
One few, the output end of gating unit is connected to two digital signal ports and/or at least one analog signal port, and gating is single
The output end of the control terminal connection usb signal recognition unit of member, the gating unit are configured as receiving the first control letter
Number when gate at least one described analog signal port, and export the input signal of at least one digital signal pin,
Described two digital signal ports are gated when receiving second control signal, and export described two digital signal pins respectively
Input signal；When the digital signal for the data packet format for therefore being used to transmit USB interface when two digital pins, it can will gate
Described two digital signal ports export the signal of described two digital signal pins respectively, when two digital pins are not used to
When transmitting the digital signal of the data packet format of USB interface, the transmission of analog signal may be used as, so that realizing can pass through
The direct transmission of analogue signal of USB interface.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of structural schematic diagram for usb circuit that the embodiment of the present invention provides；
Fig. 2 is a kind of signal schematic representation of the data packet format for USB interface that the embodiment of the present invention provides；
Fig. 3 is a kind of structural schematic diagram for usb circuit that another embodiment of the present invention provides；
Fig. 4 is a kind of structural schematic diagram for usb circuit that another embodiment of the present invention provides；
Fig. 5 is a kind of structural schematic diagram for usb circuit that one more embodiment of the present invention provides；
Fig. 6 is a kind of structural schematic diagram for usb signal recognition unit RE that the embodiment of the present invention provides；
Fig. 7 is a kind of structural schematic diagram for usb signal recognition unit RE that another embodiment of the present invention provides；
Fig. 8 is a kind of structural schematic diagram for usb circuit that another embodiment of the present invention provides.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
It include that four pins are followed successively by shown in referring to Fig.1, on USB interface ordinary meaning：Power pins CC (it is illustrative,
The power pins voltage is usually 5V), digital signal pin D+, digital signal pin D- and grounding pin GND, wherein power supply draws
Foot CC to USB interface power, when USB interface is carried out data transmission with data packet format, be based on USB communication protocol it is found that
There are two types of working conditions altogether for digital signal in the two lines of any time, digital signal pin D+ and digital signal pins D-：
D+ and D- constitutes differential signal (single line is that high another single line is low) in the normal transmission data period, transmits data
At the end of, the low level state of D+ and D- maintenance certain time length.Illustratively, referring to shown in Fig. 2：Transmit data period packet
It includes：IDLE (idle phase), packet data packet transmit the stage) and SEO (English：Single-Ended Zero, Chinese：It is single-ended
0 state)；Wherein the packet stage includes：(data transmit rank by SYNC (synchronous phase) and Data from Transmitter
Section), Data from Transmitter (data transfer phase) includes：IN token package, ADDR address field, ENDP endpoint domain
Domain is verified with CRC5；SEO includes several EOP (English：End of-Packet, Chinese：Package terminates) period, indicate single-ended 0
In the state lasting period, D+ and D- is low level in the EOP period when transmitting end of data.USB3.0 and USB type C's connects
Degree of lip-rounding formula although increasing multiple pins on the basis of USB2.0, but still meets above-mentioned technical logic.Based on above-mentioned D+ and D-
The characteristics of data are transmitted, the embodiment of the present invention provide the number letter that a kind of usb circuit can be used in identifying USB interface
Number and analog signal.When determining the signal just transmitted is USB interface transmission digital signal, control digital data transmission to number
Word signal port, such USB transmission function are unaffected.When determining the signal transmitted is analog signal, control mould
Quasi- signal is transmitted to analog signal port, and such analog signal can smoothly be transmitted to terminal device (such as power amplifier or other equipment).
Realize the digital signal or transmission of analogue signal that the data packet format of USB interface can be both transmitted on the same USB interface
Requirement.
Specifically, the embodiment of the present invention provides a kind of usb circuit, including two digital signals shown in referring to Fig.1
Pin D+ and D-, two digital signal port USB_DM and USB_DP and at least one analog signal port (in figure with
ANALOG_A and ANALOG_B are illustrated for two ports, and certain analog signal port can also be only comprising any)；
Two input terminals of usb signal recognition unit RE, usb signal recognition unit RE are respectively connected to two digital signals
Pin D+ and D-, usb signal recognition unit RE are configured as detecting that two digital signal pins D+ and D- input signals are
When analog signal, first control signal is exported in output end, when detecting input signal is digital signal, is exported in output end
Second control signal；
Gating unit CH, the input terminal of gating unit CH are connected at least one in two digital signal pins D+ and D-
A, the output end of gating unit CH is connected to two digital signal port USB_DM and USB_DP and/or at least one simulation letter
Number port ANALOG_A and/or ANALOG_B, the output end of the control terminal connection usb signal recognition unit RE of gating unit CH,
Gating unit CH be configured as gating when receiving first control signal at least one analog signal port ANALOG_A and/or
ANALOG_B gates two when receiving second control signal to export the input signal of at least one digital signal pin
Digital signal port USB_DM and USB_DP, to export the input signal that two numbers signal pins D+ and D- are received respectively.
Shown in referring to Fig.1, above scheme is described as follows, is gating two digital signal ports USB_DM and USB_DP,
When input signal to export two digital signal pins D+ and D- respectively, wherein each digital signal pin and digital signal end
A digital signal access is formed between mouthful, for inputting digital signal to terminal device；Illustratively, pin D- is set with terminal
A digital signal access Da1, the port USB_ between pin D+ and terminal device are formed between port USB_DM between standby
Another digital signal access Da2 is formed between DP.
It gates at least one analog signal port ANALOG_A and/or ANALOG_B and exports at least one digital signal pin
When the input signal of D+ and/or D-, including at least a digital signal pins and at least in two digital signal pins D+ and D-
Analog signal channel is formed between one analog signal port, for inputting analog signal to terminal device.Illustratively, pin
An analog signal channel L1 is formed between port ANALOG_A between D- and terminal device, between pin D+ and terminal device
Port ANALOG_B between form an analog signal channel L2, wherein four accesses Da1, Da2, L1 and L2 are logical in Fig. 1
Gating unit CH is crossed, certainly, Da1, Da2 can also be only set by gating unit, or only setting L1 and L2 passes through gating unit,
It, can also be only comprising any in L1 or L2 in the circuit wherein since analog signal can be transmitted by a signal path
Or all, above each situation is that simple scheme replacement does not provide attached drawing.
Furthermore, it will be appreciated that terminal belonging to the usb circuit is set when the circuit is used for analog signal transmission
Include one and the matched signaling interface of the usb circuit in standby corresponding external equipment, includes at least in the signaling interface
One analog signal output pin, the analog signal output pin are used for and analog signal channel in above-mentioned usb circuit
The connection of digital signal pin, and analog signal is exported to corresponding digital signal pin.Furthermore the signaling interface can also include
Power pins CC and grounding pin GND, wherein the power pins of the signaling interface and the power pins of usb circuit connect into
Row takes electricity, and specific limit is not done in the grounding pin GND connection of the grounding pin GND and usb circuit of the signaling interface here
It is fixed.
Wherein, gating unit CH can combine for single-pole double-throw switch (SPDT), or the switch combination being made of other components.
Specifically as shown in figure 3, the embodiment provides the first ways of realization of gating unit CH：Work as gating
When unit CH is combined using single-pole double-throw switch (SPDT), the CH of the program may include two groups of single-pole double-throw switch (SPDT)s, wherein single-pole double throw
The common end of switch is connected to digital signal pin, two selection ends of a single-pole double-throw switch (SPDT) be respectively connected to USB_DM and
Two selection ends of ANALOG_A, another single-pole double-throw switch (SPDT) are respectively connected to USB_DP and ANALOG_B, pass through control in this way
Single-pole double-throw switch (SPDT) is catered to, and realizes the selection of digital signal access and analog signal channel.
In addition, as shown in figure 4, second of way of realization of gating unit CH is：Gating unit CH include at least one
One switch subelement, first switch subelement of wherein connecting between digital signal pin and analog signal port, and, two
Second switch subelement, a second switch subelement of wherein connecting between digital signal pin and digital signal port；
When first switch subelement is configured as receiving first control signal, is converted to cut-off transition and/or second opens
Climax unit is converted on state when being configured as receiving first control signal；
When first switch subelement is configured as receiving second control signal, is converted to conducting transition and/or second opens
Climax unit is converted to off state when being configured as receiving second control signal.
Specifically, corresponding every analog signal channel is equal when the circuit is formed with analog signal channel L1 and/or L2
It is in series with first switch subelement, is provided on L1 access as shown in Figure 4 on switch subelement M1, L2 and is provided with switch subelement
M2。
When digital signal pin D+ and/or D- transmission of analogue signal, simultaneous transmission analog signal on digital signal access
To digital signal port, but the amplitude and frequency due to analog signal be all it is random, will not be identified by digital signal port
For any data, therefore digital signal port will not have any response to analog signal, and analog signal will not influence number
The working condition of signal port.But since the partial pressure of digital signal access can cause to decay to the signal of analog signal channel,
To solve this problem, referring to shown in Fig. 4, second switch subelement is provided on every digital signal access Da1 and Da2；When two
The conducting of second switch subelement is controlled by first control signal when the signal of a number signal pins input is digital signal；When
The cut-off of second switch subelement is controlled by second switch signal when the signal of two digital signal pins inputs is analog signal.
As shown in figure 4, being provided with switch subelement M3 on Da1 access, switch subelement M4 is provided on Da2 access.It is simulating in this way
Signal path conducting, digital signal access is ended, and can reduce sound to avoid digital signal access to the partial pressure of analog signal
The decaying of analog signal.Equally, analog signal channel can also be cut by M1 and M2 in D+ and D- transmission digital signal
Only, avoid digital data transmission to analog signal port, so that the noise in analog signal channel is presented on the defeated of terminal device
In out.
In addition, as shown in figure 5, the various ways of realization of the third of gating unit CH are：
Gating unit CH includes switch control subelement CK, at least one first switch subelement, wherein digital signal is drawn
It connects between foot and analog signal port a first switch subelement and two second switch subelements, wherein digital signal
One second switch subelement of series connection between pin and digital signal port；The output end connection first of switch control subelement is opened
The control terminal of climax unit and second switch subelement；
Switch control subelement CK, is connected to the output end of usb signal recognition unit RE, is configured as receiving the first control
When signal processed or second control signal, first switch signal is generated according to first control signal；Alternatively, according to second control signal
Generate second switch signal；
When first switch subelement is configured as receiving first switch signal, is converted to cut-off transition and/or second opens
Climax unit is configured as being converted on state when receiving first switch signal；
When first switch subelement is configured as receiving second switch signal, is converted to conducting transition and/or second opens
Climax unit is configured as being converted to off state when receiving second switch signal
It is provided on L1 access as shown in Figure 5 on switch subelement M1, L2 and is provided with switch subelement M2, on Da1 access
It is provided with switch subelement M3, switch subelement M4 is provided on Da2 access.Wherein each switch subelement is by corresponding switch
Signal control, concrete operating principle is referring to shown in Fig. 4, and which is not described herein again, since switch subelement and usb signal identification are single
Switch control subelement CK is provided between first RE, the control signal that can be generated by usb signal recognition unit RE is indirectly right
Switch subelement controlled, as long as therefore usb signal recognition unit RE generate control signal meet switch control subelement
Signal strength needed for CK logic judgment, the control signal without exporting to usb signal recognition unit RE do special setting,
Usb signal recognition unit RE design complexities are reduced, while can be avoided the output stability and power electricity of control signal
The deficiencies of pressure, influences the working performance of each switch subelement.
In addition, the 4th kind of way of realization of gating unit CH is：Gating unit CH includes that at least one first switch is single
Member, first switch subelement of wherein connecting between digital signal pin and analog signal port.First switch subelement quilt
When being configured to receive first control signal, cut-off transition is converted to, when receiving second control signal, conducting is converted to and turns
State.
In addition, the 5th kind of way of realization of gating unit CH is：Gating unit CH includes switch control subelement CK, at least
One first switch subelement, first switch subelement of wherein connecting between digital signal pin and analog signal port,
The output end of switch control subelement connects first switch subelement control terminal；Switch control subelement CK, is connected to usb signal
The output end of recognition unit RE when being configured as receiving first control signal or second control signal, is believed according to the first control
Number generate first switch signal；Alternatively, generating second switch signal according to second control signal；First switch subelement is configured
When to receive first switch signal, cut-off transition is converted to when receiving second switch signal, is converted to conducting transition.
In addition, the 6th kind of way of realization of gating unit CH is：Gating unit CH includes two second switch subelements,
One second switch subelement of series connection between middle digital signal pin and digital signal port；Second switch subelement is configured as
On state is converted to when receiving first control signal；Off state is converted to when receiving second control signal.
In addition, the 7th kind of way of realization of gating unit CH is：Gating unit CH includes switch control subelement CK, and two
Second switch subelement, a second switch subelement of wherein connecting between digital signal pin and digital signal port；Switch
Control the control terminal of the output end connection second switch subelement of subelement CK；Switch control subelement CK, is connected to usb signal
The output end of recognition unit RE when being configured as receiving first control signal or second control signal, is believed according to the first control
Number generate first switch signal；Alternatively, generating second switch signal according to second control signal；Second switch subelement is configured
To receive on state is converted to when first switch signal when receiving second switch signal and is converted to off state.Wherein
The principle of the 4th kind to the 7th kind of the way of realization of gating unit CH can be no longer superfluous here with reference to Fig. 4,5 corresponding embodiments
It states.
The usb circuit that the embodiment of the present invention provides, two input terminals of usb signal recognition unit are respectively connected to
Two digital signal pins, usb signal recognition unit are configured as detecting that two digital signal pins input signals are moulds
When quasi- signal, first control signal is exported in output end, when detecting input signal is digital signal, in output end output the
Two control signals；The input terminal of gating unit is connected at least one of digital signal pin, and the output end of gating unit connects
It is connected to two digital signal ports and/or at least one analog signal port, the control terminal connection usb signal identification of gating unit
The output end of unit, gating unit are configured as gating at least one analog signal port when receiving first control signal,
And the input signal of at least one digital signal pin is exported, two digital signal ends are gated when receiving second control signal
Mouthful, and the input signal of two digital signal pins is exported respectively；Therefore when two digital pins are used to transmit the number of USB interface
According to packet format digital signal when, can will gate two digital signal ports and export respectively the letter of two digital signal pins
Number, when the digital signal for the data packet format that two digital pins are not used to transmit USB interface, it may be used as analog signal
Transmission, can be by the direct transmission of analogue signal of USB interface to realize.
Specifically, referring to shown in Fig. 6, usb signal recognition unit RE includes：
High resistant input follows unit 11, is connected with two digital signal pins, is configured as receiving two numbers
When the signal of signal pins, to the signal of two digital signal pins carry out voltage follow obtain first follow voltage and second with
Follow voltage and second that voltage is followed to sum to obtain and follow total voltage with voltage, and to first；
Voltage comparison unit 12 connects high resistant input and follows the output end of unit, is configured as following always receiving reception
When voltage, according to the signal for following total voltage to detect two digital signal pins, when the signal of two digital signal pins is mould
First control signal is exported when quasi- signal, the second control of output letter when the signal of two digital signal pins is digital signal
Number；
Optionally, referring to shown in Fig. 7, voltage comparison unit 12 includes：Comparing subunit 121 and delay subelement 122；
Comparing subunit 121 be configured as receive follow total voltage when, according to following total voltage and reference voltage to sentence
Whether the signal of disconnected two digital signal pins is differential signal, defeated when the signal of two digital signal pins is differential signal
First control signal out；Second control signal is exported when the signal of two digital signal pins is non-differential signal；
Postpone subelement 122, is configured as extending the first preset duration output first when receiving first control signal
Control signal；
Or delay subelement 122, it is configured as extending the output of the second preset duration when receiving second control signal
Second control signal.
Wherein, when the digital signal for the data packet format that the signal that D+ and D- is inputted is USB interface, in normal transmission number
Differential signal is constituted according to D+ in the period and D-, therefore above-mentioned preset condition can constitute differential signal for the signal of D+ and D-,
And when transmitting end of data, D+ and D- is low level in the EOP period, unique one end level of D+ and D- differential signal at this time
It is identical, exist and the possibility for following unit 11 to judge by accident is inputted by high resistant, to cause to open analog signal channel L1 and L2 in advance
Situation, and in advance the digital signal access Da1 and Da2 of closing transmission differential signal the case where.
Delay subelement 122 is for solving the above problems, wherein the first preset duration and the second preset duration can pass through
The device property of control delay subelement 122 is pre-configured, the duration requirement in EOP period when transmitting end of data to meet.
Shown in specific reference Fig. 8, the embodiment of the present invention provides a kind of usb circuit, two digital signal pins
Including the first digital signal pin D- and the second digital signal pin D+；
High resistant input follows the unit 11 to include：
The positive input 3 (+) of first transport and placing device U1A, the first transport and placing device U1A passes through the first number of first resistor R1 connection
The reverse input end 2 (-) of signal pins D-, the first transport and placing device U1A pass through the output of the first transport and placing device of second resistance R2 connection U1A
First feeder ear 8 at end 1, the first transport and placing device U1A connects power supply (in illustrative figure by taking 5V as an example), the first transport and placing device U1A's
Second feeder ear 4 is grounded GND；
The positive input 5 (+) of second transport and placing device U2A, the second transport and placing device U2A passes through the second number of 3rd resistor R3 connection
The reverse input end 2 (-) of signal pins D+, the second transport and placing device D- pass through the output of the 4th resistance R4 the second transport and placing device of connection U2A
First feeder ear 8 at end 7, the second transport and placing device U2A connects power supply (in illustrative figure by taking 5V as an example), the second transport and placing device U2A's
Second feeder ear 4 is grounded GND；
The output end 1 and high resistant input that are set to the first transport and placing device U1A follow the 5th electricity between the output end of unit 11
Hinder R5；
The output end 7 and high resistant input that are set to the second transport and placing device U2A follow the 6th electricity between the output end of unit 11
Hinder R6.
Wherein the first above-mentioned transport and placing device U1A and the second transport and placing device U2A, which can integrate to constitute in a chip, has electricity
Pressure follows the voltage follower of function, wherein the first confession of the first feeder ear 8 of the first transport and placing device U1A and the second transport and placing device U2A
Electric end 8 shares, and the second feeder ear 4 of the first transport and placing device U1A and the second feeder ear 8 of the second transport and placing device U2A share.
Comparing subunit 121 includes：
It is defeated that the positive input 5 (+) of hysteresis loop comparator U2B, hysteresis loop comparator U2B by the 7th resistance R7 are connected to high resistant
Enter to follow the output end of unit 11, the positive input 5 (+) of hysteresis loop comparator 12 is also grounded by the 8th resistance R8；Hysteresis ratio
Positive input 5 (+) compared with device U2B is also connected to the output end 7 of hysteresis loop comparator U2B, hysteresis ratio by eleventh resistor R11
Positive input 5 (+) compared with device U2B is also grounded by twelfth resistor R12；The inverting input terminal 6 (-) of hysteresis loop comparator U2B
By the 9th resistance R9 connection power supply, the inverting input terminal 6 (-) of hysteresis loop comparator U2B is also grounded by the tenth resistance R10；It is stagnant
The first feeder ear 8 for returning comparator U2B connects power supply (in illustrative figure by taking 5V as an example), and the second of hysteresis loop comparator U2B supplies
Electric end 4 is grounded GND；
The first capacitor C1 in parallel with the 8th resistance R8；
The second capacitor C2 in parallel with the tenth resistance R10；
The thirteenth resistor being set between the output end 7 of hysteresis loop comparator U2B and the output end of voltage comparison unit 12
R13。
Postponing subelement 122 includes：
The output end of the anode connection voltage comparison unit 12 of first diode D1, first diode D1, first diode
The cathode of D1 is connected to gating unit CH by the 14th resistance R14；
Second diode D2, the anode of the second diode D2 are connected to gating unit CH, and the cathode of the second diode D2 connects
The cathode of first diode D1 is connect, the anode of the second diode D2 is also grounded GND by third capacitor C3, the second diode D2's
Cathode also passes through the 15th resistance R15 ground connection GND.
Switch control subelement CK includes：
The grid of first switch transistor Q1, first switch transistor Q1 are connected to the output end of voltage comparison unit 12,
The source electrode of first switch transistor Q1 is connected to power supply (in illustrative figure by taking 5V as an example) by the 16th resistance R16, and first
The grounded drain GND of switching transistor Q1；
The source electrode of the grid connection first switch transistor Q1 of second switch transistor Q2, second switch transistor Q2, the
The drain electrode of two switching transistor Q2 is grounded by the 17th resistance R17, and the source electrode of second switch transistor Q2 is for exporting first
Switching signal or second switch signal.
Specifically using above-mentioned each switch subelement as switching transistor, i.e. M1-M4 is switching transistor, wherein M1 and M2
High level cut-off is connected for low level, M3 and M4 are that low level cut-off is connected in high level.Q1 and Q2 is high level conducting.And M1
Source electrode and drain electrode be series on analog signal channel L2, what the grid of M1 was used to receive the transmission of switch control subelement first opens
OFF signal or second switch signal；The source electrode and drain electrode of M2 is series on analog signal channel L1, and the grid of M2 is opened for receiving
Close first switch signal or second switch signal that control subelement is sent；The source electrode and drain electrode of M3 is series at digital signal access
On Da2, the grid of M3 is used to receive the first switch signal or second switch signal of the transmission of switch control subelement；The source electrode of M4
With drain series on digital signal access Da1, the grid of M4 is used to receive the first switch letter of switch control subelement transmission
Number or second switch signal；The working principle for the usb circuit that the corresponding embodiment of above-mentioned Fig. 8 provides is described as follows：
Wherein the effect of the functional device other than resistance and capacitor is expressed as follows：
U1A and U1B constitutes high resistant and inputs follower, in order to guarantee to the original electrical of usb circuit circuit
Performance does not impact；U2B constitutes voltage comparator, and received signal is speech simulation signal or USB for identification
The signal of the data packet format of interface；
The effect of D1, D2, Q1, Q2 are that the conducting and cut-off of analog signal channel are controlled by M1 and M2；Pass through M3 and M4
Control the conducting and cut-off of digital signal access.
The speech simulation signal transmitted on USB interface is transferred to late-class circuit in the on-state by M1 and M2, ends shape
The signal of the data packet format transmitted on USB interface is not influenced under state, analog switching ic generation also can be used in M1 and M2
It replaces.The signal of the data packet format transmitted on USB interface is transferred to late-class circuit, off state in the on-state by M3 and M4
Under do not influence the speech simulation signal transmitted on USB interface.
Specific working principle is expressed as follows：
Pin D+ on USB interface and D- is respectively two paths of signals, all the way to be used for transmission the data packet for meeting usb protocol
The signal of format, another kind realize speech simulation signal, and signal and the progress of sound analog signal signal to data packet format
Differentiate.
Wherein, resistance R1-R4 is the peripheral components of transport and placing device U1A, U1B, illustrative R1 and R3 megaohms or more resistance, and
Short as far as possible from port, the resistance value of R2 and R4 should meet the negative-feedback requirement of transport and placing device, in the application without limitation.
When the input signal of usb circuit is to meet the signal of the data packet format of USB transport protocol, signal at this time
For differential signal, the characteristics of according to two signal voltage sums being fixed value, U1A and U1B output end to D+ and D-
The output of signal is simultaneously added through R5 with R6 respectively, and the sum of resulting voltage (following total voltage) should be supply voltage or in power supply
Voltage is nearby swung, the positive input for following total voltage to enter comparator U2B after R7 and R8 partial pressure, and the reverse phase of U2B is defeated
Enter the partial pressure value that end is R10 of the supply voltage through R9, the value for properly adjusting R7~R10 may make to be accorded with when usb circuit inputs
U2B output high level works as input simultaneously because U2B is hysteresis loop comparator when closing the signal of the data packet format of USB transport protocol
Even if signal be when meeting the signal of the data packet format of USB transport protocol the sum of voltage of U1A and U1B near supply voltage
Slight pendulum is it is also ensured that the output of comparator U2B is high level without frequently changing；U2B output high level through R13,
D1, R14 reach Q1, and Q1 conducting, the source electrode ground connection of Q1, Q3 are not turned at this time, and M1 and M2 are turned off at this time, therefore USB interface is defeated
The signal entered cannot be transmitted through M1, M2.When be respectively arranged on two digital signal accesses switch subelement M3 and M4 when, M3 and
M4 conducting, normally exports the signal that USB interface inputs to late-class circuit.
Wherein the effect of D1 and C3 is can to charge through R14 to C3 when U2B output is high level, make the grid electricity of Q1
Position is gradually increasing, and the deadline that the deadline of the adjustable Q2 of appropriate adjustment R14 value adjusts M1, M2 in turn is again unlikely simultaneously
In the transmission performance for influencing usb circuit；When USB data transmission enters the EOP period, although D+ and D- are low electricity
Flat, U2B output is low level, but due to the presence of C3, the grid potential of Q1 does not decline immediately, simultaneously because the presence of D2,
C3 can only be discharged by D2 and R15, and the value for reasonably adjusting C3 can make Q1 at the end of EOP be still on state, EOP
After, next transmission cycle arrival D+ and D- are in differential signalling form again, and U2B continues to output high level, and Q1 continues to keep
Conducting, so no matter the EOP period after data transfer cycle and the data transfer ends, USB transmission is not met to USB transmission
The performance of the signal of the data packet format of agreement, which is constituted, to be influenced.
When the input signal of usb circuit is speech simulation signal：
Since the amplitude of speech simulation signal is typically small and changes in randomness, the output voltage of U1A and U1B
Value will not keep constant value, and under the action of hysteresis loop comparator U2B, U2B output is low level, and D1 is not turned at this time, and C3 is through D2
It discharges with R15, R15, which is set as lesser value, can make the grid voltage of Q1 be dropped rapidly to not on-state, the grid of Q2
Current potential rises to high level, Q2 conducting, and the grid potential of M1, M2 drop to low potential and is connected, at this time speech simulation signal
Late-class circuit can be reached through M1, M2；Even if input signal is larger so that the sum of D+ and D- have reached supply voltage, U2B output becomes
For high level, but due to the presence of C3, the grid potential of Q1 will not rise to conducting voltage immediately, and speech simulation signal is logical
Chang Buhui is in higher level for a long time, and after the level drops back of speech simulation signal is to typical values, U2B still exports low electricity
Flat, Q1 can continue to keep cut-off, and Q2 conducting, so that M1, M2 continue to be connected, speech simulation signal is able to continue to transmit backward.
When being respectively arranged with switch subelement M3 and M4 on two digital signal accesses, M3 and M4 cut-off normally input USB interface
Signal cannot pass through M3 and M4 transmission.
The present invention also provides a kind of terminal devices, including any one of the above USB to make an excuse circuit.
The embodiment of the present invention also provides a kind of signaling interface, including at least one analog signal output pin, wherein mould
Quasi- signal output pin is used to draw with the digital signal of analog signal channel in any usb circuit provided by the above embodiment
Foot connection, and analog signal is exported to corresponding digital signal pin.Furthermore the signaling interface can also include power pins CC
With grounding pin GND, wherein the power pins of the signaling interface and the connection of the power pins of usb circuit carry out taking electricity, should
The grounding pin GND connection of the grounding pin GND and usb circuit of signaling interface, are not specifically limited here.
The embodiment of the present invention also provides a kind of external equipment, including above-mentioned signaling interface.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (17)
1. a kind of usb circuit, which is characterized in that including two digital signal pins, two digital signal ports and at least
One analog signal port；
Two input terminals of usb signal recognition unit, the usb signal recognition unit are respectively connected to described two digital signals
Pin, the usb signal recognition unit are configured as detecting that described two digital signal pin input signals are simulation letters
Number when, output end export first control signal, when detecting input signal is digital signal, output end output second control
Signal processed；
Gating unit, the input terminal of the gating unit is connected at least one of described two digital signal pins, described
The output end of gating unit is connected to described two digital signal ports and/or at least one described analog signal port, described
The control terminal of gating unit connects the output end of the usb signal recognition unit, and the gating unit is configured as receiving
At least one described analog signal port is gated when first control signal, to export the defeated of at least one digital signal pin
Enter signal, described two digital signal ports are gated when receiving second control signal, to export described two numbers respectively
The input signal of signal pins.
2. usb circuit according to claim 1, which is characterized in that the usb signal recognition unit includes：
High resistant input follows unit, is connected with described two digital signal pins, is configured as receiving described two numbers
When the signal of word signal pins, to the signals of described two digital signal pins carry out voltage follow obtain first follow voltage and
Second follows voltage, and follows voltage and second that voltage is followed to sum to obtain and follow total voltage to described first；
Voltage comparison unit connects the output end that high resistant input follows unit, is configured as described following total electricity receiving
When pressure, according to the signal for following total voltage to detect described two digital signal pins, when described two digital signal pins
Signal be analog signal when export first control signal, when the signal of described two digital signal pins be digital signal when it is defeated
Second control signal out.
3. usb circuit according to claim 2, which is characterized in that described two digital signal pins include first
Digital signal pin and the second digital signal pin；
High resistant input follows the unit to include：
The positive input of first transport and placing device, first transport and placing device connects the first digital signal pin, institute by first resistor
The reverse input end for stating the first transport and placing device connects the output end of first transport and placing device, first transport and placing device by second resistance
The first feeder ear connect power supply, first transport and placing device the second feeder ear ground connection；
The positive input of second transport and placing device, second transport and placing device connects the second digital signal pin, institute by 3rd resistor
The reverse input end for stating the second transport and placing device connects the output end of second transport and placing device, second transport and placing device by the 4th resistance
The first feeder ear connect power supply, second transport and placing device the second feeder ear ground connection；
The output end and high resistant input that are set to first transport and placing device follow the 5th resistance between the output end of unit；
The output end and high resistant input that are set to second transport and placing device follow the 6th resistance between the output end of unit.
4. usb circuit according to claim 2, which is characterized in that the voltage comparison unit includes：Compare sub- list
Member and delay subelement；
The comparing subunit be configured as receive it is described follow total voltage when, follow total voltage and benchmark electricity according to described
Pressure judges whether the signal of described two digital signal pins is differential signal, when the signal of described two digital signal pins is
First control signal is exported when differential signal；Second is exported when the signal of described two digital signal pins is non-differential signal
Control signal；
The delay subelement is configured as extending when receiving the first control signal described in the output of the first preset duration
First control signal；
Or the delay subelement, it is configured as extending the output of the second preset duration when receiving the second control signal
The second control signal.
5. usb circuit according to claim 4, which is characterized in that comparing subunit includes：
Hysteresis loop comparator, the positive input of the hysteresis loop comparator are connected to the high resistant input by the 7th resistance and follow list
The output end of member, the positive input of the hysteresis loop comparator also pass through the 8th resistance eutral grounding；The forward direction of the hysteresis loop comparator
Input terminal also passes through the output end that eleventh resistor is connected to the hysteresis loop comparator, the positive input of the hysteresis loop comparator
Also it is grounded by twelfth resistor；The inverting input terminal of the hysteresis loop comparator connects power supply, the hysteresis by the 9th resistance
The inverting input terminal of comparator also passes through the tenth resistance eutral grounding；First feeder ear of the hysteresis loop comparator connects power supply, described
Second feeder ear of hysteresis loop comparator is grounded；
With the first capacitor of the 8th resistor coupled in parallel；
With the second capacitor of the tenth resistor coupled in parallel；
The thirteenth resistor being set between the output end of the hysteresis loop comparator and the output end of the voltage comparison unit.
6. usb circuit according to claim 4, which is characterized in that postponing subelement includes：
First diode, the anode of the first diode connect the output end of the voltage comparison unit, the one or two pole
The cathode of pipe is connected to gating unit by the 14th resistance；
Second diode, the anode of second diode are connected to the gating unit, and the cathode of second diode connects
The cathode of the first diode is connect, the anode of second diode also passes through third capacity earth, second diode
Cathode also pass through the 15th resistance eutral grounding.
7. usb circuit according to claim 2, which is characterized in that the gating unit include at least one first
Switch subelement, first switch subelement of wherein connecting between digital signal pin and analog signal port, and, two
A second switch subelement, second switch of wherein connecting between digital signal pin and digital signal port are single
Member；
When the first switch subelement is configured as receiving first control signal, cut-off transition and/or described the are converted to
Two switch subelements are converted on state when being configured as receiving first control signal；
When the first switch subelement is configured as receiving second control signal, conducting transition and/or described the are converted to
Two switch subelements are converted to off state when being configured as receiving second control signal.
8. usb circuit according to claim 7, which is characterized in that the gating unit further includes switch control
Unit, the control terminal of output end connection the first switch subelement and second switch subelement of switch control subelement；
Switch control subelement is connected to the output end of the usb signal recognition unit, is configured as receiving first control
When signal processed or second control signal, first switch signal is generated according to the first control signal；According to second control
Signal generates second switch signal；
When the first switch subelement is configured as receiving first switch signal, cut-off transition and/or described the are converted to
Two switch subelements are configured as being converted on state when receiving first switch signal；
When the first switch subelement is configured as receiving second switch signal, conducting transition and/or described the are converted to
Two switch subelements are configured as being converted to off state when receiving second switch signal.
9. usb circuit according to claim 2, which is characterized in that the gating unit include at least one first
Switch subelement, first switch subelement of wherein connecting between digital signal pin and analog signal port；
When the first switch subelement is configured as receiving first control signal, cut-off transition is converted to, is receiving
When two control signals, conducting transition is converted to.
10. usb circuit according to claim 9, which is characterized in that the gating unit further includes switch control
Unit, the control terminal of the output end connection first switch subelement of switch control subelement；
Switch control subelement is connected to the output end of the usb signal recognition unit, is configured as receiving first control
When signal processed or second control signal, first switch signal is generated according to the first control signal；According to second control
Signal generates second switch signal；
When the first switch subelement is configured as receiving first switch signal, cut-off transition is converted to, is receiving
When two switching signals, conducting transition is converted to.
11. usb circuit according to claim 2, which is characterized in that the gating unit includes two second switches
Subelement, a second switch subelement of wherein connecting between digital signal pin and digital signal port；
The second switch subelement is converted on state, the second switch when being configured as receiving first control signal
Subelement is converted to off state when being configured as receiving second control signal.
12. usb circuit according to claim 7, which is characterized in that the gating unit further includes switch control
Unit, the control terminal of the output end connection second switch subelement of switch control subelement；
Switch control subelement is connected to the output end of the usb signal recognition unit, is configured as receiving first control
When signal processed or second control signal, first switch signal is generated according to the first control signal；According to second control
Signal generates second switch signal；
The second switch subelement is configured as being converted on state when receiving first switch signal；Receiving second
Off state is converted to when switching signal.
13. according to the described in any item usb circuits of claim 8,10,12, which is characterized in that switch control subelement packet
It includes：
The grid of first switch transistor, the first switch transistor is connected to the output end of the voltage comparison unit, institute
The source electrode for stating first switch transistor is connected to power supply, the grounded drain of the first switch transistor by the 16th resistance；
Second switch transistor, the grid of the second switch transistor connects the source electrode of the first switch transistor, described
The drain electrode of second switch transistor is opened by the 17th resistance eutral grounding, the source electrode of the second switch transistor for exporting first
OFF signal or second switch signal.
14. usb circuit according to claim 13, which is characterized in that above-mentioned each switch subelement is that switch is brilliant
Body pipe.
15. a kind of terminal device, which is characterized in that including the described in any item usb circuits of claim 1-14.
16. a kind of signaling interface, which is characterized in that including at least one analog signal output pin, wherein the analog signal
Output pin is used for, and is believed with the number of analog signal channel described in the described in any item usb circuits of claim 1-14
The connection of number pin, and analog signal is exported to corresponding digital signal pin.
17. a kind of external equipment, which is characterized in that including the signaling interface described in claim 16.
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| CN201610060086.6A CN105740193B (en) | 2016-01-28 | 2016-01-28 | A kind of usb circuit, terminal device, signaling interface and external equipment |
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| CN201610060086.6A CN105740193B (en) | 2016-01-28 | 2016-01-28 | A kind of usb circuit, terminal device, signaling interface and external equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106627857A (en) * | 2017-02-28 | 2017-05-10 | 无锡金洲汽车电子技术有限公司 | Electric bicycle safety fortifying system and method based on single communication line |
| CN107247179A (en) * | 2017-05-03 | 2017-10-13 | 北京世纪龙脉科技有限公司 | A kind of voltage detecting circuit of USB device |
| CN107085401A (en) * | 2017-06-30 | 2017-08-22 | 中广核达胜加速器技术有限公司 | A kind of multifunctional signal Isolation protector |
| CN109286878B (en) * | 2017-07-21 | 2021-08-31 | 中兴通讯股份有限公司 | Signal transmission circuit |
| CN107957698A (en) * | 2017-12-01 | 2018-04-24 | 华侨大学 | A kind of identification circuit and method of control module peripheral circuit |
| CN111092056B (en) * | 2019-07-05 | 2021-08-31 | 珠海艾派克微电子有限公司 | Integrated circuit and chip |
| CN111693754B (en) * | 2019-12-31 | 2023-11-17 | 重庆芯讯通无线科技有限公司 | Device, equipment and method for detecting PIN voltage of communication module |
| CN111509815B (en) * | 2020-05-29 | 2022-02-08 | 维沃移动通信有限公司 | Data line and charging equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1536502A (en) * | 2003-04-03 | 2004-10-13 | 挥 李 | Digital power amplification method using standard serial bus interface and its system |
| CN1805289A (en) * | 2005-12-29 | 2006-07-19 | 北京中星微电子有限公司 | Audio processing system |
| CN104572560A (en) * | 2015-01-26 | 2015-04-29 | 复旦大学无锡研究院 | USB (universal serial bus) and ADC (analog to digital converter) interface multiplex circuit and multiplex method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102231093B1 (en) * | 2012-10-09 | 2021-03-22 | 페어차일드 세미컨덕터 코포레이션 | Data during analog audio |
-
2016
- 2016-01-28 CN CN201610060086.6A patent/CN105740193B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1536502A (en) * | 2003-04-03 | 2004-10-13 | 挥 李 | Digital power amplification method using standard serial bus interface and its system |
| CN1805289A (en) * | 2005-12-29 | 2006-07-19 | 北京中星微电子有限公司 | Audio processing system |
| CN104572560A (en) * | 2015-01-26 | 2015-04-29 | 复旦大学无锡研究院 | USB (universal serial bus) and ADC (analog to digital converter) interface multiplex circuit and multiplex method |
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