CN207124620U - A kind of low harmony wave phase locked source circuit - Google Patents

A kind of low harmony wave phase locked source circuit Download PDF

Info

Publication number
CN207124620U
CN207124620U CN201720977561.6U CN201720977561U CN207124620U CN 207124620 U CN207124620 U CN 207124620U CN 201720977561 U CN201720977561 U CN 201720977561U CN 207124620 U CN207124620 U CN 207124620U
Authority
CN
China
Prior art keywords
amplifier
selecting switch
bandpass filter
output
synthesis unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201720977561.6U
Other languages
Chinese (zh)
Inventor
胡罗林
段麒麟
张华彬
郭天鹏
舒国强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Phase Lock Electronic Technology Co Ltd
Original Assignee
Chengdu Phase Lock Electronic Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Phase Lock Electronic Technology Co Ltd filed Critical Chengdu Phase Lock Electronic Technology Co Ltd
Priority to CN201720977561.6U priority Critical patent/CN207124620U/en
Application granted granted Critical
Publication of CN207124620U publication Critical patent/CN207124620U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

It the utility model is related to a kind of low harmony wave phase locked source circuit, including control unit, synchronous crystal oscillator unit, and first passage frequency synthesis unit, second channel frequency synthesis unit and the third channel frequency synthesis unit being all connected with described control unit and synchronous crystal oscillator unit, the first passage frequency synthesis unit includes two output ports, the different radiofrequency signal of output two-way;The second channel frequency synthesis unit includes an output port, exports Doppler signal all the way;The third channel frequency synthesis unit includes two output ports, exports two-way identical radiofrequency signal.The utility model can meet the signal output of difference in functionality demand by the way of the output of multichannel multi-channel rf signal, and have low cost, integrated, small volume, characteristic low in energy consumption, realize the technical requirements of low spurious and low harmony wave.

Description

A kind of low harmony wave phase locked source circuit
Technical field
It the utility model is related to frequency synthesis field, more particularly to a kind of low harmony wave phase locked source circuit.
Background technology
Phase locked source is a kind of product that output signal and same frequently, with phase the function of input signal are mutually realized by lock, mainly It is used in the communications field and frequency synthesizer field.Phase locked source is mainly realized by two ways at present, and a kind of is to utilize traditional PLL side Method realizes that lock mutually exports, and this spuious harmonic of method can all be suppressed well, but can not realize small step frequency;It is another Kind is then the DDS+PLL methods of present relatively main flow, and this mode can realize small step frequency, but most of spuious harmonic suppressions System is all bad.And many products are all a kind of single designs, cause the narrow feature of the scope of application not strong.If certain product Need to use the phase locked source of difference in functionality simultaneously, then need the phase locked source of difference in functionality, cause waste and the power consumption of small product size Increase.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of low harmony wave phase locked source circuit, using multichannel multichannel The mode of radiofrequency signal output, can meet the signal output of difference in functionality demand, and have low cost, integrated, small volume, work( Low characteristic is consumed, realizes the technical requirements of low spurious and low harmony wave.
The technical scheme that the utility model solves above-mentioned technical problem is as follows:
A kind of low harmony wave phase locked source circuit, including control unit, synchronous crystal oscillator unit, and with described control unit and together First passage frequency synthesis unit, second channel frequency synthesis unit and the third channel frequency synthesis that step crystal oscillator unit is all connected with Unit, the first passage frequency synthesis unit include two output ports, the different radiofrequency signal of output two-way;Described second Channel frequence comprehensive unit includes an output port, exports Doppler signal all the way;The third channel frequency synthesis unit Including two output ports, two-way identical radiofrequency signal is exported.
The beneficial effects of the utility model are:The utility model is due to being integrated with first passage frequency synthesis unit, second Channel frequence comprehensive unit and third channel frequency synthesis unit, five road signals are exported, therefore the scope of application is wider, relative to list One frequency output circuitry, take small volume;Second channel frequency synthesis unit uses Doppler frequency shift technology, and stepping is reachable 10Hz, so that signaling rate is faster, and can also realize low spurious, low harmony wave, it can operate with aircraft, vehicle-mounted, radar Deng the communications field, and it can be extended to broadband frequency synthesizer field.
On the basis of above-mentioned technical proposal, the utility model can also do following improvement.
Further, described control unit includes CPLD chips, and the first ARM cores being all connected with the CPLD chips Piece, the 2nd ARM chips and the 3rd ARM chips.
It is using the above-mentioned further beneficial effect of scheme:Intermediate protocol parsing module is used as by CPLD to carry out agreement Parsing, the data message after parsing is entered in peripheral hardware ARM by serial ports, then each passage is controlled by ARM, and then To desired output signal.
Further, the first passage frequency synthesis unit includes the first phase-locked loop for being sequentially connected, first choice is opened Pass, the first frequency divider, the first attenuator, the first amplifier, the second selecting switch, the second amplifier, the first bandpass filter, Three selecting switch, the 4th selecting switch and the 5th selecting switch, the other end of second selecting switch and the 3rd selecting switch The 3rd amplifier and the second bandpass filter are sequentially connected, the first choice is switched with the other end of the 4th selecting switch successively The second attenuator, the 4th amplifier and the 3rd bandpass filter are connected, the 5th selecting switch exports two paths of signals, wherein one Road signal is directly exported, and another way signal is exported by the 3rd attenuator.
It is using the above-mentioned further beneficial effect of scheme:First passage frequency synthesis unit will receive synchronous crystal oscillator list The X0MHz reference signals of member output, carry out switch selection path, signal can be carried out all the way after phase-locked loop to output signal Scaling down processing, to meet low spurious index, the signal after frequency dividing can carry out path selection by switch again, be entered with different wave filters Row filtering;Another way signal is directly decayed, amplified, filtered, and finally carries out path selection, output power by switch again Small different two-way radiofrequency signal.
Further, the second channel frequency synthesis unit includes the DDS, the second phase-locked loop, the 6th choosing being sequentially connected Select switch, the second frequency divider, the 4th attenuator, the 5th amplifier, the 7th selecting switch, the 6th amplifier, the 4th bandpass filtering Device, the 8th selecting switch, the 9th selecting switch, the other end of the 7th selecting switch and the 8th selecting switch are sequentially connected Seven amplifiers and the 5th bandpass filter, the other end of the 6th selecting switch and the 9th selecting switch are sequentially connected the 5th and declined Subtract device, the 8th amplifier and the 6th bandpass filter, the 9th selecting switch exports signal all the way.
It is using the above-mentioned further beneficial effect of scheme:Second channel frequency synthesis unit will receive synchronous crystal oscillator list The X0MHz reference signals of member output, carry out switch selection path, all the way signal meeting after DDS, phase-locked loop to output signal Scaling down processing is carried out, to meet low spurious index, the signal after frequency dividing can carry out path selection by switch again, with different filtering Device is filtered;Another way signal is directly decayed, amplified, filtered, and finally carries out path selection, output work by switch again Rate Doppler signal.
Further, the DDS output signals are spuious≤- 100dBc frequency range.
It is using the above-mentioned further beneficial effect of scheme:Due to being referred to using DDS output frequencies as phaselocked loop, but by When DDS is exported, there is fixed spurious signal in partial frequency range, in order to meet the final low spurious requirement of product, choose Spuious≤- 100dBc frequency range in DDS output signals, it is achieved thereby that passage output X.XGHz~X.XGHz it is spuious≤- 65dBc, reach the technique effect of low spurious.
Further, the third channel frequency synthesis unit include be sequentially connected phase-locked loop chip, the 6th attenuator and Power splitter;The output end of power splitter one is sequentially connected the 7th attenuator, the 9th amplifier and the 7th bandpass filter, another defeated Go out end and be sequentially connected the 8th attenuator, the tenth amplifier and the 8th bandpass filter.
It is using the above-mentioned further beneficial effect of scheme:Third channel frequency synthesis unit will receive synchronous crystal oscillator list Member output X0MHz reference signals, switch selection path is carried out to output signal after phase-locked loop, respectively through overdamping, After amplification, filtering, power output size identical two-way radiofrequency signal.
Further, first phase-locked loop or the second phase-locked loop include be sequentially connected phase-locked loop chip, the tenth One amplifier, voltage controlled oscillator and bandpass filter, feedback electricity is also associated between the phase-locked loop chip and bandpass filter Road, the feedback circuit include the attenuator and the 12nd amplifier being connected.
Brief description of the drawings
Fig. 1 is Tthe utility model system structure chart;
Fig. 2 is the utility model first passage frequency synthesis unit schematic diagram;
Fig. 3 is the utility model second channel frequency synthesis unit schematic diagram;
Fig. 4 is the utility model third channel frequency synthesis unit schematic diagram;
Fig. 5 is the utility model control unit structure chart.
Embodiment
Principle of the present utility model and feature are described below in conjunction with accompanying drawing, example is served only for explaining this practicality It is new, it is not intended to limit the scope of the utility model.
As shown in figure 1, a kind of low harmony wave phase locked source circuit, including control unit, synchronous crystal oscillator unit, and with the control First passage frequency synthesis unit, second channel frequency synthesis unit and the threeway that unit processed and synchronous crystal oscillator unit are all connected with Road frequency synthesis unit, the first passage frequency synthesis unit include two output ports, the different radio frequency letter of output two-way Number;The second channel frequency synthesis unit includes an output port, exports Doppler signal all the way;The third channel frequency Rate comprehensive unit includes two output ports, exports two-way identical radiofrequency signal.
As shown in Fig. 2 the first passage frequency synthesis unit includes the first phase-locked loop, the first choice being sequentially connected Switch, the first frequency divider, the first attenuator, the first amplifier, the second selecting switch, the second amplifier, the first bandpass filtering Device, the 3rd selecting switch, the 4th selecting switch and the 5th selecting switch, between second selecting switch and the 3rd selecting switch The 3rd amplifier and the second bandpass filter being connected are also associated with, between the first choice switch and the 4th selecting switch It is sequentially connected the second attenuator, the 4th amplifier and the 3rd bandpass filter, the 5th selecting switch output two paths of signals, wherein one Road signal is directly exported, and another way signal is exported by the 3rd attenuator.First passage frequency synthesis unit will receive synchronization The X0MHz reference signals of unit output, into the first phase-locked loop, and there is the corresponding control code of control unit input, make phaselocked loop Radiofrequency signal corresponding to the output of road;Switch selection is carried out by first choice switch to output signal after the first phase-locked loop Path, all the way signal scaling down processing is carried out by the first frequency divider, to meet low spurious index, signal after frequency dividing can again by Second selecting switch carries out path selection, is filtered with different wave filters;Another way signal is directly decayed, amplified, filtered Ripple, finally again by the 4th selecting switch carry out path selection, so as to realize the filtering of different frequency range signal meet low spurious, The requirement of low harmony wave;It is finally that decay output or normally exports radiofrequency signal at radiofrequency signal by the selection of the 5th selecting switch, it is defeated Go out the different two-way radiofrequency signal of watt level.
As shown in figure 3, the second channel frequency synthesis unit include be sequentially connected DDS, the second phase-locked loop, the 6th Selecting switch, the second frequency divider, the 4th attenuator, the 5th amplifier, the 7th selecting switch, the 6th amplifier, the filter of the 4th band logical Ripple device, the 8th selecting switch, the 9th selecting switch, it is also associated with being connected between the 7th selecting switch and the 8th selecting switch The 7th amplifier connect and the 5th bandpass filter, the 5th is sequentially connected between the 6th selecting switch and the 9th selecting switch Attenuator, the 8th amplifier and the 6th bandpass filter, the 9th selecting switch export signal all the way.Using the lock phases of DDS and second Loop integrated mode meets the requirement of output frequency, and size stepping output can be achieved.Simultaneity factor it is spuious mainly defeated by DDS Go out it is spuious, because DDS is arrowband output, it is spuious it is horizontal be about -118dBc, distal end is spuious to be suppressed by SAW filter TA1539, The spuious 100kHz of near-end is suppressed with external loop filter, thus influences can be neglected to caused by loop, ensure that well miscellaneous Dissipate and suppress.Second channel frequency synthesis unit uses DDS output frequencies to be referred to as phaselocked loop to realize Doppler frequency shift, But when being exported due to DDS, there is fixed spurious signal in partial frequency range, and in order to meet that the final low spurious of product will Asking, we have chosen the frequency range of spuious≤- 100dBc in DDS output signals, it is achieved thereby that passage output X.XGHz~ X.XGHz is spuious≤- 65dBc (technical requirement≤- 55dBc).
First passage frequency synthesis unit and second channel frequency synthesis the unit output frequency be X.XGHz~ X.XGHz, but wherein X.XGHz~X.XGHz harmonic signal falls in the range of X.XGHz~X.XGHz, it is final in order to meet Low harmony wave requirement, take the method for X.XGHz~X.XGHz output signal region filterings, final realization output X.XGHz~ X.XGHz harmonic waves≤- 50dBc (technical requirement≤- 40dBc).
As shown in figure 4, the third channel frequency synthesis unit includes phase-locked loop chip, the 6th attenuator being sequentially connected And power splitter, the output end of power splitter one is sequentially connected the 7th attenuator, the 9th amplifier and the 7th bandpass filter, another Output end is sequentially connected the 8th attenuator, the tenth amplifier and the 8th bandpass filter.
As shown in Figure 2 and Figure 3, first phase-locked loop or the second phase-locked loop include the phaselocked loop core being sequentially connected Piece, the 11st amplifier, voltage controlled oscillator and bandpass filter, it is also associated between the phase-locked loop chip and bandpass filter Attenuator and the 12nd amplifier.
As shown in figure 5, described control unit includes CPLD chips, and the first ARM being all connected with the CPLD chips Chip, the 2nd ARM chips and the 3rd ARM chips.Low harmony wave circuit is developed based on CPLD and ARM hardware platform, is led to Crossing CPLD, to carry out protocol analysis, simultaneously transmitting order to lower levels is controlled to other single-chip microcomputers, then by ARM as intermediate protocol parsing module Each passage is made, obtains desired output signal.Wherein, CPLD function can be divided into the function of read-write capability and protocol analysis. Specifically CPLD reads the information of user interface by SPI interface and is parsed the information, by the data message after parsing Entered by serial ports in peripheral hardware ARM;The process of write-in is for user interface, i.e., by SPI interface with using in fact Family interface enters row data communication.
Low harmony wave phase locked source of the present utility model is when entering row line, structure design, it is contemplated that is set including thermal adaptability Meter, three-proof design, the resistance to measures such as design of shaking, have very strong environmental suitability.
Low harmony wave phase locked source external connector of the present utility model is convenient using commonly used in the trade, standard the joint of row Test equipment accesses;Low harmony wave phase locked source is carried out by control interface J30J-25ZK to communicate self-test and basic function self-test, It is preliminary to judge phase-locked loop operation state (locking or losing lock), and warning output by phase locked source feedback control signal;Pass through off line Test (external frequency spectrograph) is tested electrical parameters such as low harmony wave phase locked source power output, frequency spectrum, standing waves;Inside modules are provided with Test point, module depot repair is facilitated to use, great testability.
Low harmony wave phase locked source of the present utility model is modular product, using pluggable connector, quick release, more Change;Internal circuit is cascaded (between reserved using two sides fabric swatch design (non-overlapping structure), modularized circuit unit by high-temperature cable Gap is reasonable, and manual welding instrument is reachable), possess the handling property and accessibility in production, maintenance;Module mounting hole site, Connector possesses error protection ability from differential;Board, Wiring port carry out word silk-screen, can quick despatch, great maintenance Property.
The utility model is selected by the way of the output of multichannel multi-channel rf signal, meets the signal of difference in functionality demand Output, make system that there is the characteristic of inexpensive, integrated miniaturization.Different passages uses different signal generating methods, and It is inconsistent that the amplifier of different passages enables control signal.Only it can just be enabled when from the passage needed, the channel amplifier, Greatly reduce utility model product power consumption.Each passage is filtered using switch to the signal of different frequency range using different wave filters Ripple, system is set to realize low spurious, low harmony wave.Wherein second channel produces signal by the way of DDS+PLL, and DDS is from spuious Minimum frequency range is used for PLL, and not only stepping up to 10Hz, and can realize low spurious, low harmony wave to system.These advantages make this Utility model, which can operate with, is related to the communications field such as aircraft, vehicle-mounted, radar, and can be extended to broadband frequency synthesizer field.
Preferred embodiment of the present utility model is the foregoing is only, it is all in this practicality not to limit the utility model Within new spirit and principle, any modification, equivalent substitution and improvements made etc., guarantor of the present utility model should be included in Within the scope of shield.

Claims (8)

  1. A kind of 1. low harmony wave phase locked source circuit, it is characterised in that including control unit, synchronous crystal oscillator unit, and with the control First passage frequency synthesis unit, second channel frequency synthesis unit and the threeway that unit processed and synchronous crystal oscillator unit are all connected with Road frequency synthesis unit, the first passage frequency synthesis unit include two output ports, the different radio frequency letter of output two-way Number;The second channel frequency synthesis unit includes an output port, exports Doppler signal all the way;The third channel frequency Rate comprehensive unit includes two output ports, exports two-way identical radiofrequency signal.
  2. 2. low harmony wave phase locked source circuit according to claim 1, it is characterised in that described control unit includes CPLD chips, And the first ARM chips, the 2nd ARM chips and the 3rd ARM chips being all connected with the CPLD chips.
  3. 3. low harmony wave phase locked source circuit according to claim 1, it is characterised in that the first passage frequency synthesis unit bag Include the first phase-locked loop being sequentially connected, first choice switch, the first frequency divider, the first attenuator, the first amplifier, the second choosing Switch, the second amplifier, the first bandpass filter, the 3rd selecting switch, the 4th selecting switch and the 5th selecting switch are selected, it is described The other end of second selecting switch and the 3rd selecting switch is sequentially connected the 3rd amplifier and the second bandpass filter, and described first The other end of selecting switch and the 4th selecting switch is sequentially connected the second attenuator, the 4th amplifier and the 3rd bandpass filter, 5th selecting switch exports two paths of signals, wherein signal directly exports all the way, another way signal is defeated by the 3rd attenuator Go out.
  4. 4. low harmony wave phase locked source circuit according to claim 1, it is characterised in that the second channel frequency synthesis unit bag Include the DDS being sequentially connected, the second phase-locked loop, the 6th selecting switch, the second frequency divider, the 4th attenuator, the 5th amplifier, Seven selecting switch, the 6th amplifier, the 4th bandpass filter, the 8th selecting switch, the 9th selecting switch, the 7th selection are opened Close and the other end of the 8th selecting switch be sequentially connected the 7th amplifier and the 5th bandpass filter, the 6th selecting switch and The other end of 9th selecting switch is sequentially connected the 5th attenuator, the 8th amplifier and the 6th bandpass filter, and the 9th selection is opened Close output signal all the way.
  5. 5. low harmony wave phase locked source circuit according to claim 4, it is characterised in that the DDS output signals for it is spuious≤- 100dBc frequency range.
  6. 6. low harmony wave phase locked source circuit according to claim 1, it is characterised in that the third channel frequency synthesis unit bag Include the phase-locked loop chip being sequentially connected, the 6th attenuator and power splitter;The output end of power splitter one is sequentially connected the 7th decay Device, the 9th amplifier and the 7th bandpass filter, another output end are sequentially connected the 8th attenuator, the tenth amplifier and the 8th band Bandpass filter.
  7. 7. low harmony wave phase locked source circuit according to claim 3, it is characterised in that first phase-locked loop includes connecting successively Phase-locked loop chip, the 11st amplifier, voltage controlled oscillator and the bandpass filter connect, the phase-locked loop chip and bandpass filter Between be also associated with feedback circuit, the feedback circuit includes the attenuator and the 12nd amplifier being connected.
  8. 8. low harmony wave phase locked source circuit according to claim 4, it is characterised in that second phase-locked loop includes connecting successively Phase-locked loop chip, the 11st amplifier, voltage controlled oscillator and the bandpass filter connect, the phase-locked loop chip and bandpass filter Between be also associated with feedback circuit, the feedback circuit includes the attenuator and the 12nd amplifier being connected.
CN201720977561.6U 2017-08-07 2017-08-07 A kind of low harmony wave phase locked source circuit Active CN207124620U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720977561.6U CN207124620U (en) 2017-08-07 2017-08-07 A kind of low harmony wave phase locked source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720977561.6U CN207124620U (en) 2017-08-07 2017-08-07 A kind of low harmony wave phase locked source circuit

Publications (1)

Publication Number Publication Date
CN207124620U true CN207124620U (en) 2018-03-20

Family

ID=61613652

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201720977561.6U Active CN207124620U (en) 2017-08-07 2017-08-07 A kind of low harmony wave phase locked source circuit

Country Status (1)

Country Link
CN (1) CN207124620U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107276588A (en) * 2017-08-07 2017-10-20 成都菲斯洛克电子技术有限公司 A kind of low harmony wave phase locked source circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107276588A (en) * 2017-08-07 2017-10-20 成都菲斯洛克电子技术有限公司 A kind of low harmony wave phase locked source circuit

Similar Documents

Publication Publication Date Title
CN109709474B (en) Radio frequency mixed signal integrated circuit test system and test method
CN105071804B (en) A kind of Low phase noise broadband microwave local oscillator source circuit and its implementation method
CN104237905B (en) Big Dipper detector
CN105119671A (en) Multichannel scattering parameter testing circuit and method for complex modulation and phase coherence system
CN105049035B (en) A kind of multi-mode miniaturization Low phase noise broadband point frequency combiner circuit and method
CN105281850A (en) Handheld radio comprehensive tester
CN107239611A (en) A kind of Vector Signal Analysis device and method
CN102364348A (en) Frequency spectrum automatic monitoring analyzer for satellite ground station intermediate-frequency signal
CN207124620U (en) A kind of low harmony wave phase locked source circuit
CN107483049A (en) A kind of broadband frequency agility frequency source
CN106707075A (en) Online electric energy quality monitoring system based on ARM and FPGA
CN208820778U (en) Radio station comprehensive tester
CN202393829U (en) Satellite earth station intermediate frequency signal frequency spectrum automatic monitoring analyzer
CN113259021B (en) Portable automatic receiving and transmitting testing device for aviation radio station
CN106772292A (en) One kind test calibration measure equipment calibration source
CN205071007U (en) Handheld radio comprehensive tester
CN207184459U (en) A kind of broadband frequency agility frequency source
CN107276588A (en) A kind of low harmony wave phase locked source circuit
CN107834998B (en) A kind of broadband orthogonal signalling generation device
CN102664592B (en) Miniature airborne up-converter and manufacturing process thereof
CN101902287A (en) Calibration test system, device and method of receivers
CN209170356U (en) A kind of front end receiver channel
CN209746033U (en) Real-time spectrum analysis module
CN206313757U (en) A kind of Ka frequency ranges low-converter
CN202679345U (en) Ku-band ultra-low phase noise frequency source component

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant