CN207098595U - A kind of output loop interlock system - Google Patents
A kind of output loop interlock system Download PDFInfo
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- CN207098595U CN207098595U CN201721008378.1U CN201721008378U CN207098595U CN 207098595 U CN207098595 U CN 207098595U CN 201721008378 U CN201721008378 U CN 201721008378U CN 207098595 U CN207098595 U CN 207098595U
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Abstract
This practicality discloses a kind of output loop interlock system, including signal receiving circuit, control relay circuit and signal interlock circuit, the signal receiving circuit control relay control loop, control relay circuit output end connects signal interlock circuit, pull down resistor R25 and triode Q2 is provided with signal receiving circuit, triode Q2 grounded emitter, pull down resistor R25 are connected with triode Q2 base stage, and triode Q2 colelctor electrode is electrically connected with relay control coil one end；Circuit is realized in the interlocking of this output loop, the output loop signal of forward conduction can not only be utilized, feedback control reverse control signal loop, positive lock reverse control signal, the output loop signal of reverse-conducting can also be utilized, feedback control forward direction control signal loop, positive lock forward direction control signal, avoids short-circuit risks.
Description
Technical field
This practicality is related to crane motor control technology field, more particularly to a kind of output loop interlock system.
Background technology
With the continuous progress of motor control industry, motor control is positive intelligent, and can communicate continuous development.In order to protect
Crane system it is safe for operation, it is to be ensured that the operation of controlled motor uses in crane controller is extremely reliable, and this just needs
There is electric interlock (interlocking) inside controller.
Controlled motor in the market is mostly tradition machinery electrical equipment, does not possess interlock function, partly realizes interlock function
And realize that this interlock method is implemented to have certain limitations in equipment at the scene by outside increase interlocking control device, so
Need to design a kind of control loop interlocking, in the case where being not added with external interlock control device, realize internal output interlocking control,
Control loop is avoided short-circuit fault risk occur.
Utility model content
The defects of this practical purpose is to overcome existing control apparatus, there is provided a kind of output loop interlock system, with solution
The problem of being proposed in certainly above-mentioned background technology.
To achieve the above object, this practicality employs following technical scheme：
A kind of output loop interlock system, including signal receiving circuit, control relay circuit and signal interlock circuit, institute
Signal receiving circuit control relay control loop, control relay circuit output end connection signal interlock circuit are stated, signal connects
Receive and pull down resistor R25 and triode Q2 is provided with circuit, triode Q2 grounded emitter, pull down resistor R25 and triode Q2
Base stage connection, triode Q2 colelctor electrode is electrically connected with relay control coil one end；The control relay circuit includes
Diode D5 and relay K2, diode D5 are connected in parallel on the both ends of relay control coil, and the one of the relay control coil
End electrical connection triode Q2, the other end electric connection of power supply positive pole DC24+ of control coil；Relay K2 output ends one end connects
Positive source DC24+, the output end other end are electrically connected with signal interlock circuit, and the signal interlock circuit includes FET
Q4, resistance R33 and resistance R35, resistance R33 one end are electrically connected contact relay K2 output ends, resistance R33 other end connection field effect
Should pipe Q4 grid, FET Q4 grid is also connected with resistance R35 and is connected to FET Q4 source electrode, and is grounded；Field-effect
Pipe Q4 drain electrode connection another way signal receiving circuit, forms interlock circuit.
As the further scheme of this practicality：The model 1N4007 of the diode D5.
As the further scheme of this practicality：One end of the relay control coil connects power supply by DC24V+ interfaces
Positive pole.
As the further scheme of this practicality：The base stage electrical connection inter_forward interfaces of the triode Q2.
As the further scheme of this practicality：One end electrical connection FET Q4 of resistance R35 grid (G) pole, electricity
Hinder R35 other end electrical connection FET Q4 source (S) pole.
Compared with prior art, this practical beneficial effect：This output loop interlocks another way signal receiving circuit, can not only
Utilize the output loop signal of forward conduction, feedback control reverse control signal loop, positive lock reverse control signal, moreover it is possible to
Using the output loop signal of reverse-conducting, feedback control forward direction control signal loop, positive lock forward direction control signal, avoid
Two-way simultaneously turns on to form short-circuit fault risk.
Brief description of the drawings
Fig. 1 is this practical integrated circuit theory diagram；
Fig. 2 is this practical signal receiving circuit figure；
Fig. 3 is this practical control relay circuit figure；
Fig. 4 is this practical signal interlock circuit figure.
In figure：1- signal receiving circuits；2- control relay circuits；21- relay control coils；3- signals interlocking electricity
Road.
Embodiment
Below in conjunction with the accompanying drawing in this practical embodiment, the technical scheme in this practical embodiment is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only this practical part of the embodiment, rather than whole embodiments.It is based on
Embodiment in this practicality, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of this practicality protection.
Refer to Fig. 1-4, in this practical embodiment, circuit, including signal receiving circuit are realized in a kind of output loop interlocking
1st, control relay circuit 2 and signal interlock circuit 3, signal receiving circuit 1 are electrically connected with signal by control relay circuit 2
Interlock circuit 3, it is provided with resistance R25 and triode Q2, triode Q2 grounded emitter, drop-down in signal receiving circuit 1
Resistance R25 is connected with triode Q2, and triode Q2 base stage electrical connection inter_forward interfaces, inter_forward connects
Mouth access signal, triode Q2 colelctor electrode are electrically connected with control relay circuit 2；Control relay circuit 2 includes diode
D5 and relay K2, diode D5 model 1N4007, model 1N4007 diode D5 have stronger positive surge
Ability to bear, diode D5 are connected in parallel on the both ends of relay control coil 21, and one end of coil 21 is connected by DC24V+ interfaces
Positive source, one end electrical connection triode Q2 of coil 21, the other end of coil 21 electrically connect DC24V+ with output end one end and connect
Mouth connection positive source, relay K2 output ends one end are electrically connected with signal interlock circuit 3, and the signal interlock circuit 3 includes
FET Q4, resistance R33 and resistance R35, resistance R33 one end are electrically connected contact relay K2, resistance R33 other end connection
FET Q4 grid, FET Q4 grid also connects connection resistance R35 and is connected to FET Q4 source electrode, and is grounded；
Effect pipe Q4 drain electrode even joins another way signal receiving circuit, forms interlock circuit.
The interlocking of this output loop is realized in circuit, when inter_forward interfaces do not have signal, is drawn by pull down resistor R25
It is low, it is not turned on triode Q2, relay K2 is failure to actuate, and output loop does not export, and forward does not have signal, by resistance
R33 and resistance R35 electric resistance partial pressures, FET Q4 are not turned on, and inter_reverse does not influence.
When inter_forward has high level signal, the Q2 conductings of control triode, after triode Q2 conductings, forward_
OUT signal is pulled low, and relay K2 driving coils 21 form loop, relay K2 actions, output loop output, DC24V+ are believed
Number forward is imported, forward has signal, by resistance R33 and resistance R35 partial pressures, FET Q4 conductings, inter_
Reverse is dragged down, and it is low level to pin inter_reverse signals.
After relay K2 conductings, by DC24V+ signal outputs to forward；After forward obtains signal, pass through resistance
R33 and resistance R35 partial pressures, it is input to FET Q4, driving FET Q4 conductings；, will after FET Q4 conductings
Inter_reverse signals drag down, and locking inter_reverse signals are low level；If the input of inter_reverse signals is high
Level signal, in the case that scene effect pipe Q4 is held on, unsteady state operation realizes interlock function into low level.
In summary：Circuit is realized in the interlocking of this output loop, can not only utilize the output loop signal of forward conduction, feedback
Control reverse control signal loop, positive lock reverse control signal, moreover it is possible to utilize the output loop signal of reverse-conducting, feedback
Positive control signal loop is controlled, positive lock forward direction control signal, avoids short-circuit risks.
It is obvious to a person skilled in the art that this practicality is not limited to the details of above-mentioned one exemplary embodiment, Er Qie
In the case of without departing substantially from this practical spirit or essential attributes, this practicality can be realized in other specific forms.Therefore, no matter
From the point of view of which point, embodiment all should be regarded as exemplary, and be nonrestrictive, this practical scope is by appended power
Profit requires rather than described above limits, it is intended that all in the implication and scope of the equivalency of claim by falling
Change is included in this practicality.Any reference in claim should not be considered as to the involved claim of limitation.
Moreover, it will be appreciated that although the present specification is described in terms of embodiments, not each embodiment is only wrapped
Containing an independent technical scheme, this narrating mode of specification is only that those skilled in the art should for clarity
Using specification as an entirety, the technical solutions in the various embodiments may also be suitably combined, forms those skilled in the art
It is appreciated that other embodiment.
Claims (5)
1. a kind of output loop interlock system, including signal receiving circuit (1), control relay circuit (2) and signal interlocking electricity
Road (3), signal receiving circuit (1) the control relay control circuit, control relay circuit (2) output end connection signal are mutual
Lock circuit (3), is provided with pull down resistor R25 and triode Q2 in signal receiving circuit (1), triode Q2 grounded emitter, under
Pull-up resistor R25 is connected with triode Q2 base stage, and triode Q2 colelctor electrode is electrically connected with relay control coil one end；It is described
Control relay circuit (2) includes diode D5 and relay K2, and diode D5 is connected in parallel on the two of relay control coil (21)
End, one end electrical connection triode Q2 of the relay control coil (21), the other end electric connection of power supply of control coil (21)
Positive pole DC24+；Relay K2 output ends one end connects positive source DC24+, and the output end other end is electrically connected with signal interlocking electricity
Road (3), the signal interlock circuit (3) include FET Q4, resistance R33 and resistance R35, resistance R33 one end electrical connection
Relay K2 output ends, resistance R33 other end connection FET Q4 grid, FET Q4 grid are also connected with resistance
R35 is connected to FET Q4 source electrode, and is grounded；FET Q4 drain electrode connection another way signal receiving circuit, is formed mutual
Lock circuit.
A kind of 2. output loop interlock system according to claim 1, it is characterised in that：The model of the diode D5
1N4007。
A kind of 3. output loop interlock system according to claim 1, it is characterised in that：One end of the coil (21) leads to
Cross DC24V+ interfaces connection power supply.
A kind of 4. output loop interlock system according to claim 1, it is characterised in that：The base stage electricity of the triode Q2
Connect inter_forward interfaces.
A kind of 5. output loop interlock system according to claim 1, it is characterised in that：One end electricity of the resistance R35
Connect FET Q4 G poles, resistance R35 other end electrical connection FET Q4 S poles.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721008378.1U CN207098595U (en) | 2017-08-11 | 2017-08-11 | A kind of output loop interlock system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721008378.1U CN207098595U (en) | 2017-08-11 | 2017-08-11 | A kind of output loop interlock system |
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| Publication Number | Publication Date |
|---|---|
| CN207098595U true CN207098595U (en) | 2018-03-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201721008378.1U Active CN207098595U (en) | 2017-08-11 | 2017-08-11 | A kind of output loop interlock system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109004625A (en) * | 2017-08-11 | 2018-12-14 | 上海英奇电气科技有限公司 | A kind of output loop interlock system |
-
2017
- 2017-08-11 CN CN201721008378.1U patent/CN207098595U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109004625A (en) * | 2017-08-11 | 2018-12-14 | 上海英奇电气科技有限公司 | A kind of output loop interlock system |
| CN109004625B (en) * | 2017-08-11 | 2024-03-19 | 上海英奇电气科技有限公司 | Output loop interlocking system |
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