CN109004625B - Output loop interlocking system - Google Patents

Output loop interlocking system Download PDF

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Publication number
CN109004625B
CN109004625B CN201710689728.3A CN201710689728A CN109004625B CN 109004625 B CN109004625 B CN 109004625B CN 201710689728 A CN201710689728 A CN 201710689728A CN 109004625 B CN109004625 B CN 109004625B
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Prior art keywords
circuit
signal
resistor
relay
interlocking
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CN201710689728.3A
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CN109004625A (en
Inventor
林乐
林羽
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Shanghai Inchi Electrical Technology Co ltd
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Shanghai Inchi Electrical Technology Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/08Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors
    • H02H7/097Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors against wrong direction of rotation

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Abstract

The invention discloses an output loop interlocking system, which comprises a signal receiving circuit, a relay control circuit and a signal interlocking circuit, wherein the signal receiving circuit controls the relay control loop, the output end of the relay control circuit is connected with the signal interlocking circuit, and a pull-down resistor R25, a triode Q2 and a triode Q2 are arranged in the signal receiving circuit; the relay control circuit comprises a diode D5 and a relay K2, the diode D5 and the signal interlocking circuit comprises a field effect transistor Q4, a resistor R33 and a resistor R35. The output loop interlocking system can utilize forward conducted output loop signals, feedback control reverse control signal loops and forcedly lock reverse control signals, and can also utilize reverse conducted output loop signals, feedback control forward control signal loops and forcedly lock forward control signals, so that short circuit risks are avoided.

Description

Output loop interlocking system
Technical Field
The invention relates to the technical field of crane motor control, in particular to a semiconductor switch output loop interlocking system.
Background
With the continuous progress of the motor control industry, the motor control is forward intelligent, and communication can be continuously developed. To ensure that the controller used in the crane to control the motor operates very reliably, it is necessary to have an electrical interlock (interlock) inside the controller in order to protect the operation safety of the crane system.
At present, most of control motors in the market are traditional mechanical and electrical appliances, have no interlocking function, and part of the interlocking function is realized by adding an interlocking control device externally, and the interlocking method is limited in implementation in field equipment, so that control loop interlocking needs to be designed, internal output interlocking control is realized under the condition that the external interlocking control device is not added, and the risk of short-circuit faults of the control loop is avoided.
Disclosure of Invention
The invention aims to overcome the defects of the prior control electric appliance and provide an output loop interlocking system so as to solve the problems in the background technology.
In order to achieve the above purpose, the invention adopts the following technical scheme:
the output loop interlocking system comprises a signal receiving circuit, a relay control circuit and a signal interlocking circuit, wherein the signal receiving circuit controls the relay control loop, the output end of the relay control circuit is connected with the signal interlocking circuit, a pull-down resistor R25 and a triode Q2 are arranged in the signal receiving circuit, the emitter of the triode Q2 is grounded, the pull-down resistor R25 is connected with the base of the triode Q2, and the collector of the triode Q2 is electrically connected with one end of a relay control coil; the relay control circuit comprises a diode D5 and a relay K2, wherein the diode D5 is connected in parallel with two ends of a relay control coil, one end of the relay control coil is electrically connected with a triode Q2, and the other end of the relay control coil is electrically connected with a power supply anode DC & lt24+ > one end of the output end of the relay K2 is connected with a power supply anode DC24+, the other end of the output end is electrically connected with a signal interlocking circuit, the signal interlocking circuit comprises a field effect tube Q4, a resistor R33 and a resistor R35, one end of the resistor R33 is electrically connected with the output end of the relay K2, the other end of the resistor R33 is connected with the grid electrode of the field effect tube Q4, the grid electrode of the field effect tube Q4 is also connected with the resistor R35 to be connected with the source electrode of the field effect tube Q4, and the signal interlocking circuit is grounded; the drain electrode of the field effect transistor Q4 is connected with another path of signal receiving circuit to form an interlocking circuit.
As a further scheme of the invention: the model of the diode D5 is 1N4007.
As a further scheme of the invention: one end of the relay control coil is connected with the positive electrode of the power supply through a DC24V+ interface.
As a further scheme of the invention: the base of the triode Q2 is electrically connected with an inter_forward interface.
As a further scheme of the invention: one end of the resistor R35 is electrically connected with the gate (G) electrode of the field effect transistor Q4, and the other end of the resistor R35 is electrically connected with the source (S) electrode of the field effect transistor Q4.
Compared with the prior art, the invention has the beneficial effects that: the output loop is interlocked with the other path of signal receiving circuit, so that not only can the forward conduction output loop signal be utilized to feedback control the reverse control signal loop and forcedly lock the reverse control signal, but also the reverse conduction output loop signal can be utilized to feedback control the forward control signal loop and forcedly lock the forward control signal, thereby avoiding the risk of short circuit fault caused by the simultaneous conduction of two paths.
Drawings
FIG. 1 is a schematic block diagram of the overall circuit of the present invention;
FIG. 2 is a diagram of a signal receiving circuit according to the present invention;
FIG. 3 is a relay control circuit diagram of the present invention;
fig. 4 is a signal interlock circuit diagram of the present invention.
In the figure: 1-a signal receiving circuit; 2-relay control circuit; 21-a relay control coil; 3-signal interlock circuitry.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-4, in an embodiment of the present invention, an output loop interlocking system includes a signal receiving circuit 1, a relay control circuit 2 and a signal interlocking circuit 3, wherein the signal receiving circuit 1 is electrically connected to the signal interlocking circuit 3 through the relay control circuit 2, a next resistor R25 and a triode Q2 are arranged in the signal receiving circuit 1, an emitter of the triode Q2 is grounded, a pull-down resistor R25 is connected with the triode Q2, a base of the triode Q2 is electrically connected with an inter_forward interface, the inter_forward interface is connected with a signal, and a collector of the triode Q2 is electrically connected with the relay control circuit 2; the relay control circuit 2 comprises a diode D5 and a relay K2, the model number of the diode D5 is 1N4007, the diode D5 has stronger forward surge bearing capacity, the diode D5 is connected in parallel with two ends of a relay control coil 21, one end of the coil 21 is connected with a power supply positive electrode through a DC24V+ interface, one end of the coil 21 is electrically connected with a triode Q2, the other end of the coil 21 is electrically connected with one end of an output end of the coil and is connected with the DC24V+ interface and is connected with the power supply positive electrode, one end of the output end of the relay K2 is electrically connected with a signal interlocking circuit 3, the signal interlocking circuit 3 comprises a field effect transistor Q4, a resistor R33 and a resistor R35, one end of the resistor R33 is electrically connected with the relay K2, the other end of the resistor R33 is connected with the grid electrode of the field effect transistor Q4, the grid electrode of the field effect transistor Q4 is also connected with a connecting resistor R35 to the source electrode of the field effect transistor Q4 and grounded; the drain electrode of the field effect transistor Q4 is connected with another signal receiving circuit to form an interlocking circuit.
In the output loop interlocking system, when an inter_forward interface has no signal, a pull-down resistor R25 is pulled down to enable a triode Q2 to be non-conductive, a relay K2 does not act, an output loop does not output, forward has no signal, voltage is divided through a resistor R33 and a resistor R35, a field effect transistor Q4 is non-conductive, and inter_reverse is not affected.
When the inter_forward has a high level signal, the control triode Q2 is conducted, after the triode Q2 is conducted, the forward_OUT signal is pulled down, the relay K2 drives the coil 21 to form a loop, the relay K2 acts, the output loop outputs, the DC24V+ signal is led into the forward, the forward has a signal, the voltage is divided by the resistor R33 and the resistor R35, the field effect tube Q4 is conducted, the inter_reverse is pulled down, and the inter_reverse signal is locked to be at a low level.
After the relay K2 is conducted, a DC24V+ signal is output to forward; after forward obtains a signal, the signal is divided by a resistor R33 and a resistor R35 and is input into a field effect transistor Q4 to drive the field effect transistor Q4 to be conducted; after the field effect transistor Q4 is conducted, the inter-reverse signal is pulled down, and the inter-reverse signal is locked to be at a low level; if the inter_reverse signal inputs a high level signal, the field effect transistor Q4 is forcibly converted into a low level under the condition of keeping on, thereby realizing the interlocking function.
To sum up: the output loop interlocking system can utilize forward conducted output loop signals, feedback control reverse control signal loops and forcedly lock reverse control signals, and can also utilize reverse conducted output loop signals, feedback control forward control signal loops and forcedly lock forward control signals, so that short circuit risks are avoided.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art.

Claims (1)

1. The output loop interlocking system comprises a signal receiving circuit, a relay control circuit and a signal interlocking circuit, wherein the signal receiving circuit controls the relay control loop, the output end of the relay control circuit is connected with the signal interlocking circuit, a pull-down resistor R25 and a triode Q2 are arranged in the signal receiving circuit, the emitter of the triode Q2 is grounded, the pull-down resistor R25 is connected with the base of the triode Q2, and the collector of the triode Q2 is electrically connected with one end of a relay control coil; the relay control circuit comprises a diode D5 and a relay K2, wherein the diode D5 is connected in parallel with two ends of a relay control coil, one end of the relay control coil is electrically connected with a triode Q2, and the other end of the relay control coil is electrically connected with a power supply anode DC & lt24+ > one end of the output end of the relay K2 is connected with a power supply anode DC24+, the other end of the output end is electrically connected with a signal interlocking circuit, the signal interlocking circuit comprises a field effect tube Q4, a resistor R33 and a resistor R35, one end of the resistor R33 is electrically connected with the output end of the relay K2, the other end of the resistor R33 is connected with the grid electrode of the field effect tube Q4, the grid electrode of the field effect tube Q4 is also connected with the resistor R35 to be connected with the source electrode of the field effect tube Q4, and the signal interlocking circuit is grounded; the drain electrode of the field effect transistor Q4 is connected with another path of signal receiving circuit to form an interlocking circuit;
the model of the diode D5 is 1N4007;
the base of the triode Q2 is electrically connected with an inter_forward interface.
CN201710689728.3A 2017-08-11 2017-08-11 Output loop interlocking system Active CN109004625B (en)

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Application Number Priority Date Filing Date Title
CN201710689728.3A CN109004625B (en) 2017-08-11 2017-08-11 Output loop interlocking system

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Application Number Priority Date Filing Date Title
CN201710689728.3A CN109004625B (en) 2017-08-11 2017-08-11 Output loop interlocking system

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CN109004625B true CN109004625B (en) 2024-03-19

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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2519903A1 (en) * 1975-05-03 1976-11-04 Daimler Benz Ag DRIVE ARRANGEMENT FOR MOTOR VEHICLES, IN PARTICULAR FOR PASSENGER CARS, WITH AN INDEPENDENT TRANSMISSION
GB1461328A (en) * 1973-04-17 1977-01-13 Ford Motor Co Synchromesh device for the reverse gear of a motor vehicle gearbox
US5164694A (en) * 1991-04-25 1992-11-17 Westinghouse Electric Corp. Mechanical interlock for a pair of electromagnetic switches
CN2744064Y (en) * 2004-07-26 2005-11-30 刘琼 Controller for electric machine
CN101860288A (en) * 2010-05-20 2010-10-13 郑贵林 Intelligent controller for three-phase motor
CN202178731U (en) * 2011-08-23 2012-03-28 中国北车股份有限公司大连电力牵引研发中心 Motor positive and negative rotation interlocking device
CN102594223A (en) * 2011-12-20 2012-07-18 殷晨钟 Positive and negative rotation control module for motor
CN102723932A (en) * 2012-06-15 2012-10-10 北京鼎汉技术股份有限公司 Interlocking circuit and interlocking system comprising same
CN102991359A (en) * 2012-12-10 2013-03-27 天津市松正电动汽车技术股份有限公司 Electric vehicle controller with braking interlocking
CN103944466A (en) * 2014-05-17 2014-07-23 国家电网公司 Direct-current motor positive/negative rotation control circuit
CN205490282U (en) * 2016-04-18 2016-08-17 黑龙江工业学院 Motor control circuit that is just reversing
CN106849014A (en) * 2017-03-23 2017-06-13 马鞍山工蜂智能科技有限公司 A kind of motor safety controls circuit system
CN207098595U (en) * 2017-08-11 2018-03-13 上海英奇电气科技有限公司 A kind of output loop interlock system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102664568B (en) * 2012-04-23 2014-12-24 库顿电子科技(上海)有限公司 Novel solid-state relay aiming at running direction control of three-phase alternating current motor and method

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1461328A (en) * 1973-04-17 1977-01-13 Ford Motor Co Synchromesh device for the reverse gear of a motor vehicle gearbox
DE2519903A1 (en) * 1975-05-03 1976-11-04 Daimler Benz Ag DRIVE ARRANGEMENT FOR MOTOR VEHICLES, IN PARTICULAR FOR PASSENGER CARS, WITH AN INDEPENDENT TRANSMISSION
US5164694A (en) * 1991-04-25 1992-11-17 Westinghouse Electric Corp. Mechanical interlock for a pair of electromagnetic switches
CN2744064Y (en) * 2004-07-26 2005-11-30 刘琼 Controller for electric machine
CN101860288A (en) * 2010-05-20 2010-10-13 郑贵林 Intelligent controller for three-phase motor
CN202178731U (en) * 2011-08-23 2012-03-28 中国北车股份有限公司大连电力牵引研发中心 Motor positive and negative rotation interlocking device
CN102594223A (en) * 2011-12-20 2012-07-18 殷晨钟 Positive and negative rotation control module for motor
CN102723932A (en) * 2012-06-15 2012-10-10 北京鼎汉技术股份有限公司 Interlocking circuit and interlocking system comprising same
CN102991359A (en) * 2012-12-10 2013-03-27 天津市松正电动汽车技术股份有限公司 Electric vehicle controller with braking interlocking
CN103944466A (en) * 2014-05-17 2014-07-23 国家电网公司 Direct-current motor positive/negative rotation control circuit
CN205490282U (en) * 2016-04-18 2016-08-17 黑龙江工业学院 Motor control circuit that is just reversing
CN106849014A (en) * 2017-03-23 2017-06-13 马鞍山工蜂智能科技有限公司 A kind of motor safety controls circuit system
CN207098595U (en) * 2017-08-11 2018-03-13 上海英奇电气科技有限公司 A kind of output loop interlock system

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