CN206991157U - A kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations - Google Patents
A kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations Download PDFInfo
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- CN206991157U CN206991157U CN201720878436.XU CN201720878436U CN206991157U CN 206991157 U CN206991157 U CN 206991157U CN 201720878436 U CN201720878436 U CN 201720878436U CN 206991157 U CN206991157 U CN 206991157U
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Abstract
The utility model embodiment discloses a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations, solve existing harmonic power source can only separate unit use and can not be worked asynchronously with more other instruments and can not arbitrarily define the technical problem of triggering moment.The utility model embodiment includes：DSP, DDS, digital analog converter, power amplifier；DSP includes waveform output RAM, waveform control RAM, timer, pi regulator；Waveform output RAM, digital analog converter, power amplifier are sequentially connected, and DDS output end is connected between waveform output RAM and digital analog converter, and DDS input is connected with waveform control RAM；The input of timer is used to obtain external pulse, and the output end of timer is connected with pi regulator, and pi regulator is also connected with waveform control RAM.
Description
Technical field
Electrical Measuring Instrument field of instrumentation technology is the utility model is related to, more particularly to a kind of outer pulse based on DDS regulations is touched
Send out synchronized harmonics power source.
Background technology
Generally, the current signal of power network, from a wire by being changed into 5A or 1A rated secondary currents after current transformer,
It is sent to electric energy meter or harmonic electric energy meter coordinates voltage measurement to be used to measure.But conventional current transformer test is due to primary current
Greatly, separate unit instrument can not be tested, and cause the problem of harmonic wave of a transformer can not obtain examination always.Meanwhile if
Need in the case of various harmonic waves electric energy carry out accurately test, it is necessary to harmonic power source can and external meters synchronous working,
The electric energy error of the accurate standard of comparison electric energy meter of ability and tested electric energy meter.
The technology that general single-phase or three phase harmonic power source uses has three kinds, and one kind is by DSP (or other processors)
By controlling D/A to export, realize that waveform exports, one kind is that also one kind is controlled by DMA using FPGA control D/A outputs
D/A output, three kinds of D/A is exported to be exported under clock control internally, and internal clock is from DSP and FPGA
Master clock divides.The control of the lock-out pulse of outside can not be received.
To sum up, existing single-phase or three phase harmonic power source has two shortcomings：One be exactly can only single device use, no
The synchronism output of multiple-harmonic power source can be realized by the same pulse-triggered of outside；Another is can not be the same similar to oscillograph
At the time of definition triggering.Therefore, a kind of harmonic power source for the triggering moment that any definition can be achieved is needed badly, and available for more
The cascade of instrument, to realize the synchronism detection with external meters.
Utility model content
The utility model embodiment discloses a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations, solves
Existing harmonic power source can only separate unit use and can not be worked asynchronously with more other instruments and can not arbitrarily define triggering
The technical problem at moment.
The utility model embodiment provides a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations, including：
DSP, DDS, digital analog converter, power amplifier；
DSP includes waveform output RAM, waveform control RAM, timer, pi regulator；
Waveform output RAM, digital analog converter, power amplifier are sequentially connected, and DDS output end is connected to waveform output
Between RAM and digital analog converter, DDS input is connected with waveform control RAM；
The input of timer is used to obtain external pulse, and the output end of timer is connected with pi regulator, pi regulator
Also it is connected with waveform control RAM.
Alternatively, waveform output RAM includes first waveform output RAM, the second waveform output RAM；
Digital analog converter includes the first digital analog converter, the second digital analog converter；
Power amplifier includes current power amplifier, voltage power amplifier；
First waveform output RAM, the first digital analog converter, current power amplifier are sequentially connected；
Second waveform output RAM, the second digital analog converter, voltage power amplifier are sequentially connected.
Alternatively, in addition to：First synchronous serial interface and the second synchronous serial interface；
First waveform exports and is also associated with the first synchronous serial interface between RAM and the first digital analog converter；
Second waveform exports and is also associated with the second synchronous serial interface between RAM and the second digital analog converter；
DDS output end is connected between the first synchronous serial interface and the first digital analog converter and the second synchronous serial interface and second
Between digital analog converter.
Alternatively, connected between first waveform output RAM and the first synchronous serial interface by dma bus；
Second waveform exports to be connected between RAM and the second synchronous serial interface by dma bus.
Alternatively, DSP also includes frequency divider；
Timer is also connected with frequency divider.
Alternatively, in addition to first crystal, frequency divider are connected with first crystal, defeated for the frequency division of the frequency to first crystal
Go out.
Alternatively, in addition to the second crystal, DDS are also connected with the second crystal, defeated for the frequency division of the frequency to the second crystal
Go out.
As can be seen from the above technical solutions, the utility model embodiment has advantages below：
The utility model embodiment provides a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations, including：
DSP, DDS, digital analog converter, power amplifier；DSP includes waveform output RAM, waveform control RAM, timer, pi regulator；
Waveform output RAM, digital analog converter, power amplifier are sequentially connected, and DDS output end is connected to waveform output RAM and digital-to-analogue
Between converter, DDS input is connected with waveform control RAM；The input of timer is used to obtain external pulse, timer
Output end be connected with pi regulator, pi regulator also with waveform control RAM be connected.DDS is set by increasing in the present embodiment
And pi regulator, the external pulse that timer is received is exported to DDS by the adjustment control of pi regulator, and through DDS's
Frequency division of the frequency exports the drive waveforms for drive waveforms output RAM so that waveform exports RAM automatically by waveform through digital-to-analogue conversion
Device is exported to power amplifier, realizes the continuous output of waveform, by pi regulator and DDS cooperation, realizes harmonic wave work(
Rate source synchronizes output under the control of external pulse, available for more harmonic power sources under same outer Pulse Width Control
Parallel opertation, expand the scope of High-current output, other instruments can also be coordinated to realize synchro measure and control function, solved
Existing harmonic power source can only separate unit use and when can not be worked asynchronously with more other instruments and can not arbitrarily define triggering
The technical problem at quarter.
Brief description of the drawings
, below will be to embodiment in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art
Or the required accompanying drawing used is briefly described in description of the prior art, it should be apparent that, drawings in the following description are only
It is some embodiments of the utility model, for those of ordinary skill in the art, before creative labor is not paid
Put, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations that the utility model embodiment provides
One embodiment structural representation；
Fig. 2 is a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations that the utility model embodiment provides
Another embodiment structural representation；
Fig. 3 is a kind of concrete structure schematic diagram for DDS that the utility model embodiment provides；
Fig. 4 is a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations that the utility model embodiment provides
Specific control process schematic diagram.
Embodiment
The utility model embodiment discloses a kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations, solves
Existing harmonic power source can only separate unit use and can not be worked asynchronously with more other instruments and can not arbitrarily define triggering
The technical problem at moment.
A kind of referring to Fig. 1, outer pulse-triggered synchronized harmonics based on DDS regulations provided in the utility model embodiment
One embodiment of power source includes：
DSP 12, DDS 10, digital analog converter 6, power amplifier 7；
DSP 12 includes waveform output RAM 4, waveform control RAM 8, timer 3, pi regulator 15；
Waveform output RAM 4, digital analog converter 6, power amplifier 7 are sequentially connected, and DDS 10 output end is connected to ripple
Shape is exported between RAM 4 and digital analog converter 6, and DDS 10 input is connected with waveform control RAM 8；
The input of timer 3 is used to obtain external pulse, and the output end of timer 3 is connected with pi regulator 15, and PI is adjusted
Section device 15 is also connected with waveform control RAM 8.
DDS 10 and pi regulator 15 are set by increasing in the present embodiment, the external pulse that timer 3 is received is led to
The adjustment control for crossing pi regulator 15 is exported to DDS 10, and the frequency division of the frequency through DDS 10 is exported and exported for drive waveforms
RAM 4 drive waveforms so that waveform output RAM 4 automatically exports waveform to power amplifier 7 through digital analog converter 6,
Realize the continuous output of waveform, by pi regulator 15 and DDS 10 cooperation, realize harmonic power source in external pulse
Control under synchronize output, available for the Parallel opertation under same outer Pulse Width Control in more harmonic power sources, expand electricity
The scope of output is flowed, other instruments can also be coordinated to realize synchro measure and control function, solve existing harmonic power
Source can only separate unit use and can not be worked asynchronously with more other instruments and can not arbitrarily define the technical problem of triggering moment.
A kind of referring to Fig. 2, outer pulse-triggered synchronized harmonics based on DDS regulations provided in the utility model embodiment
One embodiment of power source includes：
DSP 12, DDS 10, the first digital analog converter 6a, the second digital analog converter 6b, current power amplifier 7a, voltage
Power amplifier 7b, first crystal 1, the second crystal 11；
Wherein DSP 12 is built-in with first waveform output RAM (RAM1) 4a, the second waveform output RAM (RAM2) 4b, waveform
Control RAM (RAM3) 8 and the first synchronous serial interface (SPORT1) 5a, the second synchronous serial interface (SPORT2) 5b, the 3rd synchronous serial interface
(SPORT3)9。
DDS 10 input controls RAM 8 to be connected by the 3rd synchronous serial interface 9 with waveform, for receiving waveform control
RAM 8 control output.DDS 10 another input is also connected with the second crystal 11 (frequency 20M), and DDS 10 is one
High-resolution frequency divider, the frequency of the second crystal 11 directly can be carried out any frequency dividing and exported, rate-adaptive pacemaker value
Fout=1/ (N) * fin, N scope are 1 arbitrary value for arriving (232-1), and fin is the signal output of the second crystal 11, works as DSP
12 under the control of pi regulator 15 and when outside pulse input reaches synchronous, and waveform control RAM 8 value can be kept substantially
It is stable.
Specifically, the DSP in the utility model can use ADSP-BF609Blackfin processors, built in the processor
It is first waveform output RAM 4a, the second waveform output RAM 4b, waveform control RAM 8, the first synchronous serial interface 5a, second synchronous
Serial ports 5b, timer 3, frequency divider 2, pi regulator 15.Frequency divider 2 is connected with the first crystal 1 of outside, meanwhile, frequency divider 2 is also
It is connected with timer 3, for providing frequency；One end of timer 3 receives external pulse, and the other end is connected with pi regulator 15,
The other end of pi regulator 15 is connected with waveform control RAM 8, for controlling the synchronous serial interfaces 9 of RAM 8 and the 3rd to control by waveform
The output driving waveforms of DDS 10 processed.In addition, AD5545 can be used in the first digital analog converter 6a and the second digital analog converter 6b
16Bit D/A conversion chips.
Voltage power amplifier 7b is realized by using series negative feedback, and alternating current-direct current output can be achieved and band is wider than
1MHz, the +/- 200V of working power can realize exchange 100V output, and current power amplifier 7a maximum output current 15A can
Realize alternating current-direct current 10A output.
AD9852 chips can be used to realize that concrete structure is as shown in figure 3, DDS 10 can be real for DDS 10 in the utility model
The clock division of second crystal 11 is now output to first for the clock frequency of setting by the frequency setting value of the 3rd synchronous serial interface 9
Synchronous serial interface 5a SCLK1, the second synchronous serial interface 5b SCLK2 on.
In order to make it easy to understand, below with reference to concrete application example in the utility model embodiment based on DDS regulations
The operation principle of outer pulse-triggered synchronized harmonics power source is specifically described.
In the utility model embodiment, the Wave data that first waveform output RAM 4a are set by DSP 12 is same by first
Serial ports 5a is walked under the control of outside clock sclk 1, first waveform is exported automatically RAM 4a Wave data, passes through the first number
Weighted-voltage D/A converter 6a is output on current power amplifier 7a, realizes the output of harmonic current waveforms.First waveform output RAM 4a
Wave data will automatically in order circulation be output on the first digital analog converter 6a, realize the continuous output of waveform.Meanwhile by
DSP 12 set the second waveform output RAM 4b Wave data by the second synchronous serial interface 5b outside clock sclk 2 control
Under, the second waveform is exported automatically RAM 4b Wave data, voltage power is output to by the second digital analog converter 6b and amplified
On device 7b, the output of harmonic voltage waveform is realized.Second waveform output RAM 4b Wave data will circulate defeated in order automatically
Go out onto the second digital analog converter 6b, realize the continuous output of waveform.
Specifically, the specific of outer pulse-triggered synchronized harmonics power source based on DDS regulations in the utility model controlled
Journey is as shown in Figure 4, exports RAM 4a or the second waveform output RAM 4b PTR position in first waveform at the time of triggering is set
Put with outside pulse input rising edge synch (i.e. the waveform length of voltage or electric current be as and synchronous averaging, so PTR
The storage that exports RAM 4a and the second waveform output RAM 4b of position and first waveform waveform values it is relevant, its voltage and current
Synchronization can be always maintained at), DSP 12 sets DMA and waveform is exported RAM 4a and the second waveform output RAM from first waveform automatically
4b is automatically sent to the first digital analog converter 6a and the second digital analog converter by the first synchronous serial interface 5a and the second synchronous serial interface 5b
6b, the rising edge of a pulse time T1 of timer 3 is read every 20ms DSP 12, reads RAM1 4a DMA pointer DMAPTR1,
The conversion time TConv for DMAPTR1 being multiplied by a D/A is calculated as T2, and the triggering moment PTR of calculation procedure setting is multiplied by a D/
A conversion time TConv is calculated as T3, T3 and T2 is sent into the positive and negative terminal of the first error device 14, and the output of the first error device 14 is
T4, T4=T2-T3, the positive and negative terminal of the second error device 13, the second error device 13 are inputted using T1 and T4 as the error of pi regulator
Control errors inputs of the difference T5 of output as the PI algorithms in DSP 12, selecting suitable error value of magnification P, (P is by work
Journey experience obtains), error value of magnification P negative (time is opposite with frequency) is multiplied with T5 and adds a DSP 12 setting
DDS frequency, as this DSP 12 setting DDS 10 frequency, repeatedly after, the output error of the first error device 14 is most
It is small, and exported at the time of now setting triggering in first waveform RAM 4a or the second waveform output RAM 4b PTR position and
External pulse is just synchronous.
Arbitrarily divided by 32Bit high-resolution using DDS in the utility model embodiment to the first synchronous serial interface 5a,
Output speed on second synchronous serial interface 5b SCLK1 and SCLK2 is accurately controlled, so as to control the frequency of the waveform of output
Rate, by DSP 12 PI algorithms, ensure that the wave setting value of output and outside signal are synchronous.And the first synchronous serial interface 5a,
Second synchronous serial interface 5b SCLK1, SCLK2 is under the control of DDS output clocks, the address pointer of the waveform of RAM D/A conversions
The frequency of DMAPTR1 and DMAPTR2 increasing velocity and DDS output clock is directly proportional.During the timer rising edge of pulse detection
Between (detect rising edge to the time read) plus the addresses of waveform of the triggering moment D/A conversions that subtract RAM of setting to refer to
Pin DMAPTR1 and the time product of DMAPTR2 and D/A conversion difference, at every 20ms (about cycle), pass through reading
Timer Register and DMA pointer registers is taken to be compared, when difference is just, suitable error ratio to be set by pi regulator
Example value of magnification, allows DDS output frequency to slow down, and when difference is negative, sets suitable error rate value by pi regulator, allows
DDS output frequency is speeded.
A kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations provided by the utility model is carried out above
It is discussed in detail, for those of ordinary skill in the art, according to the thought of the utility model embodiment, in embodiment
And there will be changes in application, in summary, this specification content should not be construed as to limitation of the present utility model.
Claims (7)
- A kind of 1. outer pulse-triggered synchronized harmonics power source based on DDS regulations, it is characterised in that including：DSP, DDS, digital analog converter, power amplifier；The DSP includes waveform output RAM, waveform control RAM, timer, pi regulator；The waveform output RAM, the digital analog converter, the power amplifier are sequentially connected, the output end connection of the DDS Exported in the waveform between RAM and the digital analog converter, the input of the DDS is connected with waveform control RAM；The input of the timer is used to obtain external pulse, and the output end of the timer is connected with the pi regulator, The pi regulator is also connected with waveform control RAM.
- 2. the outer pulse-triggered synchronized harmonics power source according to claim 1 based on DDS regulations, it is characterised in that institute Stating waveform output RAM includes first waveform output RAM, the second waveform output RAM；The digital analog converter includes the first digital analog converter, the second digital analog converter；The power amplifier includes current power amplifier, voltage power amplifier；The first waveform output RAM, first digital analog converter, the current power amplifier are sequentially connected；The second waveform output RAM, second digital analog converter, the voltage power amplifier are sequentially connected.
- 3. the outer pulse-triggered synchronized harmonics power source according to claim 2 based on DDS regulations, it is characterised in that also Including：First synchronous serial interface and the second synchronous serial interface；First synchronous serial interface is also associated between the first waveform output RAM and first digital analog converter；Second synchronous serial interface is also associated between the second waveform output RAM and second digital analog converter；The output end of the DDS is connected between first synchronous serial interface and first digital analog converter and described second same Walk between serial ports and second digital analog converter.
- 4. the outer pulse-triggered synchronized harmonics power source according to claim 3 based on DDS regulations, it is characterised in that institute State and connected between first waveform output RAM and first synchronous serial interface by dma bus；Connected between the second waveform output RAM and second synchronous serial interface by dma bus.
- 5. the outer pulse-triggered synchronized harmonics power source according to claim 1 based on DDS regulations, it is characterised in that institute State DSP and also include frequency divider；The timer is also connected with the frequency divider.
- 6. the outer pulse-triggered synchronized harmonics power source according to claim 5 based on DDS regulations, it is characterised in that also Including first crystal, the frequency divider is connected with the first crystal, for the frequency division of the frequency output to the first crystal.
- 7. the outer pulse-triggered synchronized harmonics power source according to claim 1 based on DDS regulations, it is characterised in that also Including the second crystal, the DDS is also connected with second crystal, for the frequency division of the frequency output to second crystal.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110460321A (en) * | 2019-08-16 | 2019-11-15 | 中国工程物理研究院应用电子学研究所 | Parallel pulse power source drives the structure of diode and corresponds to high-power microwave source |
| CN111665377A (en) * | 2020-06-05 | 2020-09-15 | 国网福建省电力有限公司 | Remote phase-locking synchronous standard source |
-
2017
- 2017-07-19 CN CN201720878436.XU patent/CN206991157U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110460321A (en) * | 2019-08-16 | 2019-11-15 | 中国工程物理研究院应用电子学研究所 | Parallel pulse power source drives the structure of diode and corresponds to high-power microwave source |
| CN110460321B (en) * | 2019-08-16 | 2024-01-05 | 中国工程物理研究院应用电子学研究所 | Structure of parallel pulse power source driving diode and corresponding high-power microwave source |
| CN111665377A (en) * | 2020-06-05 | 2020-09-15 | 国网福建省电力有限公司 | Remote phase-locking synchronous standard source |
| CN111665377B (en) * | 2020-06-05 | 2023-05-05 | 国网福建省电力有限公司 | Remote phase-locked synchronous standard source |
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