CN204065387U - A kind of synchronous demodulator and comprise the power standard source of this synchronous demodulator - Google Patents
A kind of synchronous demodulator and comprise the power standard source of this synchronous demodulator Download PDFInfo
- Publication number
- CN204065387U CN204065387U CN201420498886.2U CN201420498886U CN204065387U CN 204065387 U CN204065387 U CN 204065387U CN 201420498886 U CN201420498886 U CN 201420498886U CN 204065387 U CN204065387 U CN 204065387U
- Authority
- CN
- China
- Prior art keywords
- internal memory
- input end
- output terminal
- mcu
- synchronous demodulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The synchronous demodulator that the utility model provides a kind of structure to simplify, comprises cosine generator, forcing function generator, the first internal memory, MCU, the second internal memory and the 3rd internal memory; Cosine generator and forcing function generator are set up in parallel, and both output terminals are all connected with the input end of the first internal memory; The output terminal of the first internal memory is connected with the first input end of MCU; Second input end of MCU is connected with the output terminal of the 3rd internal memory; The output terminal of MCU is connected with the input end of the second internal memory; Digital signal processor DSP is provided with in MCU.Second object of the present utility model is to provide a kind of power standard source, comprise the input panel for setting amplitude, frequency and phase place, controller, power amplifier, load, current probe or voltage probe, A/D transducer and synchronous demodulator described above, apply power standard source of the present utility model, regulate and control method is simplified, sampling time is short, calculated amount is little, faster system response.
Description
Technical field
The utility model relates to the correcting device field of frequency-conversion variable, especially, relates to a kind of synchronous demodulator and comprises the power standard source of this synchronous demodulator.
Background technology
Frequency converter, as the power supply of frequency conversion speed-adjusting system, is applied increasingly extensive.The loss of the how loss of Measurement accuracy frequency converter, efficiency and variable-frequency motor and efficiency are variable-frequency control technique key subjects urgently to be resolved hurrily.
The metering of electric energy is the major issue being directly connected to national economy, and the precision of its stoichiometric level directly reflects the height of a national industrial level.The metering of electric energy mainly comprises the metering of the phase angle of voltage, the amplitude of electric current, frequency and voltage and electric current and power etc., and main various voltage, electric current, frequency and power sensor and the instrument of relying on is measured.Power standard source is then produce normal voltage, electric current, frequency and the power signal standard level measuring apparatus in order to calibration voltage, electric current, frequency and power sensor and instrument.
There are two kinds of account forms in conventional power source: (1) virtual value method, adopts effective value to measure output, then feeds back to controller, this mode only for pure sinusoidal wave time effective, and for the electric energy metrical of frequency conversion, error is large; (2) discrete fourier (DFT) converter technique, this kind of method can calculate the amplitude of each harmonic in the electric energy metrical of frequency conversion, frequency and phase place, but its sampling time is long, and calculated amount is large, system responses is slow, and amplitude and phase place are also by the Accuracy of Frequency point.
Therefore, design a kind of amplitude of each harmonic that can accurately calculate in the electric energy metrical of frequency conversion, frequency and phase place, there is again the power standard source that calculated amount is little, system response is fast significant.
Utility model content
First object of the present utility model is to provide a kind of synchronous demodulator, and concrete technical scheme is as follows:
A kind of synchronous demodulator, comprises cosine generator, forcing function generator, the first internal memory, MCU, the second internal memory and the 3rd internal memory;
Described cosine generator and described forcing function generator are set up in parallel, and both output terminals are all connected with the input end of described first internal memory; The output terminal of described first internal memory is connected with the first input end of described MCU; Second input end of described MCU is connected with the output terminal of described 3rd internal memory; The output terminal of described MCU is connected with the input end of described second internal memory; Digital signal processor DSP is provided with in described MCU.
Synchronous demodulator one-piece construction of the present utility model is simplified, and adopts complete digital signal processing mode, processes, improve the precision resolving signal amplitude and phase place to signal complete cycle; Synchronous demodulator can produce a series of cosine and sinusoidal data according to setpoint frequency, thus realizes synchronously regulating the amplitude of first-harmonic and each harmonic, phase place and frequency, practical; MCU is provided with digital signal processor DSP, and adopt digital signal processor DSP to carry out accurate Calculation, the sampling time is short, and calculated amount is little, faster system response.
Second object of the present utility model is to provide a kind of power standard source, comprises the input panel for setting amplitude, frequency and phase place, controller, power amplifier, load, current probe or voltage probe, A/D transducer and synchronous demodulator described above;
Described controller comprises PID regulator and DDS controller;
The output terminal of described input panel is connected with the input end of the first input end of described PID regulator, the input end of described cosine generator and described forcing function generator respectively; The output terminal of described second internal memory is connected with the second input end of described PID regulator;
The output terminal of described PID regulator is connected with the input end of described DDS controller, and the output terminal of described DDS controller is connected with the input end of described power amplifier, and the output terminal of described power amplifier is connected with the input end of described load;
Described current probe or voltage probe are arranged on the circuit that described power amplifier is connected with described load; The output terminal of described current probe or voltage probe is connected with the input end of described A/D transducer, and the output terminal of described A/D transducer is connected with the input end of described 3rd internal memory.
Power standard source of the present utility model does not adopt conventional current/voltage transmitter as the mode of feedback, but inside is integrated with corresponding signal processing module, makes system become compacter; After adopting inner integrated mode, can make full use of other Given information of system, information such as such as " setpoint frequencies ", this just creates condition for the method for employing synchronous demodulation.
The mode of synchronous demodulation is adopted in power standard source of the present utility model, the mode of relative DFT, it only calculates corresponding amplitude and phase place etc. to the signal fed back in " setpoint frequency " (system needs), instead of all goes to resolve without exception, therefore greatly reduces calculated amount.
Power standard source of the present utility model comprises input panel for setting amplitude, frequency and phase place, controller, power amplifier, load, current probe or voltage probe, A/D transducer and synchronous demodulator, controller comprises PID regulator and DDS controller, synchronous demodulator comprises cosine generator, forcing function generator, the first internal memory, MCU, the second internal memory and the 3rd internal memory, and one-piece construction is simplified; Synchronous demodulator comprises cosine generator, forcing function generator, can produce a series of cosine and sinusoidal data according to setpoint frequency, thus realizes synchronously regulating the amplitude of first-harmonic and each harmonic, phase place and frequency, practical; MCU is provided with digital signal processor DSP, and adopt digital signal processor DSP to carry out accurate Calculation, the sampling time is short, and calculated amount is little, faster system response.
Except object described above, feature and advantage, the utility model also has other object, feature and advantage.Below with reference to figure, the utility model is described in further detail.
Accompanying drawing explanation
The accompanying drawing forming a application's part is used to provide further understanding of the present utility model, and schematic description and description of the present utility model is for explaining the utility model.In the accompanying drawings:
Fig. 1 is the structural representation of the synchronous demodulator of the utility model embodiment 1;
Fig. 2 is the one-piece construction schematic diagram in the power standard source of the utility model embodiment 2;
Fig. 3 is the composition diagram of the composite signal in the utility model embodiment 2;
1-input panel, 2-controller, 21-PID regulator, 22-DDS controller, 3-power amplifier, 4-load, 5-current probe or voltage probe, 6-A/D transducer, 7-synchronous demodulator, 71-cosine generator, 72-forcing function generator, 73-first internal memory, 74-MCU, 75-second internal memory, 76-the 3rd internal memory.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail, but the multitude of different ways that the utility model can limit according to claim and cover is implemented.
Embodiment 1:
A kind of synchronous demodulator, refers to Fig. 1, specifically comprises cosine generator 71, forcing function generator 72, first internal memory 73, MCU74, the second internal memory 75 and the 3rd internal memory 76.
Described cosine generator 71 is set up in parallel with described forcing function generator 72, and both output terminals are all connected with the input end of described first internal memory 73; The output terminal of described first internal memory 73 is connected with the first input end of described MCU74; Second input end of described MCU74 is connected with the output terminal of described 3rd internal memory 76; The output terminal of described MCU74 is connected with the input end of described second internal memory 75; Digital signal processor DSP is provided with in described MCU74.
The control method of above-mentioned synchronous demodulator comprises the following steps:
The first step: described cosine generator 71 and described forcing function generator 72 produce two signal matrix X according to the frequency of operation f of setting
1with matrix X
2, and by matrix X
1with matrix X
2be stored in described first internal memory 73;
Second step: described 3rd internal memory 76 receive extraneous A/D transducer carry out digitizing after data y
n;
3rd step: the digital signal processor DSP in described MCU74 reads the data matrix X in described first internal memory 73 and described 3rd internal memory 76
1, matrix X
2and Yn (data content of Yn and y
ndata content identical), calculate amplitude A and the phase place Φ of first-harmonic and each harmonic according to formula respectively, and be stored in described second internal memory 75;
Wherein, described matrix X
1expression formula be: X
1=cos (2 π kfn △ t), its expansion is:
Described matrix X
2expression formula be X
2=sin (2 π kfn △ t), its expansion is:
Wherein, k=1,2 ..., K; N=1,2 ..., N;
Above-mentioned K is the most higher harmonics number of times that user requires; Above-mentioned N is the data volume of a signal period sampling; Above-mentioned △ t is the sampling period.
Described digital signal processor DSP according to formula 1.-4. calculate amplitude A and the phase place Φ of first-harmonic and each harmonic, described formula 1.-4. as follows:
AR＝[ar
1,ar
2,…,ar
k,…,ar
K-1,ar
K]＝2YX
1/N ①；
AI＝[ai
1,ai
2,…,aik,…,ai
K-1,ai
K]＝2YX
2/N ②；
a
k＝(ar
2+ai
2)
1/2 ③；
Wherein, Y=[y
1, y
2..., y
n..., y
n];
A=[a
1, a
2..., a
k..., a
k-1, a
k], a
1, a
2..., a
k..., a
k-1, a
kcorresponding first-harmonic is to the amplitude of K subharmonic respectively;
corresponding first-harmonic is to the phase place of K subharmonic respectively.
The one-piece construction of the synchronous demodulator of the present embodiment is simplified, its control methods are compared with DFT control methods, it only calculates corresponding amplitude and phase place etc. to the signal fed back in " setpoint frequency " (system needs), instead of all go to resolve, therefore greatly reduce calculated amount. without exception
Embodiment 2:
A kind of power standard source, refers to Fig. 2.
Specifically comprise the input panel 1 for setting amplitude, frequency and phase place, controller 2, power amplifier 3, load 4, current probe or voltage probe 5, A/D transducer 6 and synchronous demodulator 7, one-piece construction is simplified.
Described controller 2 comprises PID regulator 21 and DDS controller 22, described synchronous demodulator 7 comprises cosine generator 71, forcing function generator 72, first internal memory 73, MCU74, the second internal memory 75 and the 3rd internal memory 76, described cosine generator 71 is set up in parallel with described forcing function generator 72, and both output terminals are all connected with the input end of described first internal memory 73.
The output terminal of described first internal memory 73 is connected with the first input end of described MCU74, and second input end of described MCU74 is connected with the output terminal of described 3rd internal memory 76, and the output terminal of described MCU74 is connected with the input end of described second internal memory 75.
Described MCU74 is provided with digital signal processor DSP.
The output terminal of described input panel 1 is connected with the input end of the first input end of described PID regulator 21, the input end of described cosine generator 71 and described forcing function generator 72 respectively.
The output terminal of described second internal memory 75 is connected with the second input end of described PID regulator 21.
The output terminal of described PID regulator 21 is connected with the input end of described DDS controller 22, and the output terminal of described DDS controller 22 is connected with the input end of described power amplifier 3, and the output terminal of described power amplifier 3 is connected with the input end of described load 4.
Described current probe or voltage probe 5 are arranged on the circuit that described power amplifier 3 is connected with described load 4; The output terminal of described current probe or voltage probe 5 is connected with the input end of described A/D transducer 6, and the output terminal of described A/D transducer 6 is connected with the input end of described 3rd internal memory 76.
Described load 4 is current transducer or voltage transmitter.
The specific works principle in the utility model power standard source is as follows:
Frequency of operation f in input panel 1 established standards source, amplitude A s and phase place Φ s; The amplitude A that controller 2 feeds back according to synchronous demodulator 7 and the difference between phase place Φ and setting value, according to the controlled quentity controlled variable v that the control rate of PID regulator 21 produces, the DDS controller 22 controlling its inside produces signal u; U is zoomed into U and outputs to load 4 by power amplifier 3; U is dwindled into signal y (t) by current probe or voltage probe 5 by a certain percentage; Signal y (t) carries out being digitized as y by A/D transducer 6
nafter, the digital signal processor DSP in synchronous demodulator 7 on MCU74 carries out amplitude A and the phase place Φ that related operation obtains power source, and feeds back to controller 2.
In said process, to carry out the detailed process of related operation as follows for digital signal processor DSP: cosine generator 71 and forcing function generator 72 produce two signal matrix X according to the frequency f of setting
1and X
2and be stored in the first internal memory 73; Digital signal processor DSP in MCU74 reads data in the first internal memory 73 and the 3rd internal memory 76, according to formula 1.-4. calculate amplitude A and the phase place Φ of first-harmonic and each harmonic respectively, wherein A and Φ is row vector, element is corresponding in turn to the first-harmonic successively amplitude of harmonic wave and phase place, and be stored in the second internal memory 75, wait for the reading of controller 2.
Concrete control method comprises the following steps:
The first step: by frequency of operation f, amplitude A s and the phase place Φ s in described input panel 1 established standards source;
Second step: the amplitude A that described controller 2 feeds back according to synchronous demodulator 7 and the difference between phase place Φ and setting value, according to the controlled quentity controlled variable v that the control rate of described PID regulator 21 produces, control described DDS controller 22 and produce signal u;
3rd step: u is zoomed into U and outputs to described load 4 by described power amplifier 3;
4th step: U is dwindled into signal y (t) by described current probe or voltage probe 5 by a certain percentage;
5th step: signal y (t) carries out being digitized as y by described A/D transducer 6
nafter, after described synchronous demodulator 7, obtain amplitude A and the phase place Φ of power source, and feed back to described PID regulator 21;
The concrete control method of described synchronous demodulator 7 is as follows:
The first step: described cosine generator 71 and described forcing function generator 72 produce two signal matrix X according to the frequency of operation f that described input panel 1 sets
1with matrix X
2, and by matrix X
1with matrix X
2be stored in described first internal memory 73; Second step: described 3rd internal memory 76 receive described A/D transducer 6 carry out digitizing after data y
n; 3rd step: the digital signal processor DSP in described MCU74 reads the data matrix X in described first internal memory 73 and described 3rd internal memory 76
1, matrix X
2and Yn (data content of Yn and y
ndata content identical), calculate amplitude A and the phase place Φ of first-harmonic and each harmonic according to formula respectively, and be stored in described second internal memory 75.
Wherein, described matrix X
1expression formula be: X
1=cos (2 π kfn △ t), its expansion is:
Described matrix X
2expression formula be X
2=sin (2 π kfn △ t), its expansion is:
Wherein, k=1,2 ..., K; N=1,2 ..., N;
Above-mentioned K is the most higher harmonics number of times that user requires; Above-mentioned N is the data volume of a signal period sampling; Above-mentioned △ t is the sampling period;
Described digital signal processor DSP according to formula 1.-4. calculate amplitude A and the phase place Φ of first-harmonic and each harmonic, described formula 1.-4. as follows:
AR＝[ar
1,ar
2,…,ar
k,…,ar
K-1,ar
K]＝2YX
1/N ①；
AI＝[ai
1,ai
2,…,ai
k,…,ai
K-1,ai
K]＝2YX
2/N ②；
a
k＝(ar
2+ai
2)
1/2 ③；
Wherein, Y=[y
1, y
2..., y
n..., y
n]; A=[a
1, a
2..., a
k..., a
k-1, a
k], a
1, a
2..., a
k..., a
k-1, a
kcorresponding first-harmonic is to the amplitude of K subharmonic respectively;
corresponding first-harmonic is to the phase place of K subharmonic respectively.
Power standard source of the present utility model comprises input panel, controller, power amplifier, load, current probe or voltage probe, A/D transducer and synchronous demodulator, controller comprises PID regulator and DDS controller, synchronous demodulator comprises cosine generator, forcing function generator, the first internal memory, MCU, the second internal memory and the 3rd internal memory, and one-piece construction is simplified; Synchronous demodulator comprises cosine generator, forcing function generator, can produce a series of cosine and sinusoidal data according to setpoint frequency, thus realizes synchronously regulating the amplitude of first-harmonic and each harmonic, phase place and frequency, practical; MCU is provided with digital signal processor DSP, and adopt digital signal processor DSP to calculate, the sampling time is short, and calculated amount is little, and faster system response is practical.
Above-mentioned power standard source is adopted to compare containing the process of harmonic signal and existing virtual value method and discrete fourier (DFT) converter technique:
Signal forms: fundamental voltage amplitude 1000V, frequency 17Hz, containing 3 subharmonic and 5 subharmonic, considers in addition.
More than to export after the current probe of 1000:1 or voltage probe decay through A/D converter sample to signal-processing board; The noise of signal-processing board is about 20mV (generally), and comprehensive above signal adds certain Hz noise again and obtains composite signal and refer to Fig. 3.
Be 10kHz in sample frequency, under the sampling time is no more than the condition of 2 seconds, result of calculation is as shown in Table 1 below.
The comparison of table 1 the utility model synchronous demodulation method, virtual value method and discrete fourier (DFT) converter technique three
Note: (1)-represent do not possess this function; (2) frequency accuracy=sample frequency/data length of * discrete fourier, and synchronous demodulation method, make use of voltage source internal information, the frequency of signal is known, there is not deviation; (3) in simulation calculation, the amplitude of the noise of Hz noise and circuit board all adopts random value, so amplitude and phase error can only show approximate range.
Can find out according to table 1:
(1) the utility model synchronous demodulation method is compared with discrete fourier (DFT) converter technique, calculated amount is much smaller, specifically: the utility model synchronous demodulation adopts digital signal processor DSP to realize above algorithm, calculated amount is K × N multiplication and K × (N-1) sub-addition, generally, (overtone order be usually concerned about in industry is no more than hundred times to K=N, be generally 20 ~ 30 times, and in DFT control method, in order to ensure frequency resolution, data volume N is thousands of), therefore, calculated amount N × N the multiplication of relative DFT and N × (N-1) sub-addition, the method computation amount.
(2) the utility model synchronous demodulation method is compared with discrete fourier (DFT) converter technique, and amplitude is suitable with phase accuracy.
(3) the utility model synchronous demodulation method is compared with effective value method, except realizing except sine wave, effectively can also export each harmonic.
(4) the utility model synchronous demodulation method is compared with effective value method, can also effective detection control phase place.
The foregoing is only preferred embodiment of the present utility model, be not limited to the utility model, for a person skilled in the art, the utility model can have various modifications and variations.All within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection domain of the present utility model.
Claims (2)
1. a synchronous demodulator, is characterized in that: comprise cosine generator (71), forcing function generator (72), the first internal memory (73), MCU (74), the second internal memory (75) and the 3rd internal memory (76);
Described cosine generator (71) and described forcing function generator (72) are set up in parallel, and both output terminals are all connected with the input end of described first internal memory (73); The output terminal of described first internal memory (73) is connected with the first input end of described MCU (74); Second input end of described MCU (74) is connected with the output terminal of described 3rd internal memory (76); The output terminal of described MCU (74) is connected with the input end of described second internal memory (75); Described MCU is provided with digital signal processor DSP in (74).
2. a power standard source, is characterized in that: comprise the input panel (1) for setting amplitude, frequency and phase place, controller (2), power amplifier (3), load (4), current probe or voltage probe (5), A/D transducer (6) and synchronous demodulator (7) as claimed in claim 1;
Described controller (2) comprises PID regulator (21) and DDS controller (22);
The output terminal of described input panel (1) is connected with the input end of the first input end of described PID regulator (21), the input end of described cosine generator (71) and described forcing function generator (72) respectively; The output terminal of described second internal memory (75) is connected with the second input end of described PID regulator (21);
The output terminal of described PID regulator (21) is connected with the input end of described DDS controller (22), the output terminal of described DDS controller (22) is connected with the input end of described power amplifier (3), and the output terminal of described power amplifier (3) is connected with the input end of described load (4);
Described current probe or voltage probe (5) are arranged on the circuit that described power amplifier (3) is connected with described load (4); The output terminal of described current probe or voltage probe (5) is connected with the input end of described A/D transducer (6), and the output terminal of described A/D transducer (6) is connected with the input end of described 3rd internal memory (76).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420498886.2U CN204065387U (en) | 2014-09-01 | 2014-09-01 | A kind of synchronous demodulator and comprise the power standard source of this synchronous demodulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420498886.2U CN204065387U (en) | 2014-09-01 | 2014-09-01 | A kind of synchronous demodulator and comprise the power standard source of this synchronous demodulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204065387U true CN204065387U (en) | 2014-12-31 |
Family
ID=52206870
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420498886.2U Active CN204065387U (en) | 2014-09-01 | 2014-09-01 | A kind of synchronous demodulator and comprise the power standard source of this synchronous demodulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204065387U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104215924B (en) * | 2014-09-01 | 2017-02-15 | 湖南银河天涛科技有限公司 | Synchronous demodulator, power standard source comprising synchronous demodulator and control method of power standard source |
| CN112540204A (en) * | 2020-12-09 | 2021-03-23 | 国网四川省电力公司电力科学研究院 | Power source control device |
-
2014
- 2014-09-01 CN CN201420498886.2U patent/CN204065387U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104215924B (en) * | 2014-09-01 | 2017-02-15 | 湖南银河天涛科技有限公司 | Synchronous demodulator, power standard source comprising synchronous demodulator and control method of power standard source |
| CN112540204A (en) * | 2020-12-09 | 2021-03-23 | 国网四川省电力公司电力科学研究院 | Power source control device |
| CN112540204B (en) * | 2020-12-09 | 2023-09-05 | 国网四川省电力公司电力科学研究院 | Power source control device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103513211B (en) | Ac impedance measurement measuring device | |
| CN103344825B (en) | Based on the electric energy metered system of AC sampling | |
| CN104237622B (en) | The method of sampling and wideband voltage/calibration of power device based on software based frequency tracking | |
| CN102288807A (en) | Method for measuring electric network voltage flicker | |
| CN101382588B (en) | Three phase harmonic standard electric energy meter | |
| CN204065387U (en) | A kind of synchronous demodulator and comprise the power standard source of this synchronous demodulator | |
| CN201540366U (en) | Three-phase harmonic standard calibration and verification device | |
| CN210005677U (en) | Electric energy meter basic error testing device considering temperature and current change | |
| CN110068729A (en) | A kind of signal phasor calculating method | |
| CN103513133B (en) | The measurement apparatus of MCR type SVC device dynamic response time and method | |
| CN202102051U (en) | Power grid interharmonic measuring instrument | |
| CN104215924B (en) | Synchronous demodulator, power standard source comprising synchronous demodulator and control method of power standard source | |
| CN203811797U (en) | Analog electrician/electronic signal and digital signal electric energy meter verification apparatus | |
| CN206991157U (en) | A kind of outer pulse-triggered synchronized harmonics power source based on DDS regulations | |
| CN106483375A (en) | A kind of multi-frequency fractional harmonic wave detection method | |
| CN102749488A (en) | Power grid harmonic wave real-time on-line monitor and method for detecting harmonic wave using same | |
| CN102721861A (en) | Alternating current power measurement method | |
| CN109387806B (en) | Digital electric energy meter traceability system error influence analysis method based on simulink simulation | |
| CN110007166B (en) | Method for rapidly measuring energy efficiency of frequency converter | |
| CN203204078U (en) | Test system for measuring earth grounding resistance | |
| Limin | Function signal generator | |
| Chen et al. | Smart meter development for cloud-based home electricity monitor system | |
| Liu et al. | A Metering Device for DC Energy Meters | |
| Li et al. | Research about bi-directional electronic energy meter and power quality analyzers | |
| CN107677864A (en) | A kind of design method that intelligent electric meter data are accurately measured based on sampling type |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |