CN206908586U - Difference channel and chip - Google Patents

Abstract

It the utility model is related to a kind of difference channel, including first group of mos field effect transistor MOSFET and second group of mos field effect transistor MOSFET, the source electrode of each MOSFET in wherein first group of MOSFET is joined to form difference unit to the source electrode of each corresponding MOSFET in second group of MOSFET by electric conductor, so that first group of MOSFET and second group of MOSFET forms differential pair, each MOSFET in wherein first group of MOSFET and second group of MOSFET has protection ring, the substrate contact of the protection ring and corresponding MOSFET, and the protection ring of two MOSFET in each difference unit is connected to each other by the electric conductor.By the difference channel, it can reduce due to mismatch caused by different device bulk effects and ensure that the impedance between source electrode and substrate is identical.The utility model further relates to a kind of respective chip.

Description

Difference channel and chip

Technical field

The utility model relates generally to semiconductor integrated circuit field, in particular to a kind of difference channel and one Kind chip.

Background technology

In view of good input dynamic range and ambient noise rejection ability, difference channel is widely used in analog circuit In.Difference channel refers to, circuit of the difference as effective input signal using between two signals of input end.One difference The quality of circuit performance is often depending in actual chips the matching degree between device.For example, in the situation of difference amplifier Under, due to the parameter differences of the internal components of amplifier, even if causing two input voltages of amplifier are equal (to input and be Zero) in the case of, output is also not zero, and such case is referred to as the mismatch (offset) of difference channel.The mismatch of difference channel The sensitivity of difference channel can be caused to decline, so as to cause performance degradation.

In order to improve the matching of device, it has been developed that a large amount of chip layout design methods.For example, existing scheme bag Include：Mos field effect transistor (MOSFET) in difference channel using interdigital alignment placement or is adopted With the alignment placement of common centroid, or addition dummy argument (dummy) etc..Generally, in order to preferably match, the size of device can quilt Select to be relatively large, but the problem of this brings be, it is necessary to the substrate of the device of matching is often in different potentials, it is and different Substrate potential can cause different bulk effects, thus ultimately cause different threshold voltages.The deviation of this threshold voltage is use up Pipe can be improved by foregoing layout design method, but in the circuit for high-precision applications, light It can not meet requirement dependent on above-mentioned chip layout design method.

Utility model content

Task of the present utility model is to provide a kind of difference channel and a kind of chip, by the difference channel or the chip, Mismatch caused by the different bulk effects due to each MOSFET in difference channel can be substantially reduced.

Of the present utility model in a first aspect, the task solves by a kind of difference channel, the difference channel includes the One group of mos field effect transistor MOSFET and second group of mos field effect transistor MOSFET, wherein the source electrode of each MOSFET in first group of MOSFET is to each corresponding MOSFET's in second group of MOSFET Source electrode is joined to form difference unit by electric conductor so that first group of MOSFET and second group of MOSFET forms differential pair；

Each MOSFET in wherein first group of MOSFET and second group of MOSFET has a protection ring, the protection ring with Corresponding MOSFET substrate contact, and the protection ring of two MOSFET in each difference unit by the electric conductor each other Connection.

Following advantages are at least had according to difference channel of the present utility model：

(1) by arranging protection ring (guard ring) on each MOSFET substrate, and will be by two MOSFET The protection ring of two MOSFET in the difference unit of composition is connected to each other by electric conductor (such as metal), it is ensured that each poor The substrate potential of MOSFET in subdivision is identical, so as to reduce, even eliminates the body effect as caused by MOSFET substrate potential differences Difference is answered, thus reduces, even eliminate the mismatch of difference channel, this is that following based on inventor being seen clearly：

MOSFET threshold voltage is：

Wherein γ is the constant relevant with technique, referred to as body-effect coefficient, Φ_FIt is an electricity relevant with doping concentration Gesture, V_SBIt is the electrical potential difference between MOSFET source and substrate, V_TH0It is the threshold voltage for not considering bulk effect.Due in differential pair MOSFET source electrode linked together by metal, so source electrode is in identical potential, but from the equations above Find out, if the potential on substrate is different, then the V of the MOSFET in differential pair_SBWill be different, so as to cause theirs V_THDifference, thereby result in mismatch.

Therefore, in the utility model, by being set for each MOSFET with the protection ring of its substrate contact and by difference The protection ring of two MOSFET in subdivision is connected to each other by electric conductor (such as metal), it is ensured that in each difference unit MOSFET substrate potential it is all identical, thus reduce, even eliminate the mismatch as caused by bulk effect difference.

(2) by arranging identical protection ring between MOSFET source electrode and substrate, such connection ensure that each Impedance (such as spurious impedance) is also identical between MOSFET source electrode and substrate, so as to which the matching of difference channel be better achieved.

Provided in an expansion scheme of the present utility model, first group of MOSFET and second group of MOSFET has 2 respectively Individual, 4,8 or 16 MOSFET.The number of MOSFET in first group of MOSFET and second group of MOSFET is identical poor to be formed Point pair.Other numbers are also what is be contemplated that.In addition, each MOSFET can also have identical size, to realize preferably matching.

Provided in a preferred scheme of the present utility model, two in each difference unit MOSFET is arranged to make Described two MOSFET protection ring each other border, for example contact.By the preferred scheme, can not only realize greater compactness of Circuit layout, but also the protection ring of two MOSFET in differential pair can be made to be electrical contact with each other, due to protection ring respectively with Substrate contact, therefore two MOSFET same substrate potential can be better achieved.

Provided in another preferred scheme of the present utility model, first group of MOSFET and second group of MOSFET MOSFET quilts It is arranged to common centroid array so that first group of MOSFET barycenter overlaps with second group of MOSFET barycenter.Pass through the preferred side Case, it is possible to achieve farthest symmetrical physical circuit layout so that the enchancement factor in technique manufacturing process is not considered In the case of, physically realizing each MOSFET has identical V_SB, ensure that their bulk effect is identical, thus V_THIt is identical.

Provided in an expansion scheme of the present utility model, first group of MOSFET and second group of MOSFET MOSFET is Single comb refers to MOSFET.In the case where more combs refer to MOSFET, the utility model can also be applied, that is, is similarly each MOSFET and sets Protection ring is put, and corresponding each source electrode and protection ring are linked together by electric conductor.

In second aspect of the present utility model, foregoing task solves by a kind of chip for being used to reduce bulk effect, institute State protection ring around the MOSFET arrange so that the MOSFET to be isolated with another active device, the protection ring with it is described MOSFET substrate electrical connection, and the protection ring electrically connects with the source electrode of the MOSFET.

By the setting of protection ring, substrate potential can be adjusted, so as to substantially reduce the bulk effect of the MOSFET in device, Improve the reliability of device.

Provided in an expansion scheme of the present utility model, the chip includes first group of MOS field Effect transistor MOSFET and second group of mos field effect transistor MOSFET, wherein in first group of MOSFET Each MOSFET source electrode be connected to the source electrode of each corresponding MOSFET in second group of MOSFET by electric conductor with shape Into difference unit so that first group of MOSFET and second group of MOSFET forms differential pair；Wherein first group MOSFET and second group Each MOSFET in MOSFET has a protection ring, and each protection ring surrounds the corresponding MOSFET with will be corresponding described MOSFET isolates with the adjacent MOSFET, and the protection ring of two MOSFET in each difference unit passes through the conductance Body is connected to each other.

Provided in another expansion scheme of the present utility model, two in each difference unit MOSFET is arranged to make Described two MOSFET protection ring border each other；Or/and wherein first group of MOSFET and second group of MOSFET has respectively 2,4,8 or 16 MOSFET.

Provided in another expansion scheme of the present utility model, first group of MOSFET and second group of MOSFET MOSFET quilts It is arranged to common centroid array so that first group of MOSFET barycenter overlaps with second group of MOSFET barycenter；Or/and wherein One group of MOSFET and second group of MOSFET MOSFET refers to MOSFET for single comb.

Provided in another expansion scheme of the present utility model, the substrate contact of the protection ring and the MOSFET, institute The source electrode for stating protection ring and the MOSFET is connected to each other by electric conductor.

Brief description of the drawings

The utility model is expanded on further with reference to specific embodiment below in conjunction with the accompanying drawings.

Fig. 1 shows the schematic diagram according to single MOSFET of the present utility model；

Fig. 2 shows the schematic diagram of multiple MOSFET according to formation differential pair of the present utility model；And

Fig. 3 shows the schematic diagram using the difference channel according to utility model scheme.

Embodiment

It should be pointed out that each component in each accompanying drawing perhaps to show, and be not necessarily ratio with illustrating and be exaggerated Example is correctly.In the drawings, it is equipped with identical reference to identical or function identical component.

Unless specifically stated so, in this application, measure word "one", " one " do not exclude the scenes of multiple elements.

Fig. 1 shows the schematic diagram according to single MOSFET 100 of the present utility model, and Fig. 1 represents the top view of chip.

As shown in figure 1, MOSFET 100 has a protection ring 101, the protection ring 101 passes through (such as the metal of electric conductor 102 Line, the metal wire may include n-th layer metal level and contact site (contact), wherein N can with value 1,2,3 ...) and source Pole 103 electrically connects.In one embodiment, the protection ring 101 is connected by a contact site with the 1st layer of metal level, the source Pole 103 is connected by another contact site with the 1st layer of metal level, is electrically connected the protection ring 101 and source electrode 103 by metal wire Mode be one of ordinary skill in the art will appreciate that, it is not specifically illustrated in figure.

Fig. 2 shows the schematic diagram of multiple MOSFET according to formation differential pair of the present utility model, and Fig. 2 represents chip Top view.

Two groups of MOSFET are shown in Fig. 2, first group of MOSFET is by 8 MOSFET：M_{1_1}..., M_{1_8}Form, second group MOSFET is by 8 MOSFET：M_{2_1}..., M_{2_8}Form.It should be pointed out that this two groups of MOSFET MOSFET numbers are merely illustrative , other numbers are also what is be contemplated that.

As shown in Fig. 2 each MOSFET (such as M in first group of MOSFET_{1_1}) source electrode 103 and second group of MOSFET in Each corresponding MOSFET (such as M_{2_5}) source electrode 103 difference unit is joined to form by electric conductor 102.First group Whole MOSFET in MOSFET and second group of MOSFET are arranged so that this two groups of MOSFET are consequently formed differential pair.

As shown in Fig. 2 each MOSFET has a protection ring 101, the substrate of the protection ring 101 and MOSFET is abundant Contact, and two MOSFET (such as M in each difference unit_{1_1}And M_{2_5}) protection ring be connected to each other by electric conductor 102. In fig. 2, first group of MOSFET and second group of MOSFET is arranged to common centroid array, i.e., first group MOSFET barycenter and Two groups of MOSFET barycenter overlaps, it is possible thereby to realize farthest symmetrical physical circuit layout so that do not considering work In the case of enchancement factor in skill manufacturing process, physically realizing each MOSFET has identical V_SB, so that it is guaranteed that Their bulk effect is identical, thus V_THIt is identical.It should be understood that what the layout was merely exemplary, other layouts also may be used With imagination.Such as the specular arrangement of common centroid.

By arranging protection ring 101 on each MOSFET substrate, and by two in each difference unit MOSFET protection ring 101 is connected to each other by electric conductor 102, it is ensured that the substrate electricity of the MOSFET in each difference unit Gesture is identical, so as to reduce, even eliminates the different bulk effects as caused by MOSFET substrate potential differences, thus reduces, even eliminates The mismatch of difference channel.

Fig. 3 shows the schematic diagram of the difference channel 300 using the scheme according to utility model.

Fig. 3 illustrates Folded-cascode amplifier, wherein in this difference channel, differential pair M₁And M₂、 M₃And M₄And M₉And M₁₀Influence of the matching to circuit performance it is particularly important.Therefore according to the utility model：M₁And M₂Using figure Circuit layout in 2, i.e. M₁By 8 MOSFET：M_{1_1}..., M_{1_8}Form, M₂By 8 MOSFET：M_{2_1}..., M_{2_8}Form, thus Form M₁And M₂Matched well, wherein M₁And M₂Each MOSFET arranged respectively according to Fig. 2；Similarly, M₃And M₄And M₉ And M₁₀Also Fig. 2 circuit layout is respectively adopted.

In the present embodiment, in order to preferably match, these differential pairs, such as M₁And M₂It is designed to individual by even number M respectively Single comb of identical size refers to MOSFET element composition.

By circuit layout of the present utility model, M can be eliminated₁And M₂、M₃And M₄And M₉And M₁₀Bulk effect difference, It is achieved in preferably matching.

In addition, it is to be noted that scheme of the present utility model, i.e. described protection ring can also be applied to be used to form differential electrical The respective chip on road, thus to reduce, even eliminate the mismatch as caused by bulk effect difference.This includes the chip of protection ring not only It can be applied to for forming the chip of difference channel, and can be also used for other devices, can also reach and eliminate bulk effect Effect, therefore they are also fallen within the scope of protection of the utility model, this be it will be appreciated by those skilled in the art that, This is not repeated.

Although some embodiments of the present utility model are described in present specification, to this area It is obvious to the skilled person that these embodiments are merely possible to shown in example.It may occur to persons skilled in the art that Numerous flexible program, alternative solution and improvement project and without departing from the scope of the utility model.Appended claims are intended to The scope of the utility model is limited, and thereby covers method and knot of these claims in itself and its in the range of equivalents Structure.

Claims (9)

1. a kind of difference channel, including first group of mos field effect transistor MOSFET and second group of metal oxygen Compound semiconductor field effect transistor MOSFET, wherein the source electrode of each MOSFET in first group of MOSFET and second group The source electrode of each corresponding MOSFET in MOSFET is joined to form difference unit by electric conductor so that first group of MOSFET Differential pair is formed with second group of MOSFET；

Each MOSFET in wherein first group of MOSFET and second group of MOSFET has a protection ring, the protection ring with it is corresponding MOSFET substrate contact, and the protection ring of two MOSFET in each difference unit is connected each other by the electric conductor Connect.

2. difference channel according to claim 1, wherein first group of MOSFET and second group of MOSFET have respectively 2,4 Individual, 8 or 16 MOSFET.

3. difference channel according to claim 1, wherein two MOSFET in each difference unit are arranged such that Described two MOSFET protection ring border each other.

4. difference channel according to claim 1, wherein first group of MOSFET and second group of MOSFET MOSFET is by cloth It is set to common centroid array so that first group of MOSFET barycenter overlaps with second group of MOSFET barycenter；Or/and wherein first MOSFET and second group of MOSFET of group MOSFET refers to MOSFET for single comb.

5. a kind of chip, including mos field effect transistor MOSFET and protection ring, the protection ring surround The MOSFET arrangements are so that the MOSFET to be isolated with another active device, the substrate electricity of the protection ring and the MOSFET Connection, and the protection ring electrically connects with the source electrode of the MOSFET.

6. chip according to claim 5, wherein the chip includes first group of metal oxide semiconductor field-effect crystalline substance Body pipe MOSFET and second group of mos field effect transistor MOSFET, wherein each in first group of MOSFET MOSFET source electrode is joined to form difference to the source electrode of each corresponding MOSFET in second group of MOSFET by electric conductor Unit so that first group of MOSFET and second group of MOSFET forms differential pair；

Each MOSFET in wherein first group of MOSFET and second group of MOSFET has protection ring, each protection collar Around the corresponding MOSFET so that the corresponding MOSFET to be isolated with the adjacent MOSFET, and two in each difference unit Individual MOSFET protection ring is connected to each other by the electric conductor.

7. chip according to claim 5, wherein two MOSFET in each difference unit be arranged such that it is described Two MOSFET protection ring border each other；Or/and wherein first group of MOSFET and second group of MOSFET respectively have 2,4 Individual, 8 or 16 MOSFET.

8. chip according to claim 5, wherein first group of MOSFET and second group of MOSFET MOSFET is arranged to Common centroid array so that first group of MOSFET barycenter overlaps with second group of MOSFET barycenter；Or/and wherein first group MOSFET and second group of MOSFET MOSFET refers to MOSFET for single comb.

9. the chip stated according to claim 5, wherein the substrate contact of the protection ring and the MOSFET, the protection ring with The source electrode of the MOSFET is connected to each other by electric conductor.