CN206773688U - A kind of high speed acquisition tape deck based on FPGA and solid state hard disc - Google Patents

A kind of high speed acquisition tape deck based on FPGA and solid state hard disc Download PDF

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Publication number
CN206773688U
CN206773688U CN201720483690.XU CN201720483690U CN206773688U CN 206773688 U CN206773688 U CN 206773688U CN 201720483690 U CN201720483690 U CN 201720483690U CN 206773688 U CN206773688 U CN 206773688U
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data
solid state
fpga
state hard
hard disc
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张丕芬
李永梁
何凯
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BEIJING SHIZHU SCIENCE AND TECHNOLOGY Co Ltd
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BEIJING SHIZHU SCIENCE AND TECHNOLOGY Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The utility model provides a kind of high speed acquisition tape deck based on FPGA and solid state hard disc, including：FPGA main control units, data input cell, data outputting unit, monitoring interface unit, auxiliary signal input block, data buffer storage unit, SATA3 solid state hard discs array, PMU.Realize that high-speed data acquisition records by using FPGA control SATA3 solid state hard disc arrays, record data bandwidth is high, reaches as high as 4GB/s, memory capacity easily extends；It is simple in construction, a variety of data inputs outputs such as Camera Link, SDI, optical-fibre channel and Ethernet protocol are supported, especially suitable for embedded occasion to the requirement more than the high bandwidth of data record, low-power consumption, small volume and kind of interface.

Description

A kind of high speed acquisition tape deck based on FPGA and solid state hard disc
Technical field
Data acquiring and recording field is the utility model is related to, more particularly to a kind of high speed based on FPGA and solid state hard disc is adopted Collect tape deck.
Background technology
With the resolution ratio and precision more and more higher of the imaging sensor such as visible ray, infrared, the speed of its output data interface Also more and more higher, single sensor output speed are up to GB/s to rate, the also more and more higher of the requirement to data acquisition recording device.Mesh Before, the data acquisition recording device of main flow is realized using the computer platform of standard, mainly by high performance cpu motherboard, number Formed according to capture card, disk array, the operating system of operation standard wherein on cpu motherboard, be as Linux, Windows are operated System, realize the control to input and output stream and the management to disk array.Within the system, data are defeated by capture card Enter, in the internal memory by the CPU board of computer-internal bus transfer to computer, file system management of the data in operating system Under, interaction is multiple in internal memory, is finally written in disk array.Due to the complexity text of computer-internal bus and operating system Part system operatio, it is difficult to break through 1GB/s bandwidth that can cause record data bandwidth.Due to using high performance CPU, the work(of system Consumption and volume are difficult to reduce, and embedded system can not be realized to low-power consumption and the requirement of small size.
The content of the invention
The purpose of this utility model is that solution available data acquisition and recording device record data bandwidth is low, can not realize insertion The problem of formula system is to low-power consumption and the requirement of small size.To achieve the above object, the utility model provides one kind and is based on FPGA and solid state hard disc high speed acquisition tape deck, including：FPGA main control units, data input cell, data outputting unit, Monitor interface unit, auxiliary signal input block, data buffer storage unit, SATA3 solid state hard discs array, PMU.
The FPGA main control units, connection data input cell, data outputting unit, monitoring interface unit, auxiliary signal Input block, data buffer storage unit, SATA3 solid state hard discs array, PMU, for coordinating the operation of unit, And according to the order of monitoring interface unit, realize input data, the Comprehensive Control of output data and storage.
The data input cell, one end connection FPGA main control units, one end connection outside Data Input Interface, be used for Protocol analysis and level conversion are carried out to the data of outside input.
The data outputting unit, one end connection FPGA main control units, one end connection outside data output interface, be used for Realize the agreement and level conversion of data output.
The monitoring interface unit, one end connection FPGA main control units, the outside monitoring of one end connection and control unit, use In to the operation realization control based on FPGA and the high speed acquisition tape deck of solid state hard disc and condition monitoring.
The auxiliary signal input block, one end connection FPGA main control units, one end connection outside Data Input Interface, For realizing the input of trigger signal, power down protection signal, temporal information, positional information.
The data buffer storage unit, FPGA main control units are connected, realize the data buffer storage to input and output data, data Buffer unit is formed by multi-disc DDR3SDRAM the parallel combineds.
The SATA3 solid state hard discs array, connects FPGA main control units, and multiple SATA3 solid state hard discs form SATA3 solid-states Hard disk array, realize the data storage of high bandwidth.
The PMU, connection FPGA main control units, data input cell, data outputting unit, monitoring interface Unit, auxiliary signal input block, data buffer storage unit, SATA3 solid state hard disc arrays, for being powered to unit.
The record data bandwidth of the high speed acquisition tape deck based on FPGA and solid state hard disc reaches as high as 4GB/s.
The FPGA main control units support hardware encryption algorithm, on the premise of data record bandwidth is not reduced, realization pair The encryption of record data.
The data input cell supports the data input of Camera Link, SDI, optical-fibre channel and Ethernet protocol.
The data outputting unit supports the data output of Camera Link, SDI, optical-fibre channel and Ethernet protocol.
The monitoring interface unit supports the output of the data input of RS422, RS232 and Ethernet protocol.
The auxiliary signal input block supports power down protection, i.e., is recorded and filled based on the high speed acquisition of FPGA and solid state hard disc To put in course of normal operation, when running into improper power down, auxiliary signal input block sends power-off signal and gives FPGA main control units, The data of caching are written in SATA3 solid state hard disc arrays by FPGA main control units, protect the number in SATA3 solid state hard disc arrays According to without damage.
The auxiliary signal input block is supported to add longitude, latitude, temporal information in data recording process.
Using connector connection is reinforced between described SATA3 solid state hard discs array and FPGA main control units, with locking Function, anti-vibration, shock resistance.
As shown from the above technical solution, the utility model controls SATA3 solid state hard discs array to realize height by using FPGA Fast data acquiring and recording, it is not of the same race using Camera Link, SDI, optical-fibre channel and Ethernet protocol etc. according to application demand The data input of class, input data are directly entered data buffer storage unit by interface conversion, under the control of FPGA main control units, write Enter in SATA3 solid state hard disc arrays, output data also supports Camera Link, SDI, optical-fibre channel and Ethernet protocol etc. no Export, have the advantages that with species：
1. record data bandwidth is high, 4GB/s is reached as high as, memory capacity easily extends.
2. simple in construction, the inputoutput data species of support is more, especially suitable for embedded occasion to data record Requirement more than high bandwidth, low-power consumption, small volume and kind of interface.
Below by drawings and examples, the technical solution of the utility model is described in further detail.
Brief description of the drawings
Fig. 1 is the high speed acquisition recording device structure block diagram provided by the utility model based on FPGA and solid state hard disc.
Embodiment
As shown in figure 1, it is the high speed acquisition recording device structure provided by the utility model based on FPGA and solid state hard disc Block diagram.The high speed acquisition tape deck 10 based on FPGA and solid state hard disc, including：FPGA main control units 101, data input Unit 102, data outputting unit 103, monitoring interface unit 104, auxiliary signal input block 105, data buffer storage unit 106, SATA3 solid state hard discs array 107, PMU 108.
Wherein, FPGA main control units 101, connection data input cell 102, data outputting unit 103, monitoring interface unit 104th, auxiliary signal input block 105, data buffer storage unit 106, SATA3 solid state hard discs array 107, PMU 108, For coordinating the operation of unit, and according to the order of monitoring interface unit 104, realize input data, output data it is comprehensive Close control and storage.
Data input cell 102, one end connection FPGA main control units 101, the outside Data Input Interface of one end connection, use Protocol analysis and level conversion are carried out in the data to outside input.
Data outputting unit 103, one end connection FPGA main control units 101, the outside data output interface of one end connection, use In the agreement and level conversion of realizing data output.
Monitor interface unit 104, one end connection FPGA main control units 101, monitoring and control unit outside the connection of one end, For realizing control and condition monitoring to the operation based on FPGA and the high speed acquisition tape deck 10 of solid state hard disc.
Auxiliary signal input block 105, one end connection FPGA main control units 101, the data input outside the connection of one end connect Mouthful, for realizing the input of trigger signal, power down protection signal, temporal information, positional information.
Data buffer storage unit 106, connection FPGA main control units 101, realize the data buffer storage to input and output data, number Formed according to buffer unit by multi-disc DDR3SDRAM the parallel combineds.
SATA3 solid state hard discs array 107, connection FPGA main control units 101, multiple SATA3 solid state hard discs composition SATA3 consolidate State hard disk array 107, realize the data storage of high bandwidth.SATA3 solid state hard discs array 107 uses the SSD of standard SATA interface Solid state hard disc, SSD solid state hard discs have the features such as read or write speed is high, and readwrite performance is stable, and the lasting write-in bandwidth of single disc reaches 460MB/s, persistently read bandwidth and reach 540MB/s, the record application demand for continuing high-speed data-flow can be met.
108 PMUs, connection FPGA main control units 101, data input cell 102, data outputting unit 103, Interface unit 104, auxiliary signal input block 105, data buffer storage unit 106, SATA3 solid state hard discs array 107 are monitored, is used for Powered to unit.
Two kinds of mode of operations of the record support of high speed acquisition tape deck 10 and playback based on FPGA and solid state hard disc, are remembering Under record pattern, FPGA main control units 101 receive the data of data input cell 102, and are cached to data according to certain form In buffer unit 106, after the data of caching reach certain threshold value, FPGA master controls list 101 writes SATA3 by data parallel and consolidated In state hard disk array 107；In the playback mode, FPGA main control units 101 read the data in SATA3 solid state hard discs array 107 Get in data buffer storage unit 106, and according to certain form, by data output.
The record data bandwidth of high speed acquisition tape deck 10 based on FPGA and solid state hard disc reaches as high as 4GB/s.
FPGA main control units 101 support hardware encryption algorithm, on the premise of data record bandwidth is not reduced, realize to note Record the encryption of data.
The data entry format of data input cell 102 is settable, supports Camera Link, SDI, optical-fibre channel With the data input of Ethernet protocol, wherein optical-fibre channel supports the data input of the Xilinx Aurora agreements of multidiameter delay. If using Camera Link, SDI and Ethernet protocol, data input cell 102 turns the input data of high speed serialization Change parallel data into and be sent to FPGA main control units 101；If using fiber channel protocol, data input cell 102 Convert optical signals into high-speed serial signals and be sent to FPGA main control units 101.
FPGA main control units 101 into unified AXI buses, and pass through the Data Format Transform of various inputs internal total Line switch unit is written in data buffer storage unit 106.Data buffer storage unit 106 is by the DDR3SDRAM chipsets of 8 16 Into interface clock is up to 1066MHz, bit wide 128.
The interface of FPGA main control units 101 and SATA3 solid state hard discs array 107 is by RAID0 controllers and 8 road SATA 3IPCORE is formed.Wherein RAID0 controllers realize the concurrent management to 8 pieces of solid state hard discs and operation, so as to improve data write-in With reading bandwidth, SATA 3IPCORE are used for the protocol interface for realizing SATA3, so as to complete the operation to solid state hard disc.
The data output format of data outputting unit 103 is settable, supports Camera Link, SDI, optical-fibre channel With the data output of Ethernet protocol, wherein Camera Link and SDI agreements support that data readback and analogue camera data are defeated Go out, optical-fibre channel and Ethernet protocol support data export, the data transfer with new technology file system, and optical-fibre channel supports multichannel The data output of parallel Xilinx Aurora agreements.
Monitor interface unit 104 and support the output of the data input of RS422, RS232 and Ethernet protocol.Monitor interface unit By RS422 or RS232 interface, the configuration to high speed acquisition tape deck and condition monitoring are realized, is such as formatted diskette, adjusted Number of disks, control high speed acquisition tape deck start recording and stop recording etc..
Auxiliary signal input block 105 supports power down protection, i.e., is recorded and filled based on the high speed acquisition of FPGA and solid state hard disc Put in 10 course of normal operation, when running into improper power down, auxiliary signal input block 105 sends power-off signal and gives FPGA master controls The data of caching are written in SATA3 solid state hard discs array 107 by unit 101, FPGA main control units 101, protect SATA3 solid-states Data in hard disk array 107 are without damage.
Auxiliary signal input block 105 is supported to add longitude, latitude, temporal information in data recording process.Auxiliary letter Number input block 105 can receive time and the geographical location information that GPS, big-dipper satellite or other systems are sent, and by the time and Geographical location information is transferred in FPGA main control units 101.Wherein, the temporal information that other systems are sent supports IRIG-B DC With AC codes.
Using connector connection is reinforced between SATA3 solid state hard discs array 107 and FPGA main control units 101, with locking Function, anti-vibration, shock resistance.
As shown from the above technical solution, the utility model controls SATA3 solid state hard discs array to realize height by using FPGA Fast acquisition and recording, it is different types of using Camera Link, SDI, optical-fibre channel and Ethernet protocol etc. according to application demand Data input, input data are directly entered data buffer storage unit by interface conversion, under the control of FPGA main control units, write-in In SATA3 solid state hard disc arrays, output data also supports the differences such as Camera Link, SDI, optical-fibre channel and Ethernet protocol Species exports, and has the advantages that：
1. record data bandwidth is high, 4GB/s is reached as high as, memory capacity easily extends.
2. simple in construction, the inputoutput data species of support is more, especially suitable for embedded occasion to data record Requirement more than high bandwidth, low-power consumption, small volume and kind of interface.
Finally it should be noted that：Above example is only illustrating the technical solution of the utility model rather than it is limited System, although the utility model is described in detail with reference to preferred embodiment, one of ordinary skill in the art should manage Solution：Still the technical solution of the utility model can be modified for it or equivalent substitution, and these are changed or equally replaced Change the spirit and scope that can not also make amended technical scheme depart from technical solutions of the utility model.

Claims (9)

  1. A kind of 1. high speed acquisition tape deck based on FPGA and solid state hard disc, it is characterised in that：
    The high speed acquisition tape deck based on FPGA and solid state hard disc includes：FPGA main control units, data input cell, number According to output unit, monitoring interface unit, auxiliary signal input block, data buffer storage unit, SATA3 solid state hard discs array, power supply Administrative unit；
    The FPGA main control units, connection data input cell, data outputting unit, monitoring interface unit, auxiliary signal input Unit, data buffer storage unit, SATA3 solid state hard discs array, PMU, for coordinating the operation of unit, and root According to the order of monitoring interface unit, input data, the Comprehensive Control of output data and storage are realized；
    The data input cell, one end connection FPGA main control units, one end connection outside Data Input Interface, for external The data of portion's input carry out protocol analysis and level conversion；
    The data outputting unit, one end connection FPGA main control units, one end connection outside data output interface, for realizing The agreement and level conversion of data output；
    The monitoring interface unit, one end connection FPGA main control units, one end connection outside monitoring and control unit, for pair Control and condition monitoring are realized in the operation of high speed acquisition tape deck based on FPGA and solid state hard disc；
    The auxiliary signal input block, one end connection FPGA main control units, one end connection outside Data Input Interface, be used for Realize the input of trigger signal, power down protection signal, temporal information, positional information；
    The data buffer storage unit, FPGA main control units are connected, realize the data buffer storage to input and output data, data buffer storage Unit is formed by multi-disc DDR3SDRAM the parallel combineds；
    The SATA3 solid state hard discs array, connects FPGA main control units, and multiple SATA3 solid state hard discs form SATA3 solid state hard discs Array, realize the data storage of high bandwidth；
    The PMU, connection FPGA main control units, data input cell, data outputting unit, monitoring interface unit, Auxiliary signal input block, data buffer storage unit, SATA3 solid state hard disc arrays, for being powered to unit.
  2. 2. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The record data bandwidth of the high speed acquisition tape deck based on FPGA and solid state hard disc reaches as high as 4GB/s.
  3. 3. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The FPGA main control units support hardware encryption algorithm, on the premise of data record bandwidth is not reduced, realize to record The encryption of data.
  4. 4. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The data input cell supports the data input of Camera Link, SDI, optical-fibre channel and Ethernet protocol.
  5. 5. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The data outputting unit supports the data output of Camera Link, SDI, optical-fibre channel and Ethernet protocol.
  6. 6. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The monitoring interface unit supports the output of the data input of RS422, RS232 and Ethernet protocol.
  7. 7. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The auxiliary signal input block supports power down protection, i.e., the high speed acquisition tape deck based on FPGA and solid state hard disc is just In the normal course of work, when running into improper power down, auxiliary signal input block sends power-off signal and gives FPGA main control units, FPGA The data of caching are written in SATA3 solid state hard disc arrays by main control unit, protect data in SATA3 solid state hard disc arrays not It is damaged.
  8. 8. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    The auxiliary signal input block is supported to add longitude, latitude, temporal information in data recording process.
  9. 9. the high speed acquisition tape deck according to claim 1 based on FPGA and solid state hard disc, it is characterised in that：
    Using connector connection is reinforced between described SATA3 solid state hard discs array and FPGA main control units, with locking function, Anti-vibration, shock resistance.
CN201720483690.XU 2017-05-03 2017-05-03 A kind of high speed acquisition tape deck based on FPGA and solid state hard disc Active CN206773688U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108519857A (en) * 2018-03-16 2018-09-11 中北大学 Multi-source unformatted wideband data high speed magnanimity formats storage and feature security method
CN113810109A (en) * 2021-10-29 2021-12-17 西安微电子技术研究所 Multi-protocol multi-service optical fiber channel controller and working method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108519857A (en) * 2018-03-16 2018-09-11 中北大学 Multi-source unformatted wideband data high speed magnanimity formats storage and feature security method
CN113810109A (en) * 2021-10-29 2021-12-17 西安微电子技术研究所 Multi-protocol multi-service optical fiber channel controller and working method thereof
CN113810109B (en) * 2021-10-29 2022-09-27 西安微电子技术研究所 Multi-protocol multi-service optical fiber channel controller and working method thereof

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