CN206727982U - Electronic information anti-jamming circuit - Google Patents

Electronic information anti-jamming circuit Download PDF

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Publication number
CN206727982U
CN206727982U CN201720324936.9U CN201720324936U CN206727982U CN 206727982 U CN206727982 U CN 206727982U CN 201720324936 U CN201720324936 U CN 201720324936U CN 206727982 U CN206727982 U CN 206727982U
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CN
China
Prior art keywords
resistance
electric capacity
chip
pin
type triode
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Expired - Fee Related
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CN201720324936.9U
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Chinese (zh)
Inventor
杨�一
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Tianjin Fang Yilan Water Technology Co Ltd
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Tianjin Fang Yilan Water Technology Co Ltd
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Priority to CN201720324936.9U priority Critical patent/CN206727982U/en
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Publication of CN206727982U publication Critical patent/CN206727982U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses electronic information anti-jamming circuit, circuit includes chip IC 1, the pin 2 of the chip IC 1 is connected with resistance R4 and electric capacity C2, the other end of the electric capacity C2 is connected with electric capacity C1, and the electric capacity C1 other end is connected with resistance R2 and resistance R3, the other end of the resistance R3 is connected with the resistance R4 other end and electric capacity C3, and electric capacity C3 other end ground connection, the other end of the resistance R2 is connected with resistance R1 and input port IN, and the resistance R1 other end is connected with pin 1, electric capacity C4, electric capacity C5 negative pole and the power port VDD of chip IC 1.The utility model is economical and practical, when chip IC 1 causes to crash by the high interference signal that input circuit is inputted, the pin 7 of chip IC 1 is discharged, so that PNP type triode Q1 is turned on, now oscillating circuit can restart chip IC 1, the work allowed before the continuation of chip IC 1, and then greatly strengthen the antijamming capability of electronic equipment.

Description

Electronic information anti-jamming circuit
Technical field
It the utility model is related to electronic information technical field, more particularly to electronic information anti-jamming circuit.
Background technology
" electronic information " is the word occurred again and again in recent years, and it is in computer technology, the communication technology and high density Turn into the vocabulary of informatics under the background for developing rapidly and being used widely in every field of memory technology.Electronic information Fundamentally break in the storage, propagation and application aspect of information and stored and propagate for a long time information by paper carrier Dominance, represent information industry development direction.The main control chip of electronic equipment internal of the prior art is because of reception When high interference signal crashes, the main control chip can not automatic start come the work before continuing so that electronic equipment it is anti- Interference performance is poor.
The content of the invention
The purpose of this utility model is to solve shortcoming present in prior art, and the electronic information proposed is anti-interference Circuit.
To achieve these goals, the utility model employs following technical scheme:
Electronic information anti-jamming circuit, circuit include chip IC 1, and the pin 2 of the chip IC 1 is connected with resistance R4 and electricity Hold C2, the other end of the electric capacity C2 is connected with electric capacity C1, and the electric capacity C1 other end is connected with resistance R2 and resistance R3, described The resistance R3 other end is connected with the resistance R4 other end and electric capacity C3, and electric capacity C3 other end ground connection, the resistance R2's The other end is connected with resistance R1 and input port IN, and the resistance R1 other end is connected with the pin 1, electric capacity C4, electricity of chip IC 1 Hold C5 negative pole and power port VDD, the other end of the electric capacity C4 and the pin 5 of chip IC 1 are electrically connected with, the chip IC1 pin 8 is connected with the pin 4 of chip IC 1, PNP type triode Q1 emitter stage and power port VCC, the positive-negative-positive three Pole pipe Q1 base stage and the pin 7 of chip IC 1 are electrically connected with, and PNP type triode Q1 colelctor electrode is connected with resistance R6 and electricity R7 is hindered, the other end of the resistance R6 is connected with electric capacity C6 and NPN type triode VT1 colelctor electrode, the NPN type triode VT1 emitter stage is connected with NPN type triode VT2 emitter stage, and NPN type triode VT1 grounded emitter, the NPN Type triode VT2 base stage and the electric capacity C6 other end are electrically connected with, and NPN type triode VT2 colelctor electrode is connected with resistance R8 and the pin of chip IC 16, the other end of the resistance R8 and NPN type triode VT1 base stage are electrically connected with, the chip IC1 pin 3 is connected with diode D1 negative pole and resistance R5, and diode D1 positive pole be connected with resistance R5 the other end, Electric capacity C5 positive pole and output port OUT.
Preferably, the model KA555 of the chip IC 1, is built-in with discharge tube in the chip IC 1, and discharge tube and The pin 7 of chip IC 1 is connected, and pin 2, pin 3 and the pin 6 of the chip IC 1 are followed successively by input, output end and reset End.
Preferably, the power port VCC and power port VDD are connected to corresponding 12 volts of power supplys and 5 volts of power supplys.
Preferably, the resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7 and resistance R8 Resistance is followed successively by 1.5K Ω, 1.5K Ω, 2.4K Ω, 2.4K Ω, 10K Ω, 15K Ω, 15K Ω, 10K Ω.
Preferably, the electric capacity C1, electric capacity C2, electric capacity C3, electric capacity C4, electric capacity C5 and electric capacity C6 capacitance are followed successively by 220uF、220uF、220uF、22pF、220uF、220pF。
Preferably, the model of the NPN type triode VT1 and NPN type triode VT2 are 1N5551.
In the utility model, in the electronic information anti-jamming circuit input IN access signal first by resistance R1, The input circuit that resistance R2 and electric capacity C4 is formed is input in T-shaped filter circuit, by resistance R3, resistance R4, electric capacity C3, electric capacity C4 Rectifying and wave-filtering, T-shaped filter circuit processing are carried out with the signal that the T-shaped filter circuit that electric capacity C5 is collectively formed exports to input circuit Signal afterwards is input on the pin 2 of chip IC 1, the pin 3 of chip IC 1 IC1 is handled after signal by resistance R5 and two poles The output circuit that pipe D1 is collectively formed be output on output port OUT, now the pin 7 in chip IC 1 without electric discharge, So that PNP type triode Q1 is ended, now by resistance R6, resistance R7, electric capacity C6, resistance R8, NPN type triode VT1 and The oscillating circuit that NPN type triode VT2 is collectively formed does not work, when the pin 2 of chip IC 1 inputs high interference signal, chip IC1 can be crashed, and now the pin 7 of chip IC 1 is discharged, and PNP type triode Q1 is turned on so that power port VCC is to be shaken by what resistance R6, resistance R7, electric capacity C6, resistance R8, NPN type triode VT1 and NPN type triode VT2 were collectively formed Swing circuit to be powered, oscillating circuit carries out opening shake, and reset signal produced by the output end of oscillating circuit is transferred to chip IC 1 On pin 6 so that chip IC 1 continue again before work, and then greatly strengthen the antijamming capability of electronic equipment, this reality Practical with novel economizer, when chip IC 1 causes to crash by the high interference signal that input circuit is inputted, chip IC 1 is drawn Pin 7 is discharged so that PNP type triode Q1 is turned on, and now oscillating circuit can restart chip IC 1, allows chip IC 1 Work before continuation, and then greatly strengthen the antijamming capability of electronic equipment.
Brief description of the drawings
Fig. 1 be the utility model proposes electronic information anti-jamming circuit structural representation.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole Embodiment.
Reference picture 1, electronic information anti-jamming circuit, circuit include chip IC 1, and the pin 2 of chip IC 1 is connected with resistance R4 With electric capacity C2, the electric capacity C2 other end is connected with electric capacity C1, and the electric capacity C1 other end is connected with resistance R2 and resistance R3, resistance The R3 other end is connected with the resistance R4 other end and electric capacity C3, and electric capacity C3 other end ground connection, the resistance R2 other end connect Be connected to resistance R1 and input port IN, and the resistance R1 other end be connected with the pin 1 of chip IC 1, electric capacity C4, electric capacity C5 it is negative Pole and power port VDD, the electric capacity C4 other end and the pin 5 of chip IC 1 are electrically connected with, and the pin 8 of chip IC 1 is connected with core The base stage and chip IC 1 of piece IC1 pin 4, PNP type triode Q1 emitter stage and power port VCC, PNP type triode Q1 Pin 7 be electrically connected with, and PNP type triode Q1 colelctor electrode is connected with resistance R6 and resistance R7, and the resistance R6 other end connects Electric capacity C6 and NPN type triode VT1 colelctor electrode are connected to, NPN type triode VT1 emitter stage is connected with NPN type triode VT2 Emitter stage, and NPN type triode VT1 grounded emitter, NPN type triode VT2 base stage and electric capacity C6 other end electricity Property connection, and NPN type triode VT2 colelctor electrode is connected with resistance R8 and the pin 6 of chip IC 1, the resistance R8 other end and NPN type triode VT1 base stage is electrically connected with, and the pin 3 of chip IC 1 is connected with diode D1 negative pole and resistance R5, and two Pole pipe D1 positive pole is connected with the resistance R5 other end, electric capacity C5 positive pole and output port OUT, the model of chip IC 1 KA555, discharge tube is built-in with chip IC 1, and discharge tube is connected with the pin 7 of chip IC 1, the pin 2 of chip IC 1, draws Pin 3 and pin 6 are followed successively by input, output end and reset terminal, and power port VCC and power port VDD are connected to correspondingly 12 volts of power supplys and 5 volts of power supplys, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7 and resistance R8 Resistance be followed successively by 1.5K Ω, 1.5K Ω, 2.4K Ω, 2.4K Ω, 10K Ω, 15K Ω, 15K Ω, 10K Ω, electric capacity C1, electric capacity C2, electric capacity C3, electric capacity C4, electric capacity C5 and electric capacity C6 capacitance be followed successively by 220uF, 220uF, 220uF, 22pF, 220uF, 220pF, NPN type triode VT1 and NPN type triode VT2 model are 1N5551.
In the utility model, in normal state, the signal of input IN accesses is first by resistance R1, resistance R2 and electric capacity The input circuit that C4 is formed is input in T-shaped filter circuit, common by resistance R3, resistance R4, electric capacity C3, electric capacity C4 and electric capacity C5 The signal that the T-shaped filter circuit formed exports to input circuit carries out rectifying and wave-filtering, the signal input after T-shaped filter circuit processing Onto the pin 2 of chip IC 1, the signal after the pin 3 of chip IC 1 handles IC1 is collectively formed by resistance R5 and diode D1 Output circuit be output on output port OUT, now the pin 7 in chip IC 1 without electric discharge so that positive-negative-positive three Pole pipe Q1 is ended, now by resistance R6, resistance R7, electric capacity C6, resistance R8, NPN type triode VT1 and NPN type triode The oscillating circuit that VT2 is collectively formed does not work, when the signal of input IN accesses is high interference signal, input IN accesses High interference signal is input in T-shaped filter circuit by resistance R1, resistance R2 and electric capacity the C4 input circuit formed first, by resistance The high interference letter that the T-shaped filter circuit that R3, resistance R4, electric capacity C3, electric capacity C4 and electric capacity C5 are collectively formed exports to input circuit Number rectifying and wave-filtering is carried out, the high interference signal after the processing of T-shaped filter circuit is input on the pin 2 of chip IC 1, the meeting of chip IC 1 Crash, now the pin 7 of chip IC 1 is discharged, and PNP type triode Q1 is turned on so that power port VCC serves as reasons The oscillating circuit that resistance R6, resistance R7, electric capacity C6, resistance R8, NPN type triode VT1 and NPN type triode VT2 are collectively formed It is powered, oscillating circuit carries out opening shake, and reset signal produced by the output end of oscillating circuit is transferred to the pin 6 of chip IC 1 On so that chip IC 1 continue again before work, and then greatly strengthen the antijamming capability of electronic equipment.
It is described above, the only preferable embodiment of the utility model, but the scope of protection of the utility model is not This is confined to, any one skilled in the art is in the technical scope that the utility model discloses, according to this practicality New technical scheme and its utility model design are subject to equivalent substitution or change, should all cover in protection model of the present utility model Within enclosing.

Claims (6)

1. electronic information anti-jamming circuit, circuit includes chip IC 1, it is characterised in that the pin 2 of the chip IC 1 is connected with Resistance R4 and electric capacity C2, the electric capacity C2 other end are connected with electric capacity C1, and the electric capacity C1 other end be connected with resistance R2 and Resistance R3, the resistance R3 other end are connected with the resistance R4 other end and electric capacity C3, and electric capacity C3 other end ground connection, institute The other end for stating resistance R2 is connected with resistance R1 and input port IN, and the resistance R1 other end is connected with the pin of chip IC 1 1st, electric capacity C4, electric capacity C5 negative pole and power port VDD, the other end of the electric capacity C4 and the pin 5 of chip IC 1 electrically connect Connecing, the pin 8 of the chip IC 1 is connected with the pin 4 of chip IC 1, PNP type triode Q1 emitter stage and power port VCC, The base stage of the PNP type triode Q1 and the pin 7 of chip IC 1 are electrically connected with, and PNP type triode Q1 colelctor electrode is connected with Resistance R6 and resistance R7, the resistance R6 other end are connected with electric capacity C6 and NPN type triode VT1 colelctor electrode, the NPN Type triode VT1 emitter stage is connected with NPN type triode VT2 emitter stage, and NPN type triode VT1 grounded emitter, The base stage of the NPN type triode VT2 and the electric capacity C6 other end are electrically connected with, and NPN type triode VT2 colelctor electrode connection There are resistance R8 and the pin of chip IC 16, the other end of the resistance R8 and NPN type triode VT1 base stage are electrically connected with, institute The pin 3 for stating chip IC 1 is connected with diode D1 negative pole and resistance R5, and diode D1 positive pole is connected with the another of resistance R5 One end, electric capacity C5 positive pole and output port OUT.
2. electronic information anti-jamming circuit according to claim 1, it is characterised in that the model of the chip IC 1 KA555, discharge tube is built-in with the chip IC 1, and discharge tube is connected with the pin 7 of chip IC 1, the chip IC 1 Pin 2, pin 3 and pin 6 are followed successively by input, output end and reset terminal.
3. electronic information anti-jamming circuit according to claim 1, it is characterised in that the power port VCC and power supply Port VDD is connected to corresponding 12 volts of power supplys and 5 volts of power supplys.
4. electronic information anti-jamming circuit according to claim 1, it is characterised in that the resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7 and resistance R8 resistance are followed successively by 1.5K Ω, 1.5K Ω, 2.4K Ω, 2.4K Ω、10KΩ、15KΩ、15KΩ、10KΩ。
5. electronic information anti-jamming circuit according to claim 1, it is characterised in that the electric capacity C1, electric capacity C2, electric capacity C3, electric capacity C4, electric capacity C5 and electric capacity C6 capacitance are followed successively by 220uF, 220uF, 220uF, 22pF, 220uF, 220pF.
6. electronic information anti-jamming circuit according to claim 1, it is characterised in that the NPN type triode VT1 and NPN type triode VT2 model is 1N5551.
CN201720324936.9U 2017-03-30 2017-03-30 Electronic information anti-jamming circuit Expired - Fee Related CN206727982U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720324936.9U CN206727982U (en) 2017-03-30 2017-03-30 Electronic information anti-jamming circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720324936.9U CN206727982U (en) 2017-03-30 2017-03-30 Electronic information anti-jamming circuit

Publications (1)

Publication Number Publication Date
CN206727982U true CN206727982U (en) 2017-12-08

Family

ID=60503568

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201720324936.9U Expired - Fee Related CN206727982U (en) 2017-03-30 2017-03-30 Electronic information anti-jamming circuit

Country Status (1)

Country Link
CN (1) CN206727982U (en)

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20171208

Termination date: 20180330

CF01 Termination of patent right due to non-payment of annual fee