CN218383954U

CN218383954U - Signal identification circuit

Info

Publication number: CN218383954U
Application number: CN202222905182.XU
Authority: CN
Inventors: 钟昊; 孙智
Original assignee: Anhui Toycloud Technology Co Ltd
Current assignee: Anhui Toycloud Technology Co Ltd
Priority date: 2022-11-01
Filing date: 2022-11-01
Publication date: 2023-01-24
Anticipated expiration: 2032-11-01

Abstract

The invention relates to the technical field of circuits, and provides a signal identification circuit, which comprises: the circuit comprises a comparison unit and a path unit, wherein the path unit comprises an NPN triode, a first field effect transistor and a second field effect transistor; through the comparison unit and the first field effect transistor, the target signal can be identified as a digital signal, and the signal input end of a main control chip of the electronic equipment can be accessed to realize the communication function between the electronic equipment and the outside; through the comparison unit, the NPN triode and the second field effect transistor, the target signal can be identified to be a power signal, and the input end of a charging chip of the electronic equipment can be accessed to realize the charging function of the electronic equipment. The signal identification circuit can accurately judge whether the accessed target signal is a power supply signal for charging or a digital signal for communication, does not need to utilize complex interface resources such as a USB connector and the like, and can realize two functions of charging and communication by only using one signal wire.

Description

Signal identification circuit

Technical Field

The invention relates to the technical field of circuits, in particular to a signal identification circuit.

Background

With the progress of technology, more and more intelligent devices pursue compact and slim shapes to attract the attention of consumers. In a common consumer electronic product, a Universal Serial Bus (USB) connector is used for charging and communication in many options. This kind of mode will charge and the communication is integrated to a connector the inside, can practice thrift the space and facilitate the use, and the concrete expression is when charging for electronic equipment through the Data line, also can utilize two signal feet of the Positive signal foot (Data Positive, DP) and the negative signal foot (Data Minus, DM) of USB interface to let host computer and this electronic equipment's main control chip communicate, has greatly made things convenient for user and developer to operate electronic equipment.

Most existing solutions use TYPE-C USB connectors. Such connectors have 5V power signals, USB2.0 and USB3.0 digital signals, etc. When inserting the USB charging wire, the 5V power is connected to electronic equipment's charging chip input and charges for the battery, and USB2.0 or USB 3.0's digital signal makes and can communicate between host computer and the electronic equipment simultaneously, as long as directly link the signal at both ends, just can send and receive data. This way of charging and communicating using a USB connector has become one of the most common ways for small electronic devices, such as handheld consumer electronic devices like mobile phones, dictionary pens, etc.

However, in the method of charging and communicating by using the USB connector, for the electronic device without the USB communication interface, the electronic device using the main control chip cannot communicate with the upper computer through the USB connector. At this time, the communication protocol is converted by using a tool circuit board of a USB to serial port in a conventional manner, but the tool circuit board has a complex structure and high cost, and is difficult for a general user to obtain. In addition, some electronic devices with very small size, such as calligraphy practicing pens, cannot be installed because the size of the USB connector is too large, and only small-sized magnetic attraction heads can be used for charging. The magnetic suction head is simple to plug and pull, but only can be used for charging and cannot be used for communication because the magnetic suction head only has a power supply and two PINs (PIN) of GND.

Disclosure of Invention

The invention provides a signal identification circuit, which is used for solving the defects that in the prior art, small and medium-sized electronic equipment and electronic equipment without a USB communication interface cannot communicate through a charging wire, so that the communication is inconvenient, and the communication cost is greatly increased.

The present invention provides a signal identification circuit, comprising: the circuit comprises a comparison unit and a path unit, wherein the path unit comprises an NPN triode, a first field effect transistor and a second field effect transistor;

the comparison unit is used for accessing a target signal, dividing the target signal by a first resistor and a second resistor to obtain a target voltage, comparing the target voltage with a reference voltage to obtain and output a comparison result; the target signal comprises a power supply signal or a digital signal, and the reference voltage is the voltage of the digital signal at the high level;

the base electrode of the NPN triode is connected with the output end of the comparison unit through a third resistor, the collector electrode of the NPN triode is used for being connected with the target signal through a fourth resistor, and the emitter electrode of the NPN triode is grounded;

the grid electrode of the first field effect transistor is connected with the output end of the comparison unit, the source electrode of the first field effect transistor is used for accessing the target signal, and the drain electrode of the first field effect transistor is used for being connected with the signal input end of a main control chip of the electronic equipment;

the grid electrode of the second field effect transistor is connected with the collector electrode of the NPN triode, the source electrode of the second field effect transistor is used for accessing the target signal, and the drain electrode of the second field effect transistor is used for being connected with the input end of a charging chip of the electronic equipment.

According to the present invention, there is provided a signal identifying circuit, further comprising: the overvoltage protection unit is connected with the comparison unit;

the overvoltage protection unit is used for accessing an initial signal, performing overvoltage protection on the comparison unit and the access unit, and obtaining and outputting the target signal;

wherein the initial signal comprises a power signal or a digital signal.

According to the signal identification circuit provided by the invention, the overvoltage protection unit is connected with the magnetic suction head;

the magnetic suction head comprises a signal acquisition pin and a grounding pin, wherein the signal acquisition pin is used for being connected with an initial signal source so as to acquire the initial signal.

According to the signal identification circuit provided by the invention, the signal acquisition pin is also connected with the negative electrode of the transient voltage suppressor, and the positive electrode of the transient voltage suppressor is grounded.

According to the signal identification circuit provided by the invention, the overvoltage protection unit comprises a short-circuit resistor, one end of the short-circuit resistor is used for accessing the initial signal, and the other end of the short-circuit resistor is used for outputting the target signal.

According to the signal identification circuit provided by the invention, the overvoltage protection unit further comprises an overvoltage protection chip, an input end filter capacitor and an output end filter capacitor, wherein the overvoltage protection chip comprises an input pin, an output pin, an overvoltage locking pin and a grounding pin;

the input pin is connected with one end of the short-circuit resistor, the output pin is connected with the other end of the short-circuit resistor, and the overvoltage locking pin and the grounding pin are grounded;

one end of the input end filter capacitor is connected with one end of the short-circuit resistor, and the other end of the input end filter capacitor is grounded;

one end of the output end filter capacitor is connected with the other end of the short-circuit resistor, and the other end of the output end filter capacitor is grounded.

According to the signal identification circuit provided by the invention, the comparison unit comprises a comparator, the first resistor and the second resistor;

one end of the first resistor is used for accessing the target signal, the other end of the first resistor is connected with one end of the second resistor, and the other end of the second resistor is grounded;

a homodromous input pin of the comparator is connected with the other end of the first resistor, and a reverse input pin of the comparator is used for accessing the reference voltage; and the output end of the comparator is used for outputting the comparison result.

According to the signal identification circuit provided by the invention, the path unit further comprises a fifth resistor, one end of the fifth resistor is connected with the drain electrode of the first field effect transistor, and the other end of the fifth resistor is grounded.

According to the signal identification circuit provided by the invention, the path unit further comprises a diode and a slow starting capacitor;

the anode of the diode is used for accessing the target signal, and the cathode of the diode is connected with the source electrode of the second field effect transistor;

one end of the slow starting capacitor is connected with the anode of the diode, and the other end of the slow starting capacitor is connected with the grid electrode of the second field effect transistor.

According to the signal identification circuit provided by the invention, the path unit further comprises a sixth resistor;

one end of the sixth resistor is connected with the base electrode of the NPN triode, and the other end of the sixth resistor is grounded.

According to the signal identification circuit provided by the invention, the target signal can be identified to be a digital signal through the comparison unit and the first field effect transistor, and the signal input end of the main control chip of the electronic equipment can be accessed to realize the communication function between the electronic equipment and the outside; through the comparison unit, the NPN triode and the second field effect transistor, the target signal can be identified as a power signal, and the input end of a charging chip of the electronic equipment can be accessed to realize the charging function of the electronic equipment. For electronic equipment without a USB communication interface or a USB connector, the signal identification circuit can accurately judge whether an accessed target signal is a power supply signal for charging or a digital signal for communication, does not need to utilize complex interface resources such as the USB connector and the like, and can realize two functions of charging and communication by only using one signal wire.

Drawings

In order to more clearly illustrate the present invention or the technical solutions in the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic diagram of a signal identification circuit according to the present invention;

FIG. 2 is a schematic diagram of the configuration of a magnetic tip in the signal recognition circuit provided by the present invention;

FIG. 3 is a schematic structural diagram of an overvoltage protection unit in the signal identification circuit provided by the present invention;

fig. 4 is a schematic structural diagram of a comparison unit in the signal identification circuit provided in the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Because the existing USB connector cannot be applied to miniaturized electronic equipment and electronic equipment without a USB communication interface, the electronic equipment cannot be communicated through a charging wire, the communication is inconvenient, only a tool circuit board can be introduced or a wireless communication mode can be adopted, and the communication cost is greatly increased. To this end, in an embodiment of the present invention, a signal identification circuit is provided, which can identify whether an input signal is a power supply signal for supplying power or a digital signal for communication, and then can input the input signal to a corresponding chip to implement a charging function or a communication function.

Fig. 1 is a schematic structural diagram of a signal identification circuit according to an embodiment of the present invention, as shown in fig. 1, the signal identification circuit includes a comparison unit 10 and a path unit 20, where the path unit 20 includes an NPN transistor 201, a first fet 202, and a second fet 203;

the comparison unit 10 is configured to access a target signal, divide the target signal by a first resistor and a second resistor to obtain a target voltage, compare the target voltage with a reference voltage, and output a comparison result; the target signal comprises a power supply signal or a digital signal, and the reference voltage is the voltage of the digital signal at the high level;

the base electrode of the NPN triode 201 is connected with the output end of the comparison unit 10 through a third resistor, the collector electrode of the NPN triode 201 is used for connecting a target signal through a fourth resistor, and the emitter electrode of the NPN triode 202 is grounded;

the gate of the first field effect transistor 202 is connected with the output end of the comparison unit 10, the source of the first field effect transistor 202 is used for accessing a target signal, and the drain of the first field effect transistor 202 is used for connecting with the signal input end of the main control chip 30 of the electronic device;

the gate of the second fet 203 is connected to the collector of the NPN transistor 202, the source of the second fet 203 is configured to receive a target signal, and the drain of the second fet 203 is configured to be connected to the input of the charging chip 40 of the electronic device.

Specifically, the Signal identification circuit provided in the embodiment of the present invention may include a comparing unit 10 and a path unit 20 that are sequentially connected, where the comparing unit 10 may include two input ends and one output end, the two input ends may be respectively used for accessing a target voltage and a reference voltage Vref obtained by dividing through a first resistor and a second resistor, and the comparing unit 10 compares the target Signal with the reference voltage Vref to obtain a comparison result, and outputs the comparison result to the path unit 20 through the output end of the comparing unit 10.

Here, the target Signal may be acquired by a magnetic suction head, or may be a Signal acquired by the magnetic suction head after the Signal is subjected to a press protection, which is not specifically limited herein. Including power signals that can be used to supply power or digital signals that can be used for communication. The voltage of the power supply signal may be 5V. The reference voltage is a voltage when the digital signal is at a high level, and may be 3.3V, which is not limited herein.

It can be understood that the target Signal is divided by the first resistor R1 and the second resistor R2 to obtain a target voltage, and if the target Signal is a power supply Signal, the target Signal supplies power to the comparing unit 10, and at the same time, the resistance values of the first resistor R1 and the second resistor R2 can be controlled so that the target voltage is higher than the reference voltage Vref, and the comparison result obtained by the comparing unit 10 is a high level, which can be represented by 1, for example. At this time, the output terminal of the comparison unit 10 is also at a high level. If the target Signal is a digital Signal, the target voltage is lower than the reference voltage Vref due to the voltage dividing action of the first resistor R1 and the second resistor R2, the target Signal cannot supply power to the comparing unit, the comparing unit 10 does not operate, the comparison result obtained by the comparing unit 10 is empty, that is, the comparing unit 10 does not output, and at this time, the output terminal of the comparing unit 10 defaults to a low level due to the pull-down action of the sixth resistor R6 in the path unit 20, and may be represented by 0, for example.

The pass unit 20 may include an NPN transistor 201, a first fet 202, and a second fet 203. The NPN transistor 201 may include a base b, a collector c, and an emitter e, the base b of the NPN transistor 201 may be connected to the output end of the comparing unit 10 through a third resistor R3, the collector c of the NPN transistor 201 may be connected to the target signal through a fourth resistor R4, the fourth resistor R4 only acts on the power signal, and at this time, is a pull-up resistor, and has no influence on the digital signal. That is, if the target signal is a power signal, the voltage at the collector c of the NPN transistor 201 is low due to the conduction of the NPN transistor 201, and thus is lower than the voltage of the power signal, and if the target signal is a digital signal, the signal at the collector c of the NPN transistor 201 is still a digital signal. The emitter e of the NPN transistor 201 may be grounded. If the output terminal of the comparing unit 10 is at a high level, the NPN transistor 201 is turned on, and if the output terminal of the comparing unit 10 is at a low level, the NPN transistor 201 is turned off.

The first field effect transistor 202 includes a gate g, a source s, and a drain d, the gate g of the first field effect transistor 202 is connected to the output terminal of the comparing unit 10, the source s of the first field effect transistor 202 is used for accessing a target Signal, and the drain of the first field effect transistor 202 is used for connecting to the Signal input terminal of the main control chip 30 of the electronic device. The electronic device is an electronic device that can realize communication by a digital Signal when the target Signal is the digital Signal, and the electronic device is, for example, a mobile phone, a dictionary pen, a scanner pen, or the like. The main control chip 30 is a chip for controlling the communication function of the electronic device.

If the output terminal of the comparing unit 10 is at a low level, the gate g of the first fet 202 is also at a low level, and the target Signal is a digital Signal. Further, when the digital signal is at a high level, since the source s of the first field effect transistor 202 is at a high level, the voltage of the source s is higher than the voltage of the gate g, and the first field effect transistor 202 is turned on, at this time, the high level of the digital signal accessed to the source s of the first field effect transistor 202 may be connected to the signal input terminal of the main control chip 30, and the high level of the digital signal is input to the main control chip; when the digital signal is at a low level, although the gate g of the first fet 202 is at a low level, the source s of the first fet 202 is also at a low level, and the first fet 202 is not turned on. Due to the pull-down effect of the fifth resistor R5, the drain d of the first fet 202 defaults to low level when the first fet 202 is not turned on, so that the low level of the digital signal can be input to the main control chip as well. That is, the high and low levels of the digital signal can be successfully received by the main control chip, so as to realize the communication between the electronic device and the outside.

If the output terminal of the comparing unit 10 is at a high level, the gate g of the first fet 202 is also at a high level, and the first fet 202 is not turned on.

Similarly, the second fet 203 also includes a gate g, a source s, and a drain d, the gate g of the second fet 203 is connected to the collector c of the NPN transistor 201, the source s of the second fet 203 is used for receiving the target signal, and the drain d of the second fet 203 is used for connecting to the input terminal of the charging chip 40 of the electronic device. As can be seen from this, the electronic device is also an electronic device that can be charged by a power supply Signal when the target Signal is the power supply Signal. The charging chip 40 refers to a chip for controlling a charging function of the electronic device.

If the output terminal of the comparing unit 10 is at a low level, the NPN transistor 201 is not turned on, and at this time, the collector c of the NPN transistor 201 is connected to the digital signal, which may be at a high level or a low level. When the digital signal is at a high level, the gate g and the source s of the second fet 203 are at a high level at the same time, and when the digital signal is at a low level, the gate g and the source s of the second fet 203 are at a low level at the same time, so that the second fet 203 cannot be turned on at all times. If the output terminal of the comparing unit 10 is at a high level, the NPN transistor 201 is turned on, the gate g of the second field effect transistor 203 is at a low level, and the second field effect transistor 203 is turned on, at this time, the target Signal accessed to the source s of the second field effect transistor 203 may be connected to the input terminal of the charging chip 40, so as to charge the electronic device. At this time, since the charging chip 40 receives the target Signal, it is described that the Signal identification circuit can identify the target Signal as the power supply Signal.

The signal identification circuit provided in the embodiment of the present invention includes: the circuit comprises a comparison unit and a path unit, wherein the path unit comprises an NPN triode, a first field effect transistor and a second field effect transistor; through the comparison unit and the first field effect transistor, the target signal can be identified as a digital signal, and the signal input end of a main control chip of the electronic equipment can be accessed to realize the communication function between the electronic equipment and the outside; through the comparison unit, the NPN triode and the second field effect transistor, the target signal can be identified to be a power signal, and the input end of a charging chip of the electronic equipment can be accessed to realize the charging function of the electronic equipment. For electronic equipment without a USB communication interface or a USB connector, the signal identification circuit can accurately judge whether an accessed target signal is a power supply signal for charging or a digital signal for communication, does not need to utilize complex interface resources such as the USB connector and the like, and can realize two functions of charging and communication by only using one signal wire.

On the basis of the above embodiment, the signal identifying circuit provided in the embodiment of the present invention further includes: the overvoltage protection unit is connected with the comparison unit;

wherein the initial signal comprises a power signal or a digital signal.

Specifically, in the embodiment of the present invention, the target signal may be a signal obtained by the initial signal Input passing through the overvoltage protection unit, and the initial signal may be acquired by the magnetic chuck. Therefore, in order to obtain the target signal, an overvoltage protection unit connected with the comparison unit can be introduced into the signal identification circuit. The overvoltage protection unit can be used for performing overvoltage protection on the comparison unit and the access unit, and the overvoltage protection process can be understood as a process of filtering abnormal high-voltage signals possibly carried in the accessed initial signals. The target signal can be obtained through the overvoltage protection unit and output.

In the embodiment of the invention, the overvoltage protection unit is introduced, so that the signal identification circuit has an overvoltage protection function, and the safety of the signal identification circuit is improved.

On the basis of the above embodiment, in the signal identification circuit provided in the embodiment of the present invention, the overvoltage protection unit is connected to the magnetic suction head;

Specifically, in the embodiment of the present invention, the initial signal may be acquired through a magnetic suction head, and the structure of the magnetic suction head is shown in fig. 2. This magnetic chuck J2 includes signal acquisition pin D1 and ground pin, and acquisition pin D1 is used for being connected with initial signal source to gather initial signal Input. If the initial signal is a digital signal, the initial signal source may be an external upper computer, and the upper computer may be a computer and may communicate with the electronic device; if the initial signal is a power signal, the initial signal source may be a dc power source to charge the electronic device. If the initial signal is a digital signal, the voltage domain thereof may be a 3.3V voltage domain (i.e., the high level is 3.3V, and the low level is 0V); if the initial signal is a power signal, the voltage of the initial signal may be 5V, or may be other voltage values, and is not limited herein. The ground pins may include two, a first ground pin E1 and a second ground pin E2.

In the embodiment of the invention, the overvoltage protection unit is connected with the magnetic suction head, so that the signal identification circuit can be used for identifying whether the initial signal acquired by the magnetic suction head belongs to a power supply signal or a digital signal, and providing charging and communication functions for electronic equipment with the magnetic suction head.

On the basis of the above embodiment, in the signal identification circuit provided in the embodiment of the present invention, the signal acquisition pin is further connected to a negative electrode of the transient voltage suppressor, and a positive electrode of the transient voltage suppressor is grounded.

Specifically, as shown in fig. 2, the collecting pin D1 of the magnetic chuck J2 is further connected to a negative electrode of a Transient Voltage Suppressor (TVS) 21, and a positive electrode of the Transient Voltage Suppressor 24 is grounded. The tvs 21 is a high performance protection device in the form of a diode. When the two poles of the transient voltage suppressor 21 are impacted by reverse transient high energy, the high impedance between the two poles can be changed into low impedance at the speed of 10 to the power of minus 12 seconds, the surge power up to thousands of watts can be absorbed, the voltage clamp between the two poles is positioned at a preset value, and components in the signal identification circuit can be effectively protected from being damaged by various surge pulses.

On the basis of the foregoing embodiment, in the signal identification circuit provided in the embodiment of the present invention, the overvoltage protection unit includes a short-circuit resistor, one end of the short-circuit resistor is used to access the initial signal, and the other end of the short-circuit resistor is used to output the target signal.

Specifically, if the driving capability of the digital signal is weak, the overvoltage protection unit may only include one short-circuit resistor, and the resistance of the short-circuit resistor may be set according to needs, which is not specifically limited herein, and may be, for example, 0 ohm, and generally not be attached to a chip. One end of the short-circuit resistor is used for accessing an initial signal, and the other end of the short-circuit resistor is used for outputting a target signal. Through the short-circuit resistor, when the OVP chip fails, the chip is attached again, and the signal can be conducted.

On the basis of the above embodiment, in the signal identification circuit provided in the embodiment of the present invention, the overvoltage protection unit further includes an overvoltage protection chip, an input end filter capacitor, and an output end filter capacitor, and the overvoltage protection chip includes an input pin, an output pin, an overvoltage locking pin, and a ground pin;

Specifically, as shown in fig. 3, the overvoltage protection unit includes a short-circuit resistor 31, and in addition, when the driving capability of the digital signal is strong, the overvoltage protection unit further includes an overvoltage protection (OVP) chip 32, an input filter capacitor 33, and an output filter capacitor, where the overvoltage protection chip 32 includes input pins A1 and B1, output pins A2 and B2, an overvoltage locking (OVLO) pin C1, and a ground pin C2.

The input pins A1 and B1 are connected with one end of the short-circuit resistor 31, the output pins A2 and B2 are connected with the other end of the short-circuit resistor 31, and the overvoltage locking pin C1 and the grounding pin C2 are both grounded. One end of the input filter capacitor 33 is connected to one end of the short-circuit resistor 31, and the other end of the input filter capacitor 33 is grounded. One end of the output end filter capacitor is connected with the other end of the short-circuit resistor 31, and the other end of the output end filter capacitor is grounded. Fig. 3 includes two output filter capacitors, namely a first output filter capacitor 34 and a second output filter capacitor 35. The capacitance values of the input filter capacitor 33, the first output filter capacitor 34 and the second output filter capacitor 35 can be set as required, for example, the capacitance value of the input filter capacitor 33 can be 1uF, the capacitance value of the first output filter capacitor 34 can be 10uF, and the capacitance value of the second output filter capacitor 35 can be 100nF.

The overvoltage protection unit provided by the embodiment of the invention has the advantages of simple structure and low cost, and can be suitable for the condition of strong driving capability of digital signals.

On the basis of the foregoing embodiment, in the signal identification circuit provided in an embodiment of the present invention, the comparing unit includes a comparator, the first resistor, and the second resistor;

Specifically, as shown in fig. 4, the comparison unit 10 includes a comparator 101, a first resistor R1, and a second resistor R2. The resistance values of the first resistor R1 and the second resistor R2 can be set according to requirements, for example, the resistance value of the first resistor R1 can be 10K Ω, and the resistance value of the second resistor R2 can be 40K Ω.

One end of the first resistor R1 is used for accessing a target Signal, the other end of the first resistor R1 is connected with one end of the second resistor R2, and the other end of the second resistor R2 is grounded.

A homodromous input pin p2 of the comparator 101 is connected with the other end of the first resistor R1, and a reverse input pin p3 of the comparator 101 is used for accessing a reference voltage Vref; the output terminal p4 of the comparator 101 is used for outputting the comparison result.

The positive side voltage pin p1 of the comparator 101 can be directly connected to the target Signal, and the negative side voltage pin p5 of the comparator 101 is grounded.

It will be appreciated that the inverting input pin p3 of the comparator 101 may also be pulled down to ground through a seventh resistor R7. The resistance of the seventh resistor R7 can be set according to needs, for example, the resistance of the seventh resistor R7 can be 100K Ω.

In the embodiment of the present invention, the target Signal is not directly connected to the unidirectional input pin p2 of the comparator 101, but is sampled by the first resistor R1 and the second resistor R2, so that whether the target Signal is a power Signal or a digital Signal can be determined according to the comparison result of the comparator 101.

On the basis of the foregoing embodiment, in the signal identification circuit provided in the embodiment of the present invention, the path unit further includes a fifth resistor, one end of the fifth resistor is connected to the drain of the first field-effect transistor, and the other end of the fifth resistor is grounded.

Specifically, as shown in fig. 4, the path unit further includes a fifth resistor R5, one end of the fifth resistor R5 is connected to the drain d of the first fet 202, and the other end of the fifth resistor R5 is grounded. When the digital signal is at a low level and the first fet 202 cannot be turned on, the level of the drain d of the first fet 202 may default to a low level through the pull-down action of the fifth resistor R5, so that when the digital signal is at a low level, the input terminal of the main control chip is also at a low level. The resistance of the fifth resistor R5 may be set according to needs, for example, the resistance of the fifth resistor R5 may be 100K Ω.

On the basis of the above embodiment, in the signal identification circuit provided in the embodiment of the present invention, the path unit further includes a diode and a slow start capacitor;

Specifically, as shown in fig. 4, the pass unit further includes a diode 41 and a slow start capacitor 42, an anode of the diode 41 is used for receiving a target signal, and a cathode of the diode 41 is connected to a source s of the second fet 203. Because the diode has the function of unidirectional conduction, the introduction of the diode 41 can ensure that the current of the branch circuit can only flow into the source s of the second field-effect transistor 203 from the target signal without reverse conduction, so that the target signal can be smoothly connected to the charging chip 40 of the electronic device when the target signal is a power supply signal, and the reverse flow of the current can be prevented.

One end of the slow start capacitor 42 is connected with the anode of the diode 41, and the other end of the slow start capacitor 42 is connected with the gate g of the second fet 203, so that when the target signal is a power signal, there is a short slow start process of voltage from high to low.

On the basis of the above embodiment, in the signal identification circuit provided in the embodiment of the present invention, the path unit further includes a sixth resistor;

Specifically, as shown in fig. 4, the path unit further includes a sixth resistor R6. One end of the sixth resistor R6 is connected to the base b of the NPN transistor 201, and the other end of the sixth resistor R6 is grounded. Through the sixth resistor R6, when the target Signal is a digital Signal, the level of the output end of the comparing unit 10 may be pulled down to a low level, so that the first field-effect transistor 202 in the path unit 20 is turned on, the NPN triode 201 and the second field-effect transistor 203 are turned off, and the target Signal accessed to the source s of the first field-effect transistor 202 may be connected to the Signal input end of the main control chip 30, thereby implementing communication between the electronic device and the outside.

One end of the fourth resistor R4 is used for accessing a target Signal, and the other end of the fourth resistor R4 is connected to the collector c of the NPN triode 201, so that the NPN triode 201 is turned on when the target Signal is a power Signal, the gate g of the second field-effect transistor 203 is at a low level, the second field-effect transistor 203 is turned on, and then the target Signal accessed to the source s of the second field-effect transistor 203 can be connected to the input end of the charging chip 40, thereby implementing charging of the electronic device.

The resistances of the third resistor R3, the fourth resistor R4, and the sixth resistor R6 may be set according to requirements, for example, the resistance of the third resistor R3 may be 1K Ω, and the resistances of the fourth resistor R4 and the sixth resistor R6 may be 10K Ω.

The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.

Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a necessary general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims

1. A signal identification circuit, comprising: the circuit comprises a comparison unit and a path unit, wherein the path unit comprises an NPN triode, a first field effect transistor and a second field effect transistor;

the comparison unit is used for accessing a target signal, dividing the target signal by a first resistor and a second resistor to obtain a target voltage, and comparing the target voltage with a reference voltage to obtain and output a comparison result; the target signal comprises a power supply signal or a digital signal, and the reference voltage is the voltage of the digital signal at the high level;

2. The signal identifying circuit of claim 1, further comprising: the overvoltage protection unit is connected with the comparison unit;

wherein the initial signal comprises a power signal or a digital signal.

3. The signal identification circuit of claim 2, wherein the overvoltage protection unit is connected to a magnetic chuck;

the magnetic suction head comprises a signal acquisition pin and a grounding pin, and the signal acquisition pin is used for being connected with an initial signal source to acquire the initial signal.

4. The signal identifying circuit of claim 3, wherein the signal acquisition pin is further connected to a negative terminal of a transient voltage suppressor, and a positive terminal of the transient voltage suppressor is grounded.

5. The signal identification circuit of claim 2, wherein the overvoltage protection unit comprises a short-circuit resistor, one end of the short-circuit resistor is used for connecting the initial signal, and the other end of the short-circuit resistor is used for outputting the target signal.

6. The signal identification circuit of claim 5, wherein the overvoltage protection unit further comprises an overvoltage protection chip, an input filter capacitor and an output filter capacitor, the overvoltage protection chip comprising an input pin, an output pin, an overvoltage lock pin and a ground pin;

7. The signal identifying circuit according to any one of claims 1 to 6, wherein the comparing unit includes a comparator, the first resistance, and the second resistance;

8. The signal identifying circuit according to any one of claims 1 to 6, wherein the path unit further comprises a fifth resistor, one end of the fifth resistor is connected to the drain of the first field effect transistor, and the other end of the fifth resistor is grounded.

9. The signal identifying circuit of any of claims 1-6, wherein the pass unit further comprises a diode and a slow start capacitor;

one end of the slow starting capacitor is connected with the anode of the diode, and the other end of the slow starting capacitor is connected with the grid of the second field effect transistor.

10. The signal identifying circuit of any of claims 1-6, wherein the pass unit further comprises a sixth resistor;