CN206533352U - A kind of voltage is to time converting circuit - Google Patents

Abstract

A voltage-to-time conversion circuit is characterized in that it includes a square wave generating circuit, an inverting integration circuit, a voltage follower, a voltage comparator, and a switch control circuit for selecting one from four. Compared with the prior art, the utility model has the advantages that the voltage-to-time conversion maintains good linear characteristics in a large input voltage range, can improve the voltage-to-time conversion precision, and reduces the conversion time.

Description

A voltage-to-time conversion circuit

technical field

The utility model relates to a signal conversion circuit.

Background technique

In the case of industrial production control, the processing and assembly process of many products requires tracking and positioning signals for products or equipment, but the tracked objects are often far away from the console due to structural and environmental restrictions, and the place where the control signal is obtained is far away from the controller. , or the controlled object is far away from the processor, then signal transmission is required. Voltage signals are susceptible to interference during transmission, and are generally converted into time signals for transmission to improve the system's anti-interference capability. In addition, with the rapid development of computer technology and large-scale integrated circuit technology, analog-to-digital conversion circuit technology is also constantly improving and developing, time-to-digital conversion is easier to implement, and it is convenient for subsequent processing of control signals.

The voltage-to-time converter is a circuit that converts a voltage signal into a time signal. This circuit needs to have good precision and linear input characteristics. Traditionally, there are two main measurement methods. One is to use the same principle as the digital voltmeter. Double-integral conversion technology, if the voltage conversion time is N cycles of the working pulse of the conversion circuit, the required conversion time is greater than 2N cycles of the working pulse, the larger the converted voltage signal, the higher the conversion accuracy requirements, the conversion The longer the time, this greatly limits the conversion rate of the circuit, and for small signal voltage signals, the dynamic response and anti-interference ability of the circuit are relatively poor, and the conversion from voltage to time cannot be realized with high precision. Another voltage-to-time conversion circuit is based on the principle of charge balance, which generates a time pulse signal proportional to the input voltage signal. Since the charge balance circuit uses an integral balance circuit in both positive and negative directions, the nonlinearity of the integral circuit cannot Elimination, especially for small signals, has a relatively large impact. In addition, the input voltage signal needs to be converted into a current signal for comparison, so the performance requirements of the comparator are greatly improved. In order to reduce the offset of the comparator, its pre-stage needs to be driven by a power amplifier. Will bring greater power consumption and complexity to the circuit.

Utility model content

The purpose of the invention of the utility model is to provide a voltage-to-time conversion circuit that maintains good linear characteristics in a large input voltage range, can improve the voltage-to-time conversion accuracy, and reduces the conversion time.

The utility model is realized in this way, including a square wave signal, an inverting integral circuit, a voltage follower, a voltage comparator, and a switch control circuit for selecting one of four, and the inverting integrating circuit includes a resistor R ₁ , an operational amplifier A ₁ , and a capacitor C. _One end of the resistor R1 is connected to the square wave signal _Uf , the other end _of the resistor R1 is connected to the inverting terminal _of the operational amplifier A1, and the inverting terminal _of the operational amplifier A1 is connected to the output terminal U of the operational amplifier A1 through _a capacitor C ₀₁ connected, the non _- inverting terminal of operational amplifier A1 is grounded, the voltage follower includes operational amplifier A2, operational amplifier _A5 , one end of resistors _R2 and _R3 connected in series with power supply U ₊ , resistors R2 _{and R3} connected in series The other end of R ₃ is connected to the output terminal of operational amplifier A ₁ , and the non-inverting terminal of operational amplifier A ₂ is connected between resistors R ₂ and R ₃ connected in series, where R ₂ =R ₃ , the inverting terminal of operational amplifier A ₂ terminal is connected with the output terminal _U02 of the operational amplifier A2, the non _- inverting terminal of the operational amplifier A5 is connected with the output terminal of the _{four -} select _- one switch control circuit, and the inverting terminal of the operational amplifier A5 is connected with the output terminal of the operational amplifier A5, _The output terminal _of the operational amplifier A5 outputs a pulse voltage signal _U0 whose time width is proportional to the converted voltage _Ui . The voltage comparator includes operational amplifier A3 and operational amplifier A4 _{. The} inverting terminal of operational amplifier A3 is connected to the converted The converted voltage signal input is connected to U _i , the non _- inverting terminal of the operational amplifier A3 is connected to the output terminal _U02 of the operational amplifier A2, the inverting terminal _of the operational amplifier A4 is connected to the output terminal _U02 of the operational amplifier A2, and the operational amplifier _A3 is connected to the output terminal _U02 of the operational amplifier A2. The same phase terminal of ₄ is grounded, and the two logic gate control signal input terminals _A and B of the four-select one switch control circuit are respectively connected to the output terminal _{U03 of} the operational amplifier A3 and the output terminal _U04 of the operational amplifier A3, and one of the four is selected. One of the switch inputs of the switch control circuit is connected to the constant voltage U, the other three switch inputs of the four-select one switch control circuit are grounded, and the four-way switch inputs of the four-select one switch control circuit are selected by two logic gating control signals A and B. One way is used as the output of the four-select one switch control circuit, and the switch gating of the four-select one switch logic gating control circuit is realized in this way. When the two logic gating control signal input terminals A and B are both low The output of a switch control circuit gates one of the switches connected to the constant positive voltage U, and when the two signal input terminals A and B are not all at low level, the output of the four-choice one switch control circuit gates the other one connected to the ground respectively. One of the three switches is closed, where U ₊ /2>U _i .

When working, the square wave signal U _f with a certain repetition period (such as 100ms) is added to the input terminal of the inverting integration circuit. When the integrated signal U _f is low level, that is, U _f =0V, the integrator outputs U _O1 is zero, U _O1 is boosted by the voltage boost circuit composed of R ₂ , R ₃ and U and isolated by the voltage follower composed of operational amplifier A ₂ , U _O2 = U ₊ /2, because U ₊ /2>U _i >0, and U _O2 =U ₊ /2 is added to the non-inverting terminal of voltage comparator A ₃ and the inverting terminal of voltage comparator A ₄ at the same time, and voltage comparator A ₃ outputs a high level, which is added to The logic strobe control bit A of the four-select one switch control circuit, that is, A=1, the voltage comparator A ₄ outputs a low level, and this level is added to the logic strobe control bit B of the four-select one switch control circuit, that is When B=0, A=1, and B=0, the output strobe of the four-choice switch control circuit is connected to GND (a ground symbol, which indicates that the potential is zero), and is isolated by the voltage follower composed of the operational amplifier A ₅ Output, its output U _o =0V.

When the integrated signal U _f is high level, such as U _f =+5V, the integrator output U _O1 is a straight line with an initial value of zero and a negative slope. The output U _O1 of the integrator is boosted by the voltage boost circuit composed of R ₂ , R ₃ and U ₊ and isolated by the voltage follower composed of the operational amplifier A ₂ , the output of the integrator is increased by U ₊ /2, that is, U _O2 is The initial value is a straight line with a negative slope of U ₊ /2. When the integrator output drops, U _O2 also drops. When U _O2 >U _i >0, the whole circuit keeps the integrated signal U _{f at} low level, that is _, the state when U _{f =} 0V; The level is flipped to low level, A=0, the state of voltage comparator A ₄ remains unchanged, B=0, when A=0, B=0, the output strobe of the four-selection switch control circuit is connected to the constant positive voltage U, The voltage follower formed by the operational amplifier A ₅ performs isolated output, and its output U _o is a constant positive voltage U; when it drops to U _O2 ≤ 0V, the voltage comparator A ₄ flips from low level to high level, B= 1. The state of the voltage comparator A ₃ remains unchanged. At this time, when A=0 and B=1, the output strobe of the four-choice switch control circuit is connected to GND (a ground symbol, and the potential indicated by it is zero), and the operational amplifier The voltage follower composed of A ₅ performs isolated output, and its output U _o =0V. Apparently during the period of 0≤U _O2 ≤U _i , A=0, B= ₀ , the output of the operational amplifier A5 maintains U _o as a constant positive voltage U, and the maintaining time is T, because T is formed by the straight line of U _i and the integral output Right-angled triangle relationship, so T=kU _i , k is a constant coefficient, that is, when U _i is the converted voltage change, the width T of the output voltage U _o of the operational amplifier _A5 also changes proportionally, that is, the voltage to time conversion.

Compared with the prior art, the utility model adopts the inverting integral circuit, the voltage follower, the voltage comparator, the four-choice one switch control circuit, etc., and directly adopts the voltage comparison, avoiding the double-integral conversion or the voltage-to-current conversion in the traditional scheme. The method of comparison after the conversion realizes that the voltage-to-time conversion maintains good linear characteristics within a large input voltage range, improves the voltage-to-time conversion accuracy, and reduces the conversion time. Therefore, it has the advantages of simple and reliable circuit, strong anti-interference ability, strong digital compatibility of the circuit, suitable for main logic circuits such as TTL and COMS, and small dynamic energy loss.

Description of drawings

Fig. 1 is the circuit diagram of the present utility model;

Figure 2 is a waveform diagram of voltage-to-time conversion.

detailed description

Now in conjunction with accompanying drawing and embodiment the utility model is described in further detail:

As shown in Figure 1, the utility model includes a square wave signal U _f , an inverting integration circuit 1, a voltage follower 2, a voltage comparator 3, and a switch control circuit 4 for selecting one of four, and the inverting integration circuit 1 includes a resistor R ₁ , Operational amplifier A ₁ , capacitor C, one end of resistor R ₁ is connected to square wave signal U _f , the square wave signal U _f is a square wave with a repetition period of 100ms and a voltage of +5V, the other end of resistor R ₁ is connected to operational amplifier A ₁ , the inverting terminal of the operational amplifier A1 is connected to the output terminal _{U01 of} the operational amplifier A1 through _a capacitor C, the non _- inverting terminal of the operational amplifier A1 is grounded, and the voltage follower ₂ includes the operational amplifier A2, operational In the amplifier A ₅ , one end of the resistors R ₂ and R ₃ connected in series is connected to the power supply U ₊ , the other end of the resistors R ₂ and R ₃ connected in series is connected to the output terminal of the operational amplifier A ₁ , and the non-inverting terminal of the operational amplifier A ₂ Connected between resistors R ₂ and R ₃ connected in series, where R ₂ =R ₃ , the inverting terminal of the operational amplifier A ₂ is connected to the output terminal U ₀₂ of the operational amplifier A ₂ , the non-inverting terminal of the operational amplifier A ₅ is connected to the four _The output terminal of the optional switch control circuit ₄ is connected, the inverting terminal of the operational amplifier A5 is connected with the output terminal of the operational amplifier _A5 , and the output terminal of the operational amplifier A5 outputs a pulse whose time width is proportional to the converted voltage U _i Voltage signal U ₀ , voltage comparator 3 includes operational amplifier A ₃ , operational amplifier A ₄ , the inverting terminal of operational amplifier A ₃ is connected to the input U _i of the converted voltage signal, and the non-inverting terminal of operational amplifier A ₃ is connected to operational amplifier A ₂ The output terminal U ₀₂ of the operational amplifier A ₄ is connected, the inverting terminal of the operational amplifier A 4 is connected with the output terminal U ₀₂ of the operational amplifier A ₂ , the non-inverting terminal of the operational amplifier A ₄ is grounded, and the two logic gate control signals of the four-select-one switch control circuit 4 The input terminals _A and B are respectively connected to the output terminal _U03 of the operational amplifier A3 and the output terminal _{U04 of} the operational amplifier A3, and one of the switch inputs of the four-selection switch control circuit 4 is connected to the constant voltage U, and the four-selection one switch The other three switch inputs of the control circuit 4 are grounded, and the four-way switch inputs of the one-of-four switch control circuit 4 are selected as the output of the one-of-four switch control circuit 4 through two logic gating control signals A and B. The switch strobe of the switch logic strobe control circuit is realized in this way, when the two logic strobe control signal input terminals A and B are both low level, the output strobe of the four-select-one switch control circuit 4 is connected to the constant positive voltage U One of the switches is closed, when the two signal input terminals A and B are not all low (that is, A=1, B=0; A=1, B=1; A=0, B=1), one of the four The output of the switch control circuit 4 gates one of the other three switches connected to the ground to close, wherein U ₊ /2>U _i .

When working, the square wave signal U _f is added to the input terminal of the inverting integration circuit 1. When the integrated signal U _f is low level, that is, when U _f =0V, the integrator output U _O1 is zero, and U _O1 is passed through The voltage boost circuit composed of R ₂ , R ₃ and U is boosted and the voltage follower _{2 composed of the operational amplifier A 2} is isolated, U _O2 = U ₊ /2, because U ₊ /2>U _i >0, and U _O2 =U ₊ /2 is added to the non-inverting terminal of the voltage comparator A ₃ and the inverting terminal of the voltage comparator A ₄ at the same time, the voltage comparator A ₃ outputs a high level, and this level is added to the four-choice switch control circuit 4 The logic strobe control bit A of A, that is, A=1, the voltage comparator A ₄ outputs a low level, and this level is added to the logic strobe control bit B of the four-select-one switch control circuit 4, that is, B=0, A =1, B=0, when the output strobe of the four-choice switch control circuit is connected to GND (a ground symbol, the potential indicated by it is zero), the voltage follower 2 composed of the operational amplifier A ₅ is isolated and output, and the output U _o =0V.

As shown in Figure 2, when the integrated signal U _f is high level + 5V, the integrator output U _O1 is a straight line C with an initial value of zero and a negative slope (-1/RC). The output U _O1 of the integrator is boosted by the voltage boost circuit composed of R ₂ , R ₃ and U ₊ and isolated by the voltage follower 2 composed of the operational amplifier A ₂ , and the output of the integrator is increased by U ₊ /2, namely U _O2 It is a straight line D whose initial value is U ₊ /2 and whose slope is negative (-1/RC). When the integrator output drops, U _O2 also drops. When U _O2 >U _i >0, the whole circuit keeps the integrated signal U _{f at} low level, that is _, the state when U _{f =} 0V; The level is flipped to low level, A=0, the state of voltage comparator A ₄ remains unchanged, B=0, when A=0, B=0, the output strobe of the four-select-one switch control circuit 4 is connected to the constant positive voltage U , the voltage follower 2 formed by the operational amplifier A ₅ performs isolated output, and its output U _o is a constant positive voltage U; when it drops to U _O2 ≤ 0V, the voltage comparator A ₄ flips from low level to high level, B=1, the state of the voltage comparator A ₃ remains unchanged. At this time, when A=0 and B=1, the output strobe of the four-select-one switch control circuit 4 is connected to GND (a ground symbol, and the potential indicated by it is zero), The voltage follower ₂ formed by the operational amplifier A5 performs isolated output, and its output U _o =0V. Obviously during the period of 0≤U _O2 ≤U _i , A=0, B= ₀ , the output of the operational amplifier A5 maintains U _o as a constant positive voltage U=+3V, and the maintaining time is T, because T and U _i and the integral output The straight line forms a right triangle relationship, so T=kU _i , k is a constant coefficient, that is, when U _i is the converted voltage change, the width T of the output voltage U _o of the operational amplifier _A5 also changes proportionally, that is A voltage-to-time conversion is realized.

Claims (1)

1. a kind of voltage is to time converting circuit, it is characterised in that including square-wave signal, anti-phase integrator, voltage follower, Voltage comparator, four select an ON-OFF control circuit, and anti-phase integrator includes resistance R₁, operational amplifier A₁, electric capacity C, resistance R₁ One end and square-wave signal U_fIt is connected, resistance R₁The other end and operational amplifier A₁End of oppisite phase be connected, operational amplifier A₁'s End of oppisite phase passes through electric capacity C and operational amplifier A₁Output end U₀₁It is connected, operational amplifier A₁In-phase end ground connection, voltage follow Device includes operational amplifier A₂, operational amplifier A₅, the resistance R after series connection₂、R₃One end and power supply U₊It is connected, the electricity after series connection Hinder R₂、R₃The other end and operational amplifier A₁Output end be connected, operational amplifier A₂In-phase end connection electricity after concatenation Hinder R₂、R₃Between, R here₂=R₃, operational amplifier A₂End of oppisite phase and operational amplifier A₂Output end U₀₂It is connected, operation amplifier Device A₅In-phase end select the output end of an ON-OFF control circuit to be connected with four, operational amplifier A₅End of oppisite phase and operational amplifier A₅Output end be connected, operational amplifier A₅Output end be output as time width with by conversion voltage U_iThe pulse electricity being directly proportional Press signal U₀, voltage comparator include operational amplifier A₃, operational amplifier A₄, operational amplifier A₃End of oppisite phase with being changed Voltage signal inputs U_iIt is connected, operational amplifier A₃In-phase end and operational amplifier A₂Output end U₀₂It is connected, operational amplifier A₄End of oppisite phase and operational amplifier A₂Output end U₀₂It is connected, operational amplifier A₄In-phase end ground connection, four select a switch control Two logic gate control signal input A, B of circuit respectively with operational amplifier A₃Output end U₀₃And operational amplifier A₃'s Output end U₀₄It is connected, four select wherein the one of an ON-OFF control circuit to switch input is connected with constant voltage U, and four select a switch to control The other three switch input grounding of circuit, four select the four-way switch of an ON-OFF control circuit to input through two logic gate control signals A, B are gated all the way as four outputs for selecting an ON-OFF control circuit, and four select the switching gate of a switching logic gate control circuit It is achieved in that four select the defeated of an ON-OFF control circuit when two logic gate control signal input A, B are low level Go out the wherein one switch closure that gating is connected with constant positive voltage U, when two signal input part A, B are not all low level, four choosings A closure in the output of the one ON-OFF control circuit the other three switch that gating and ground connection are connected respectively, wherein U₊/2>U_i。