CN206422059U - Encapsulating structure - Google Patents

Encapsulating structure Download PDF

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Publication number
CN206422059U
CN206422059U CN201621037387.9U CN201621037387U CN206422059U CN 206422059 U CN206422059 U CN 206422059U CN 201621037387 U CN201621037387 U CN 201621037387U CN 206422059 U CN206422059 U CN 206422059U
Authority
CN
China
Prior art keywords
substrate
control chip
top surface
encapsulating structure
connection electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201621037387.9U
Other languages
Chinese (zh)
Inventor
孙文思
白安鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ofilm Microelectronics Technology Co ltd
Jiangxi OMS Microelectronics Co Ltd
Original Assignee
Nanchang OFilm Biometric Identification Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanchang OFilm Biometric Identification Technology Co Ltd filed Critical Nanchang OFilm Biometric Identification Technology Co Ltd
Priority to CN201621037387.9U priority Critical patent/CN206422059U/en
Priority to US15/489,850 priority patent/US10192093B2/en
Application granted granted Critical
Publication of CN206422059U publication Critical patent/CN206422059U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Transducers For Ultrasonic Waves (AREA)

Abstract

The utility model, which discloses a kind of encapsulating structure, is used for ultrasonic fingerprint sensor, and it includes substrate, control chip, connecting line, ultrasonic probe and encapsulating material.The control chip is set on the substrate.The connecting line connects the control chip and the substrate by routing technology.The ultrasonic probe is arranged on the control chip, and the ultrasonic probe is used to launch ultrasonic wave under the control of the substrate and the control chip and detects the ultrasonic wave reflected.The encapsulating material covers the substrate, the control chip and the connecting line and the fixed ultrasonic probe by mould pressing technology.In above-mentioned encapsulating structure, due to routing technology and mould pressing technology are applied into connecting line and encapsulating material, packaging efficiency can be improved, cost is reduced.

Description

Encapsulating structure
Technical field
The utility model is related to ultrasonic fingerprint sensor, and in particular to a kind of encapsulation for ultrasonic fingerprint sensor Structure.
Background technology
The encapsulating structure of existing ultrasonic sensor include substrate, control chip and ultrasonic probe, control chip with Substrate connection, and coordinate co- controlling ultrasonic probe with substrate.Control chip passes through silicon hole technology and substrate connection, manufacture The high encapsulating structure of cost.
Utility model content
The utility model is intended at least solve one of technical problem in correlation technique to a certain extent.Therefore, this reality With a kind of encapsulating structure of new proposition.
The encapsulating structure of the utility model embodiment be used for ultrasonic fingerprint sensor, it include substrate, control chip, Connecting line, ultrasonic probe and encapsulating material.The control chip is set on the substrate.The connecting line passes through routing skill Art connects the control chip and the substrate.The ultrasonic probe is arranged on the control chip, and the ultrasonic wave is visited Head is used to launch ultrasonic wave under the control of the substrate and the control chip and detects the ultrasonic wave reflected.The envelope Package material covers the substrate, the control chip and the connecting line and the fixed ultrasonic probe by mould pressing technology.
In above-mentioned encapsulating structure, due to routing technology and mould pressing technology are applied into connecting line and encapsulating material, Ke Yiti High packaging efficiency, reduces cost.
In some embodiments, the substrate includes substrate top surface, and the control chip includes and the substrate top surface The die bottom surface of cooperation.The encapsulating structure includes connecting the substrate top surface and the first adhesive-layer of the die bottom surface.
In some embodiments, the control chip falls in the substrate top surface in the orthographic projection of the substrate top surface It is interior.
In some embodiments, the substrate includes the substrate top surface substrate bottom surface opposite with the substrate top surface, institute Stating substrate includes being formed at the first connection electrode of the substrate top surface and is formed at the 3rd connection electrode of the substrate bottom surface, Predetermining circuit is formed in the substrate and connects first connection electrode and the 3rd connection electrode in a predetermined manner with reality Existing predetermined function.
In some embodiments, the 3rd connection electrode is land grid array weld pad.
In some embodiments, the ultrasonic probe includes piezoelectric layer, transmitting limit and receives polar curve.The piezoelectricity Layer is made up of piezo column array.The transmitting limit is formed at below the piezoelectric layer, each transmitting limit with it is corresponding A piece piezo column connection.The receiving pole line is formed above the piezoelectric layer, every described receive polar curve with it is corresponding Piezo column described in a line is connected.
In some embodiments, the transmitting limit is provided with probe connection electrode.The control chip includes chip Top surface, the control chip includes being formed at the 4th connection electrode of the chip top surface.It is described probe connection electrode with it is described 4th connection electrode correspondence is connected.
In some embodiments, the ultrasonic probe is pasted using flip chip mounting technique with the control chip Close.
In some embodiments, the ultrasonic probe includes the probe top surface away from the substrate, the package material Material is flushed with the probe top surface.
Additional aspect and advantage of the present utility model will be set forth in part in the description, partly by from following description In become obvious, or by it is of the present utility model practice recognize.
Brief description of the drawings
Of the present utility model above-mentioned and/or additional aspect and advantage are from description of the accompanying drawings below to embodiment is combined It will be apparent and be readily appreciated that, wherein:
Fig. 1 is the floor map of the encapsulating structure of the utility model embodiment.
Fig. 2 is the floor map of the substrate of the utility model embodiment.
Fig. 3 is the floor map of the control chip of the utility model embodiment.
Fig. 4 is the floor map of the ultrasonic probe of the utility model embodiment.
Fig. 5 is another floor map of the encapsulating structure of the utility model embodiment.
Embodiment
Embodiment of the present utility model is described further below in conjunction with accompanying drawing.Same or similar label in accompanying drawing Same or similar element or the element with same or like function are represented from beginning to end.
In addition, the embodiment of the present utility model described below in conjunction with the accompanying drawings is exemplary, it is only used for explaining this reality With new embodiment, and it is not intended that to limitation of the present utility model.
Referring to Fig. 1, the encapsulating structure 10 of the utility model embodiment includes substrate 12, control chip 14, connecting line 16th, ultrasonic probe 18 and encapsulating material 11.Control chip 14 is set on the substrate 12.Connecting line 16 is connected by routing technology Control chip 14 and substrate 12.Ultrasonic probe 18 is arranged on control chip 14, ultrasonic probe 18 be used in substrate 12 and Launch ultrasonic wave under the control of control chip 14 and detect the ultrasonic wave reflected.Encapsulating material 11 is covered by mould pressing technology Lid substrate 12, control chip 14 and connecting line 16 and mounting ultrasonic probe 18.
Routing technology and mould pressing technology are applied to connecting line 16 and envelope by the encapsulating structure 10 of the utility model embodiment Package material 11, can improve packaging efficiency, reduce cost.
In some embodiments, substrate 12 can be printed circuit board (PCB) or be formed with the silicon base of circuit.
In some embodiments, substrate 12 includes substrate top surface 122, and control chip 14 includes matching somebody with somebody with substrate top surface 122 The die bottom surface 142 of conjunction.Encapsulating structure 10 includes connecting substrate top surface 122 and the first adhesive-layer 13 of die bottom surface 142.
In other words, control chip 14 is fixed on the substrate 12 by the first adhesive-layer 13, in this way, it is simple in construction, it is easy to Processing, can further reduce cost.Meanwhile, using gluing connected mode control chip 14 can be made to be fixed with substrate 12 and connected The space for connecing occupancy is smaller, and then make it that the volume of encapsulating structure 10 is smaller.
In some embodiments, control chip 14 can also be connected with substrate 12 using other modes, or pass through envelope Package material 11 makes control chip 14 be brought into close contact with substrate 12.
In some embodiments, the first adhesive-layer 13 is diallyl fumarate glue or liquid non-conductive adhesive.
In this way, the first adhesive-layer 13 has good adhesive property, and then make it that control chip 14 is Nian Jie with substrate 12 Stability is higher.The cost of glue sticking control chip 14 and substrate 12 produce in enormous quantities simultaneously in using the above-mentioned type is relatively low, So as to reduce the packaging cost of encapsulating structure 10.
In other embodiments, the material of the first adhesive-layer 13 is not limited to embodiment discussed above, can also root Set according to actual conditions.
In some embodiments, control chip 14 falls in substrate top surface 122 in the orthographic projection of substrate top surface 122.
In this way, encapsulating material 11 can be contacted with substrate top surface 122, so as to improve the package strength of encapsulating material 11.
In some embodiments, substrate 12 and control chip 14 can substantially rectangular sheets.The chi of control chip 14 The very little size less than substrate 12, control chip 14, which aligns, is arranged on the center of substrate 12, and therefore, control chip 14 is in substrate The orthographic projection of top surface 122 falls in substrate top surface 122.
In some embodiments, circuit substrate 12 includes being formed at the first connection electrode 124 of substrate top surface 122.Electricity Road chip 14 includes the chip top surface 146 away from circuit substrate 12, and circuit chip 14 includes being formed at the of chip top surface 146 Two connection electrodes 144.First connection electrode 124 is connected with the second connection electrode 144 by connecting line 16.
So so that circuit substrate 12 is connected with the circuit of circuit chip 14.Due to the connection using connecting line 16 Mode so that the first connection electrode 124 and the second connection electrode 144 need not be arranged on ad-hoc location in order to circuit substrate 12 With the electrical connection between circuit chip 14, and then make it that the circuit design of circuit substrate 12 and circuit chip 14 is fairly simple, drop Low circuit design cost, improves design efficiency.
In some embodiments, the first connection electrode 124 is connected with the second connection electrode 144 by the way of routing.
Specifically, the first connection electrode 124 connects with the second connection electrode 144 by way of wire bonder is using metal routing Connect.In this way, be easy to implement between the first connection electrode 124 and the second connection electrode 144 it is quick electrically connect, and then improve the Joint efficiency between one connection electrode 124 and the second connection electrode 144, reduces link cost.
Referring to Fig. 2, in some embodiments, circuit substrate 12 includes the substrate bottom surface opposite with substrate top surface 122 126, circuit substrate 12, which includes being formed in the 3rd connection electrode 128 of substrate bottom surface 126, circuit substrate 12, forms predetermined electricity Road connects the first connection electrode 124 and the 3rd connection electrode 128 to realize predetermined function in a predetermined manner.
In this way, circuit substrate 12 provides the tie point of connection for external circuit (not shown), so that external circuit can lead to Cross the 3rd connection electrode 128 to be connected with circuit substrate 12, that is to say the setting of the 3rd connection electrode 128 so that encapsulating structure 10 It can be connected with external circuit.
In some embodiments, the 3rd connection electrode 128 be land grid array weld pad (Land Grid Array, LGA)。
In this way, the electrical connection between the 3rd connection electrode 128 and external circuit is applied to surface mounting technology technique.Therefore Circuit substrate 12 can pass through contact portion with external circuit, it is to avoid be connected using the mode of welding, and then be easy to encapsulation to tie Installation, dismounting and the replacing of structure 10.
In some embodiments, the 3rd connection electrode 128 is arranged in substrate 12, and the 3rd connection electrode 128 is away from base The side 128a of plate 12 is flushed with substrate bottom surface 126.
It is appreciated that the position relationship of the 3rd connection electrode 128 and substrate bottom surface 126 can be set according to actual conditions, And it is not limited to embodiment discussed above.
Fig. 4 and Fig. 5 is referred to, in some embodiments, ultrasonic probe 18 includes piezoelectric layer 182, transmitting limit 184 And receive polar curve 186.Piezoelectric layer 182 is made up of piezo column 182a arrays.Transmitting limit 184 is formed at the lower section of piezoelectric layer 182, often Individual transmitting limit 184 and corresponding piezo column 182a connections.Receive polar curve 186 and be formed at the top of piezoelectric layer 182, every Receive polar curve 186 and corresponding a line piezo column 182a connections.
In this way, transmitting limit 184 can be excited individually to a certain piezo column 182a, it is to avoid row excites multiple piezoelectricity Post 182a and produce larger lateral noise, and then ensure that ultrasonic probe 18 can more accurately recognize fingerprint.Simultaneously because The power that point is excited is smaller, thus the energy consumption of ultrasonic probe 18 is smaller.In addition, when transmitting limit 184 is entered with control chip 14 During row bonding, point-to-point bonding can be passed through.
In some embodiments, separation layer 188 is provided between pressure point post 182a, separation layer 188 is epoxy resin material Matter.
In this way, the gap between piezo column 182a is filled using insulating materials, can prevent piezo column 182a it Between ultrasonic wave launched and process is received produce influence, and then reduce lateral noise.
In some embodiments, transmitting limit 184 is alloy-layer 184a, and alloy-layer 184a material can be copper, nickel Or the metal material such as silver is made.
So so that emitter stage point 184 has preferable electric conductivity.
In some embodiments, transmitting limit 184 includes being arranged on the backing metal 184b below alloy-layer 184a.
In this way, the padded whole ultrasonic probes 18 of backing metal 184b, are easy to transmitting limit 184 to connect with control chip 14 Connect.
Referring to Fig. 3, in some embodiments, transmitting limit 184 is provided with probe connection electrode (not shown).Control Chip 14 includes chip top surface 146, and control chip 14 includes being formed at the 4th connection electrode (not shown) of chip top surface 146; Connection electrode of popping one's head in connection corresponding with the 4th connection electrode.
It is brought into close contact in this way, being easy to implement ultrasonic probe 18 and being realized with control chip 14, and then realizes stable be electrically connected Connect.
Referring to Fig. 5, in some embodiments, the 4th connection electrode is arranged in control chip 14, control chip 14 Hole is formed with above the 4th connection electrode, probe connection electrode is embedded in hole.
In this way, being easy to the connection between the probe connection electrode of ultrasonic probe 18 and the 4th connection electrode.
It is appreciated that in other embodiments, the position relationship of the 4th connection electrode and control chip 14 can basis Actual conditions are set, and are not limited to embodiment discussed above.
In some embodiments, predetermining circuit is formed in control chip 14 and connects the second connection electrode in a predetermined manner 144 and the 4th connection electrode to realize predetermined function.
In this way, control chip 14 is the tie point that ultrasonic probe 18 provides connection, so that ultrasonic probe 18 can lead to Cross the 4th connection electrode connection control chip 14.
In some embodiments, control chip 14 can be application specific integrated circuit, for controlling ultrasonic probe 18.
In some embodiments, ultrasonic probe 18 is fitted using flip chip mounting technique with control chip 14.
So so that ultrasonic probe 18 can preferably fit with control chip 14, the space that takes is smaller, and then subtract The small volume of encapsulating structure 10.Ensure that the electrical connection stability between ultrasonic probe 18 and control chip 14 is higher simultaneously.
Referring to Fig. 1, in some embodiments, encapsulating structure 10 includes the second adhesive-layer 15, the second adhesive-layer 15 will Ultrasonic probe 18 is bonded on control chip 14.
So so that ultrasonic probe 18 is more brought into close contact with control chip 14, and it is firmly secured to control chip 14 On.
In some embodiments, the second adhesive-layer 15 is consistent with the material of the first adhesive-layer 13, in order to encapsulating structure 10 encapsulation, and reduce bonding cost.
In some embodiments, ultrasonic probe 18 include away from substrate 12 probe top surface 181, encapsulating material 11 with Probe top surface 181 is flushed.
Contacted in this way, reducing ultrasonic probe 18 with the external world, and then play a part of protecting ultrasonic probe 18.
In some embodiments, encapsulating structure 10 is in rectangular-shape, and then make it that structure is compacter.It is appreciated that The shape of encapsulating structure 10 can be set according to actual conditions, and be not limited to the shape that above-mentioned embodiment is discussed.
In some embodiments, encapsulating material 11 is epoxy resin.
Because epoxy resin has excellent adhesive strength to the surface of metal and nonmetallic materials, dielectric properties are good, Deformation retract rate is small, and product size stability is good, and hardness is high, pliability preferably, the features such as to alkali and most of solvent-stable.Such as This, encapsulating material 11 uses epoxy resin as filled media, is easy to encapsulation ultrasonic sensor structure 10 and causes encapsulation knot Structure is more stablized.
In some embodiments, the material of encapsulating material 11 can also can also be simultaneously for other non-conductive materials Other non-depressed electric materials.
It is appreciated that the material of encapsulating material 11 can be set according to actual conditions, and it is not limited to implementation discussed above Mode.
In the utility model, unless otherwise clearly defined and limited, fisrt feature is "above" or "below" second feature Can be that the first and second features are directly contacted, or the first and second features pass through intermediary mediate contact.Moreover, first is special Levy second feature " on ", " top " and " above " but fisrt feature directly over second feature or oblique upper, or only Represent that fisrt feature level height is higher than second feature.Fisrt feature second feature " under ", " lower section " and " below " can be with Be fisrt feature immediately below second feature or obliquely downward, or be merely representative of fisrt feature level height less than second feature.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show The description of example " or " some examples " etc. means to combine specific features, structure, material or the spy that the embodiment or example are described Point is contained at least one embodiment of the present utility model or example.In this manual, to the schematic table of above-mentioned term State and be necessarily directed to identical embodiment or example.Moreover, specific features, structure, material or the feature of description can be with Combined in an appropriate manner in any one or more embodiments or example.In addition, in the case of not conflicting, this area Technical staff the not be the same as Example or the feature of example and non-be the same as Example or example described in this specification can be entered Row is combined and combined.
Although embodiment of the present utility model has been shown and described above, it is to be understood that above-described embodiment is Exemplary, it is impossible to it is interpreted as to limitation of the present utility model, one of ordinary skill in the art is in scope of the present utility model It is interior above-described embodiment to be changed, changed, replaced and modification.

Claims (9)

1. a kind of encapsulating structure, for ultrasonic fingerprint sensor, it is characterised in that the encapsulating structure includes:
Substrate;
Control chip, the control chip is set on the substrate;
Connecting line, the connecting line connects the control chip and the substrate by routing technology;
Ultrasonic probe, the ultrasonic probe is arranged on the control chip, and the ultrasonic probe is used in the base Launch ultrasonic wave under the control of plate and the control chip and detect the ultrasonic wave reflected;And
Encapsulating material, the encapsulating material covers the substrate, the control chip and the connecting line simultaneously by mould pressing technology The fixed ultrasonic probe.
2. encapsulating structure as claimed in claim 1, it is characterised in that the substrate includes substrate top surface, the control chip Including the die bottom surface coordinated with the substrate top surface;
The encapsulating structure includes connecting the substrate top surface and the first adhesive-layer of the die bottom surface.
3. encapsulating structure as claimed in claim 2, it is characterised in that orthographic projection of the control chip in the substrate top surface Fall in the substrate top surface.
4. encapsulating structure as claimed in claim 1, it is characterised in that the substrate include substrate top surface and with the substrate top The opposite substrate bottom surface in face, the substrate includes being formed at the first connection electrode of the substrate top surface and is formed at the substrate Predetermining circuit is formed in 3rd connection electrode of bottom surface, the substrate and connects first connection electrode and institute in a predetermined manner The 3rd connection electrode is stated to realize predetermined function.
5. encapsulating structure as claimed in claim 4, it is characterised in that the 3rd connection electrode is welded for land grid array Pad.
6. encapsulating structure as claimed in claim 1, it is characterised in that the ultrasonic probe includes:
Piezoelectric layer, the piezoelectric layer is made up of piezo column array;
Launch limit, the transmitting limit is formed at below the piezoelectric layer, each transmitting limit and a corresponding institute State piezo column connection;And
Polar curve is received, the receiving pole line is formed above the piezoelectric layer, every reception polar curve and corresponding a line institute State piezo column connection.
7. encapsulating structure as claimed in claim 6, it is characterised in that the transmitting limit is provided with probe connection electrode;
The control chip includes chip top surface, and the control chip includes the 4th connection electricity for being formed at the chip top surface Pole;
The probe connection electrode connection corresponding with the 4th connection electrode.
8. encapsulating structure as claimed in claim 7, it is characterised in that the ultrasonic probe uses flip chip mounting technique Fitted with the control chip.
9. encapsulating structure as claimed in claim 1, it is characterised in that the ultrasonic probe includes the spy away from the substrate Crown face, the encapsulating material is flushed with the probe top surface.
CN201621037387.9U 2016-09-05 2016-09-05 Encapsulating structure Expired - Fee Related CN206422059U (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201621037387.9U CN206422059U (en) 2016-09-05 2016-09-05 Encapsulating structure
US15/489,850 US10192093B2 (en) 2016-09-05 2017-04-18 Ultrasonic fingerprint sensor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621037387.9U CN206422059U (en) 2016-09-05 2016-09-05 Encapsulating structure

Publications (1)

Publication Number Publication Date
CN206422059U true CN206422059U (en) 2017-08-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621037387.9U Expired - Fee Related CN206422059U (en) 2016-09-05 2016-09-05 Encapsulating structure

Country Status (1)

Country Link
CN (1) CN206422059U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108766974A (en) * 2018-08-08 2018-11-06 苏州晶方半导体科技股份有限公司 A kind of chip-packaging structure and chip packaging method
CN108960218A (en) * 2018-09-25 2018-12-07 东莞新科技术研究开发有限公司深圳分公司 A kind of ultrasonic fingerprint sensor and fingerprint recognition mould group

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108766974A (en) * 2018-08-08 2018-11-06 苏州晶方半导体科技股份有限公司 A kind of chip-packaging structure and chip packaging method
CN108960218A (en) * 2018-09-25 2018-12-07 东莞新科技术研究开发有限公司深圳分公司 A kind of ultrasonic fingerprint sensor and fingerprint recognition mould group

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GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address

Address after: 330013 No.699 Tianxiang North Avenue, Nanchang hi tech Industrial Development Zone, Nanchang City, Jiangxi Province

Patentee after: Jiangxi OMS Microelectronics Co.,Ltd.

Address before: 330013 east of Xueyuan 6th Road, south of Tianxiang Avenue, Nanchang hi tech Industrial Development Zone, Nanchang City, Jiangxi Province

Patentee before: OFilm Microelectronics Technology Co.,Ltd.

Address after: 330013 east of Xueyuan 6th Road, south of Tianxiang Avenue, Nanchang hi tech Industrial Development Zone, Nanchang City, Jiangxi Province

Patentee after: OFilm Microelectronics Technology Co.,Ltd.

Address before: 330013 no.1189 Jingdong Avenue, high tech Zone, Nanchang City, Jiangxi Province

Patentee before: NANCHANG OFILM BIO-IDENTIFICATION TECHNOLOGY Co.,Ltd.

CP03 Change of name, title or address
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170818

Termination date: 20210905

CF01 Termination of patent right due to non-payment of annual fee