CN206364826U - A kind of synthesized gateway - Google Patents
A kind of synthesized gateway Download PDFInfo
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- CN206364826U CN206364826U CN201621468328.7U CN201621468328U CN206364826U CN 206364826 U CN206364826 U CN 206364826U CN 201621468328 U CN201621468328 U CN 201621468328U CN 206364826 U CN206364826 U CN 206364826U
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Abstract
The utility model embodiment discloses a kind of synthesized gateway, microcontroller is connected with the I/O port and serial communication of the processor of ARM9 kernels, when microcontroller will send data to the processor of ARM9 kernels, the thread of relevant treatment in the processor of corresponding external interrupt signal triggering ARM9 kernels is transmitted by I/O port first come processing data, then microprocessor sends the data to the processor processing of ARM9 kernels, control command is sent finally by serial ports to be controlled to microprocessor interface circuit, solve existing synthesized gateway real-time bad, the not high technical problem of reliability.The utility model embodiment method includes：It is provided with processor, five microcontrollers, five interface circuits of one ARM9 kernel of five serial ports and five I/O ports；Each microcontroller is communicated to connect with a serial ports, the I/O port, an interface circuit.
Description
Technical field
The utility model is related to communication connection field, more particularly to a kind of synthesized gateway.
Background technology
The control system demand of current smart home is more diversified, airconditioning control, background music control, and security protection control can
Depending on intercommunication control, in face of how integrated control, it is necessary to which synthesized gateway is realized.Mainly pass through local gateway for the system integration
By the corresponding interface such as KNX, RS485, RS232 interfaces realize the docking of system.
During the system integration of synthesized gateway, because the subsystem of access is relatively more, (this gateway has 5 subsystems will
Access), the interface of access also compares many, and interface it is most by some interface chips (such as RS232 electrical level transferring chips,
RS485 electrical level conversion chips) serial ports is converted to carry out Access Control.Existing synthesized gateway is as shown in figure 1, ARM9
Processor, runs Linux system, and an embedded web server is run in the inside, uses its ARM9 original 5 intrinsic strings
Mouth interface, 232 interface circuits and 485 interface circuits are directly connected to by this 5 interfaces.
However, existing comprehensive gateway has the disadvantage that：(1) real-time is bad.Existing comprehensive gateway is for more
The application of the system integration is to carry out the mode of poll serial ports buffer data by the operating system journey that bursts at the seams, have data again with thread come
Processing.(2) reliability is not high.Because real-time is bad, while the serial ports FIFO of main processor platform buffering area is big
Small limited, so can exist, multiple serial datas are concurrent, and come processing data by the way of thread poll, can have data can not
The technical problem handled in time, and buffering area is not big enough, can finally cause loss of data.
Utility model content
The utility model embodiment provides a kind of synthesized gateway, by microcontroller and the I/O port of the processor of ARM9 kernels
With serial communication connection, when microcontroller will send data to the processor of ARM9 kernels, transmit corresponding by I/O port first
External interrupt signal triggering ARM9 kernels processor in the thread of relevant treatment carry out processing data, then microprocessor is by number
Handled according to the processor for being sent to ARM9 kernels, send control command finally by serial ports is carried out to microprocessor interface circuit
Control, solves the existing technical problem that synthesized gateway real-time is bad, reliability is not high.
The utility model embodiment provides a kind of synthesized gateway, including：It is provided with five serial ports and five I/O ports one
The processor of ARM9 kernels, five microcontrollers, five interface circuits；
Each microcontroller is communicated to connect with a serial ports, the I/O port, an interface circuit；
The serial ports being connected with each microcontroller is differed；
The I/O port being connected with each microcontroller is differed；
The interface circuit being connected with each microcontroller is differed.
Preferably, each microcontroller is built-in with FIFO buffering area.
Preferably, it is provided with different priority corresponding from the I/O port in the processor of the ARM9 kernels.
Preferably, the interface circuit be 232 interface circuits and or 485 interface circuits.
As can be seen from the above technical solutions, the utility model embodiment has advantages below：
1st, the utility model embodiment provides a kind of synthesized gateway, by microcontroller and the IO of the processor of ARM9 kernels
Mouth and serial communication connection, when microcontroller will send data to the processor of ARM9 kernels, transmit phase by I/O port first
The thread of relevant treatment carrys out processing data in the processor for the external interrupt signal triggering ARM9 kernels answered, and then microprocessor will
Data are sent to the processor processing of ARM9 kernels, and send control command finally by serial ports enters to microprocessor interface circuit
Row control, solves the existing technical problem that synthesized gateway real-time is bad, reliability is not high.
2nd, a kind of synthesized gateway that the utility model embodiment is provided, FIFO buffering area is built-in with each microcontroller
And different priority corresponding from I/O port is set in the processor of ARM9 kernels, when there is multiple serial ports to have data,
The processor of ARM9 kernels according to preset I/O port the corresponding serial data of priority processing, and priority it is low I/O port correspondence
Serial data can cache in the microcontroller, so as to ensure that the reliability of data.Microprocessor preserves corresponding simultaneously
Control information and feedback states, can just issue the processor of ARM9 kernels, so that excellent in the data for controlling and feeding back only to change
Unconverted invalid data is changed.
Brief description of the drawings
, below will be to embodiment in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art
Or the accompanying drawing used required in description of the prior art is briefly described, it should be apparent that, drawings in the following description are only
It is some embodiments of the present utility model, for those of ordinary skill in the art, before creative labor is not paid
Put, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of the synthesized gateway of prior art；
A kind of structural representation for synthesized gateway that Fig. 2 provides for the utility model embodiment.
Embodiment
The utility model embodiment provides a kind of synthesized gateway, by microcontroller and the I/O port of the processor of ARM9 kernels
With serial communication connection, when microcontroller will send data to the processor of ARM9 kernels, transmit corresponding by I/O port first
External interrupt signal triggering ARM9 kernels processor in the thread of relevant treatment carry out processing data, then microprocessor is by number
Handled according to the processor for being sent to ARM9 kernels, send control command finally by serial ports is carried out to microprocessor interface circuit
Control, solves the existing technical problem that synthesized gateway real-time is bad, reliability is not high.
, below will knot to enable utility model purpose of the present utility model, feature, advantage more obvious and understandable
The accompanying drawing in the utility model embodiment is closed, the technical scheme in the utility model embodiment is clearly and completely described,
Obviously, the embodiments described below are only a part of embodiment of the utility model, and not all embodiment.Based on this reality
With the embodiment in new, it is all other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of the utility model protection.
Referring to Fig. 2, the utility model embodiment provides a kind of one embodiment of synthesized gateway, including：It is provided with
The processor 1 of 5 one ARM9 kernels of five serial ports 4 and five I/O ports, five microcontrollers 2, five interface circuits 3；
Each microcontroller 1 is communicated to connect with a serial ports 4, I/O port 5, an interface circuit 3；
The serial ports 4 being connected with each microcontroller 1 is differed；
The I/O port 5 being connected with each microcontroller 1 is differed；
The interface circuit 3 being connected with each microcontroller 1 is differed.
Each microcontroller 1 is built-in with FIFO buffering area, for storing the corresponding data of serial ports 4 of low priority I/O port 5.
Different priority corresponding from I/O port 5 is provided with the processor 1 of ARM9 kernels.
Interface circuit 3 be 232 interface circuits and or 485 interface circuits.
The above is the detailed description of structure and the connected mode progress to a kind of synthesized gateway, for ease of understanding, below will
A kind of application of synthesized gateway is illustrated with a concrete application scene, application examples includes：
Microcontroller 2 obtains the data of interface circuit 3, first by sending external interrupt signal to I/O port 5 so that I/O port
5 processors 1 for being changed into the thread process ARM9 kernels of relevant treatment in low level, and then the processor 1 of triggering ARM9 kernels are gone here and there
Mouthfuls 4 data received, if multiple serial ports 4 have data processing, the processors 1 of ARM9 kernels according to the priority of I/O port at
The corresponding data of serial ports 4 are managed, the data storage of serial ports 4 of low priority is pending in microcontroller 2FIFO buffering area etc., then
The processor 1 of ARM9 kernels sends corresponding control command to microcontroller 2 according to data processing structure, and then control interface is electric
Road 3, last microcontroller 2 feeds back to the status data of interface circuit 3 processor 1 of ARM9 kernels；Wherein microcontroller 2 is anti-
When presenting status data, the different piece of the current status data of acquisition and status data before is simply fed back into ARM9 kernels
Processor 1；It should be noted that the I/O port 5 and serial ports 4 that are communicated to connect with same microcontroller 2 are corresponding.
It is apparent to those skilled in the art that, for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, may be referred to the corresponding process in preceding method embodiment, will not be repeated here.
In several embodiments provided herein, it should be understood that disclosed system, apparatus and method can be with
Realize by another way.For example, device embodiment described above is only schematical, for example, the unit
Divide, only a kind of division of logic function there can be other dividing mode when actually realizing, such as multiple units or component
Another system can be combined or be desirably integrated into, or some features can be ignored, or do not perform.It is another, it is shown or
The coupling each other discussed or direct-coupling or communication connection can be the indirect couplings of device or unit by some interfaces
Close or communicate to connect, can be electrical, machinery or other forms.
The unit illustrated as separating component can be or may not be it is physically separate, it is aobvious as unit
The part shown can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple
On NE.Some or all of unit therein can be selected to realize the mesh of this embodiment scheme according to the actual needs
's.
In addition, each functional unit in the utility model each embodiment can be integrated in a processing unit,
Can be that unit is individually physically present, can also two or more units it is integrated in a unit.It is above-mentioned integrated
Unit can both be realized in the form of hardware, it would however also be possible to employ the form of SFU software functional unit is realized.
If the integrated unit is realized using in the form of SFU software functional unit and as independent production marketing or used
When, it can be stored in a computer read/write memory medium.Understood based on such, the technical solution of the utility model sheet
The part contributed in other words to prior art in matter or all or part of the technical scheme can be with software products
Form is embodied, and the computer software product is stored in a storage medium, including some instructions are to cause a meter
Described in each embodiment of calculation machine equipment (can be personal computer, server, or network equipment etc.) execution the utility model
The all or part of step of method.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (ROM, Read-
Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD etc. are various can be with
The medium of store program codes.
Described above, above example is only to illustrate the technical solution of the utility model, rather than its limitations；Although ginseng
The utility model is described in detail according to previous embodiment, it will be understood by those within the art that：It is still
Technical scheme described in foregoing embodiments can be modified, or which part technical characteristic is equally replaced
Change；And these modifications or replacement, the essence of appropriate technical solution is departed from each embodiment technical scheme of the utility model
Spirit and scope.
Claims (4)
1. a kind of synthesized gateway, it is characterised in that including：It is provided with the processing of one ARM9 kernel of five serial ports and five I/O ports
Device, five microcontrollers, five interface circuits；
Each microcontroller is communicated to connect with a serial ports, the I/O port, an interface circuit；
The serial ports being connected with each microcontroller is differed；
The I/O port being connected with each microcontroller is differed；
The interface circuit being connected with each microcontroller is differed.
2. synthesized gateway according to claim 1, it is characterised in that each microcontroller is built-in with FIFO buffering
Area.
3. synthesized gateway according to claim 1, it is characterised in that be provided with the processor of the ARM9 kernels and institute
State the corresponding different priority of I/O port.
4. synthesized gateway according to claim 1, it is characterised in that the interface circuit be 232 interface circuits and or
485 interface circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621468328.7U CN206364826U (en) | 2016-12-29 | 2016-12-29 | A kind of synthesized gateway |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201621468328.7U CN206364826U (en) | 2016-12-29 | 2016-12-29 | A kind of synthesized gateway |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106789611A (en) * | 2016-12-29 | 2017-05-31 | 广州视声智能股份有限公司 | A kind of synthesized gateway and interface circuit control method |
| CN111142453A (en) * | 2020-01-20 | 2020-05-12 | 广州视声智能股份有限公司 | Multi-channel control device and installation method thereof |
| CN114172800A (en) * | 2021-11-25 | 2022-03-11 | 浙江源创智控技术有限公司 | KNX multi-gateway communication method, device, equipment and storage medium |
-
2016
- 2016-12-29 CN CN201621468328.7U patent/CN206364826U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106789611A (en) * | 2016-12-29 | 2017-05-31 | 广州视声智能股份有限公司 | A kind of synthesized gateway and interface circuit control method |
| CN106789611B (en) * | 2016-12-29 | 2022-12-13 | 广州视声智能股份有限公司 | Integrated gateway and interface circuit control method |
| CN111142453A (en) * | 2020-01-20 | 2020-05-12 | 广州视声智能股份有限公司 | Multi-channel control device and installation method thereof |
| CN114172800A (en) * | 2021-11-25 | 2022-03-11 | 浙江源创智控技术有限公司 | KNX multi-gateway communication method, device, equipment and storage medium |
| CN114172800B (en) * | 2021-11-25 | 2024-05-03 | 浙江源创智控技术有限公司 | KNX multi-gateway communication method, KNX multi-gateway communication device, KNX multi-gateway communication equipment and storage medium |
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