CN201639589U - Embedded dual-redundant network card based on ARM - Google Patents

Embedded dual-redundant network card based on ARM Download PDF

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Publication number
CN201639589U
CN201639589U CN200920212768XU CN200920212768U CN201639589U CN 201639589 U CN201639589 U CN 201639589U CN 200920212768X U CN200920212768X U CN 200920212768XU CN 200920212768 U CN200920212768 U CN 200920212768U CN 201639589 U CN201639589 U CN 201639589U
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China
Prior art keywords
ethernet
network
interface circuit
ethernet interface
network interface
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Expired - Lifetime
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CN200920212768XU
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Chinese (zh)
Inventor
黄衍京
柏新超
徐进明
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SVA COMMUNICATION TECHNOLOGY Co Ltd
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SVA COMMUNICATION TECHNOLOGY Co Ltd
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Priority to CN200920212768XU priority Critical patent/CN201639589U/en
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Abstract

The utility model discloses an embedded dual-redundant network card based on ARM, which increases performance and reliability of the device based on meeting basic requirements on data communication of the navigation radar and other network devices. The technical scheme is as follows: the embedded dual-redundant network card comprises a first interface, a first Ethernet interface circuit, a second Ethernet interface circuit, and a network processor. The first interface is connected with external devices; the first Ethernet interface circuit is connected with the network processor and provides Ethernet access; the second Ethernet interface circuit is connected with the network processor and provides Ethernet access; the network processor is connected with the first interface, the first Ethernet interface circuit and the second Ethernet interface circuit, and is used for switching and managing the running state between the network connection and two network cards.

Description

Based on the redundant network interface card of the Embedded Double of ARM
Technical field
The utility model relates to the network equipment, relates in particular to be applied to marine navigation radar the network interface card that Ethernet carries out data interaction on realizing navigation radar and naval vessel by embedded technology under the prerequisite that does not increase original navigation radar system burden.
Background technology
Along with development of modern computer technology, computer application more and more towards network side to development, industrial control computer running environment is complicated day by day, the amount of information that exchanges between each control system sharply increases, and the transmission speed of bus network framework more and more is difficult to satisfy the real-time requirement of control system.The new generation of industrial control system is a kind of based on network control system, can satisfy the requirement of real-time, has the characteristics of data transmission rate height, highly intelligent, high reliability, and can adapt to the adverse circumstances of production scene.
As the server parts, the research of intelligent dual network technology and module is satisfied industrial control computer of new generation to requirement highly intelligent, high reliability to improving the overall performance of industrial control system, has certain theory, engineering significance.
At present, Ethernet and TCP/IP are that the higher open network technology of the maturity of representative is widely adopted at industrial control field gradually, device networkization is a developing tendency in future, people wish and can connect various device by LAN, read control centre's instruction, the transmission data realize that the IP chemical control tubulation of equipment room is managed and data access.
Yet conventional art adopts non intelligent two net interconnection techniques usually, and the management of two nets and switching are responsible for by system host.Because load on host computers and task scheduling under the bigger situation of network data amount, have had a strong impact on the performance and the real-time of system.
Especially when the marine electronic equipment choosing was purchased, traditional equipment itself did not possess the function that inserts two redundant networks.The hardware-software platform will itself cause bigger burden to the original equipment system if adopt traditional two network interface card technology to come realization equipment to insert two redundant networks, even original equipment decreased performance, reliability are reduced because design time is early backward relatively simultaneously.
The utility model content
The purpose of this utility model is to address the above problem, and provides a kind of Embedded Double based on ARM redundant network interface card, carries out on the basis of basic demand of data communication raising equipment performance and reliability satisfying navigation radar and other network equipments.
The technical solution of the utility model is: the utility model discloses the redundant network interface card of a kind of Embedded Double based on ARM, comprising:
First interface connects external equipment;
First ethernet interface circuit connects this network processing unit, provides Ethernet to insert;
Second ethernet interface circuit connects this network processing unit, provides Ethernet to insert;
Network processing unit connects this first interface, this first ethernet interface circuit and this second ethernet interface circuit, be used for that network connects and two network interface cards between the switching and the management of running status.
According to an embodiment of the redundant network interface card of the Embedded Double based on ARM of the present utility model, this first interface is a serial ports, sets up data with outside navigation radar and is connected.
According to an embodiment of the redundant network interface card of the Embedded Double based on ARM of the present utility model, this network processing unit comprises:
First delivery unit will be converted to the packet of ICP/IP protocol and be sent to Ethernet by this first ethernet interface circuit or this second ethernet interface circuit from the data flow encapsulation of serial ports;
Second delivery unit will unpack from the Frame of Ethernet, is converted to behind the serial data and is sent to outside navigation radar by serial ports.
According to an embodiment of the redundant network interface card of the Embedded Double based on ARM of the present utility model, this network processing unit is ARM9 chip AT91RM9200.
Embodiment according to the redundant network interface card of the Embedded Double based on ARM of the present utility model, this first ethernet interface circuit and this second ethernet interface circuit are to be made of physical chip DM9161, and this network processing unit all is to be connected by the MII/RMII bus with this first ethernet interface circuit with this second ethernet interface circuit.
The utility model contrast prior art has following beneficial effect: the redundant network interface card of the Embedded Double based on ARM of the present utility model is transferred to special network processing unit with the management of two nets and switching and is responsible for, when receiving network message, two redundant network interface cards unpack message, only do just to send to radar after simple serial ports encapsulates; When sending network message, two redundant network interface cards substitute radar network message are carried out necessary processing, have alleviated the burden of navigation radar motherboard, have improved the operational efficiency of navigation radar system.
Description of drawings
Fig. 1 is the structure chart of the embodiment of the redundant network interface card of the Embedded Double based on ARM of the present utility model.
Fig. 2 is the system hardware block diagram of Fig. 1 embodiment.
Fig. 3 is the Ethernet interface connection diagram of Fig. 1 embodiment.
Fig. 4 is the flow chart of Ethernet interface Interrupt Process.
Fig. 5 is the flow chart of serial ports Interrupt Process.
Embodiment
The utility model will be further described below in conjunction with drawings and Examples.
Fig. 1 shows the embodiment of the redundant network interface card of the Embedded Double based on ARM of the present utility model.Carrying a CPU (network processing unit 11 among Fig. 1) based on the redundant network interface card of the Embedded Double of ARM, is a kind of relatively independent, intelligence system based on Ethernet that can work independently.Present embodiment is to adopt the double-network redundant technology to realize the interconnected of system.The network interface card of present embodiment is provided with two class interfaces, first kind interface is serial ports 13 in the present embodiment, and connecting outside navigation radar 12, the second class interfaces is network interface (Ethernet interfaces), the quantity of network interface has 2 in the present embodiment, is respectively first network interface 14 and second network interface 15.Network processing unit 11 is connected with serial ports 13, first network interface 14 and second network interface, 15 data respectively, be used for that network connects and two network interface cards between the switching and the management of running status.
In the present embodiment, two network interface cards that connect by these two network interfaces 14,15 are configured to same IP address respectively, at synchronization, have only a network interface card to be in running status, and another piece then is in backup status.In the running of two net changeover programs, when finding that the network interface card that is moving breaks down, system automatically switches on the workable backup network interface card of another piece.After switching, the backup network interface card becomes the network interface card of work at present.
Fig. 2 shows the hardware configuration of present embodiment.As can be known from Fig. 2, the network processing unit 11 of the redundant network interface card of the Embedded Double of present embodiment has adopted the ARM9 chip AT91RM9200 of Atmel company, and first ethernet interface circuit 14 and second ethernet interface circuit 15 are made of physical chip DM9161.In Fig. 2, system has extended out flash memory (Flash Memory) and has been used to deposit program, and the SDRAM of 16M is used for working procedure and storage data.
AT91RM9200 is 32 monolithic system processors of a high-performance technical grade, it has the design's of being applicable to standard interface, Ethernet interface and universal synchronous/asynchronism transceiver interface more possesses characteristics such as high-performance, low-power consumption, good stability, is very suitable for commercial Application.
The external bus interface of AT91RM9200 can be handled the nearly transfer of data of 8 peripheral hardwares, makes the chip selection signal of external bus interface connect SDRAM and flash memory respectively in the present embodiment, 16 bit wide data/address buss and the corresponding with it connection respectively of 24 bit address buses.
Usually, ethernet interface circuit mainly is made up of ethernet controller (MAC) and physical layer interface (PHY), and both connect by the MII/RMII bus.Owing to become to have ethernet controller and MII/RMII interface at the AT91RM9200 chip integration, can under full-duplex mode, provide the Ethernet of 10M/100Mbps to insert, support IEEE802.3MAC key-course agreement, and two DM9161 chips also provide the MII/RMII interface, so the AT91RM9200 chip is connected linking with the sequential of DM9161 chip.Hardware between these two chips connects as shown in Figure 3.
In order to realize the Dual-Ethernet function of communication interface board, system selects 2 DM9161 chips for use, in fact the mac controller of AT91RM9200 chip can reach 31 DM9161 chips by the control of MDC/MDIO management interface, and each DM9161 chip has a plurality of different physical addresss (00001B-11111B).Be with 2 DM9161 chips in the present embodiment, the AT91RM9200 chip is controlled wherein any DM9161 chip operation by MDC/MDIO, and another one DM9161 chip then keeps state of activation.
The interrupt signal line MDINTR of these 2 DM9161 is connected respectively to the external interrupt pin IRQ0 and the IRQ1 of AT91RM9200 chip, when Dual-Ethernet switches, the connection status of 2 DM9161 chips of AT91RM9200 chip detection in interrupt routine, control MDC/MDIO selects wherein that a slice DM9161 chip operation get final product, realizes pair Redundant Ethernet functions with this.Ethernet interface connects as shown in Figure 3.
The embedded MAC of AT91RM9200 and DM9161 chip are by the RMII interface communication.When the AT91RM9200 chip externally sent data, it was effective at first to put transmission enable signal ETXEN.The corresponding connection of RXD0~RXD1 pin of data sending terminal ETX0~ETX1 and DM9161 chip as the data sendaisle, sends data with the clock signal REF_CLK of DM9161 chip.The corresponding connection of TXD0~TXD1 pin of data receiver ERX0~ERX1 and DM9161 chip is as the Data Receiving passage.Management clock signal MDC and management data input/output signal MDIO are used for writing and reading of control chip parameter.When receiving data, the MDINTR of DM9161 chip end is used for producing interrupt signal, and the AT91RM9200 die response interrupts extracting data.
System inserts transmission medium by network isolation transformer, and network isolation transformer plays effects such as signal transmission, impedance matching, waveform reparation, clutter inhibition and high voltage isolation, with protection system safety.
The software systems of the redundant network interface card of the Embedded Double of present embodiment are mainly realized forming by bottom layer driving, control program and ICP/IP protocol.Bottom layer driving is used for finishing the initial configuration of guiding, startup and each functional module of AT91RM9200 chip internal of whole system.After system powers on, earlier the guidance code in the flash memory is loaded among the SDRAM of AT91RM9200 chip internal, again the application program of the whole system appointed area from flash memory is loaded into the SDRAM by this section guidance code.Then move this section application program, mac controller in the AT91RM9200 chip and serial ports are carried out initial configuration, thereby finish the guiding of whole system, start and initial configuration.Control program is mainly finished the control to these 2 ethernet interface circuit DM9161 chips, thereby the redundancy that realizes two Redundant Ethernet is switched.When a network interface disconnected, in interrupt handling routine, the AT91RM9200 chip was isolated the current physical layer chip by the control register of the total line traffic control DM9161 chip of RMII, switches to another network interface and works on, and reduces loss of data to greatest extent.ICP/IP protocol is that present Internet goes up a most popular cover protocol family, it is with reference to development system interconnection (OSI) model, adopt a kind of four-layer structure of simplification, be respectively application layer, transport layer, network layer and link layer, the main agreement of each layer as shown in Figure 4.Wherein TCP and UDP are two kinds of host-host protocols of Ethernet data.Native system does not use the application layer part of ICP/IP protocol, directly uses the UDP message format to communicate by letter with other network equipments in the Ethernet.
Sending and receiving message is the groundwork of network interface.For file transmitting method, at first, when radar has message to send, message is sent two redundant network interface cards by serial ports, by serial ports Interrupt Process function message is loaded into one and sends buffer queue, and set sends the Status Flag of buffer queue.The Status Flag that sends buffer queue is constantly inquired about in system's major cycle then, needs to send as message is arranged in the buffer queue, then calls network interface and sends function transmission message.After network interface sends this message, clear to send buffer queue sign.For the message method of reseptance, at first network interface card is submitted to the interface input function with message after receiving interrupt response, and the interface input function carries out after the necessary processing data segment being put into serial ports transmission buffer queue.The Status Flag that serial ports sends buffer queue is constantly inquired about in system's major cycle then, has data to need to send in the buffer queue if send, and then calls serial ports and sends function transmission data.At last, treat that serial ports sends this message after, clear to send buffer queue sign.The flow process of network interface and serial ports Interrupt Process is please respectively referring to Fig. 4 and Fig. 5.
In above-mentioned method, used network interface to send and two buffer queues of serial ports transmission.The advantage of using buffer queue is the level and smooth bursty traffic of energy, reduces the packet loss rate, and shortcoming is the requirement that has improved memory source, and influences the response time when transmit queue is congested.To previous shortcoming, can come contradiction on the balance quality and resource neatly by adjusting queue length.To a back shortcoming, can survey discovery under embedded environment because embedded chip processing speed deficiency, frame organize the time often greater than the transmitting time of network interface card, thereby the frame in the formation can both promptly send basically.
The foregoing description provides to those of ordinary skills and realizes or use of the present utility model; those of ordinary skills can be under the situation that does not break away from invention thought of the present utility model; the foregoing description is made various modifications or variation; thereby protection range of the present utility model do not limit by the foregoing description, and should be the maximum magnitude that meets the inventive features that claims mention.

Claims (5)

1. the redundant network interface card of the Embedded Double based on ARM is characterized in that, comprising:
First interface connects external equipment;
First ethernet interface circuit connects this network processing unit, provides Ethernet to insert;
Second ethernet interface circuit connects this network processing unit, provides Ethernet to insert;
Network processing unit connects this first interface, this first ethernet interface circuit and this second ethernet interface circuit, be used for that network connects and two network interface cards between the switching and the management of running status.
2. the redundant network interface card of the Embedded Double based on ARM according to claim 1 is characterized in that this first interface is a serial ports, sets up data with outside navigation radar and is connected.
3. the redundant network interface card of the Embedded Double based on ARM according to claim 2 is characterized in that this network processing unit comprises:
First delivery unit will be converted to the packet of ICP/IP protocol and be sent to Ethernet by this first ethernet interface circuit or this second ethernet interface circuit from the data flow encapsulation of serial ports;
Second delivery unit will unpack from the Frame of Ethernet, is converted to behind the serial data and is sent to outside navigation radar by serial ports.
4. the redundant network interface card of the Embedded Double based on ARM according to claim 1 is characterized in that this network processing unit is ARM9 chip AT91RM9200.
5. the redundant network interface card of the Embedded Double based on ARM according to claim 4, it is characterized in that, this first ethernet interface circuit and this second ethernet interface circuit are to be made of physical chip DM9161, and this network processing unit all is to be connected by the MII/RMII bus with this first ethernet interface circuit with this second ethernet interface circuit.
CN200920212768XU 2009-12-09 2009-12-09 Embedded dual-redundant network card based on ARM Expired - Lifetime CN201639589U (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102170562A (en) * 2011-03-04 2011-08-31 西安电子科技大学 Network video service device
CN102868568A (en) * 2011-07-06 2013-01-09 瑞昱半导体股份有限公司 Network unit replacing system and embedded system device
CN103905403A (en) * 2012-12-27 2014-07-02 北京航天福道高技术股份有限公司 Multi-protocol communication conversion method
CN105991561A (en) * 2015-02-05 2016-10-05 联想(上海)信息技术有限公司 Implementation method and apparatus of dual-network isolation, and electronic equipment
CN106027305A (en) * 2016-05-26 2016-10-12 浪潮(苏州)金融技术服务有限公司 Method for hot standby of dual servers using same IP based on ARM
CN108268003A (en) * 2017-12-20 2018-07-10 上海海得自动化控制软件有限公司 PLC motion control boards
CN109448158A (en) * 2018-11-06 2019-03-08 珠海欧比特宇航科技股份有限公司 A kind of flight parameter discharge mechanism
CN111988081A (en) * 2019-05-06 2020-11-24 上海汽车集团股份有限公司 Redundant processing method and system for laser radar data

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102170562A (en) * 2011-03-04 2011-08-31 西安电子科技大学 Network video service device
CN102868568A (en) * 2011-07-06 2013-01-09 瑞昱半导体股份有限公司 Network unit replacing system and embedded system device
CN103905403A (en) * 2012-12-27 2014-07-02 北京航天福道高技术股份有限公司 Multi-protocol communication conversion method
CN105991561A (en) * 2015-02-05 2016-10-05 联想(上海)信息技术有限公司 Implementation method and apparatus of dual-network isolation, and electronic equipment
CN106027305A (en) * 2016-05-26 2016-10-12 浪潮(苏州)金融技术服务有限公司 Method for hot standby of dual servers using same IP based on ARM
CN108268003A (en) * 2017-12-20 2018-07-10 上海海得自动化控制软件有限公司 PLC motion control boards
CN109448158A (en) * 2018-11-06 2019-03-08 珠海欧比特宇航科技股份有限公司 A kind of flight parameter discharge mechanism
CN111988081A (en) * 2019-05-06 2020-11-24 上海汽车集团股份有限公司 Redundant processing method and system for laser radar data

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Granted publication date: 20101117