CN206349343U - Semiconductor carrier - Google Patents

Semiconductor carrier Download PDF

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Publication number
CN206349343U
CN206349343U CN201621391969.7U CN201621391969U CN206349343U CN 206349343 U CN206349343 U CN 206349343U CN 201621391969 U CN201621391969 U CN 201621391969U CN 206349343 U CN206349343 U CN 206349343U
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CN
China
Prior art keywords
resin substrate
semiconductor carrier
semiconductor
carrier
metallic plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201621391969.7U
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Chinese (zh)
Inventor
吉祥
卢海伦
徐鸿飞
束方沛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei Tongfu Microelectronics Co Ltd
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Hefei Tongfu Microelectronics Co Ltd
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Publication date
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Priority to CN201621391969.7U priority Critical patent/CN206349343U/en
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Abstract

The utility model provides a kind of semiconductor carrier, the semiconductor carrier includes resin substrate and multiple metallic plates, multiple metallic plate intervals are embedded in the upper surface of resin substrate, heat between multiple metallic plates is completely cut off by resin substrate, and the upper surface of multiple metallic plates is used for bearing semiconductor chip and carries out reflux technique.The semiconductor carrier that the utility model is provided is combined by resin substrate and metallic plate, reach the effect of carrier segmentation, reduce continuous metal length, while remaining metal heat absorption advantage, the transmission of front and rear heat can be separated, so that whole carrier in reflux course before and after temperature course it is consistent, it is to avoid the problem of temperature difference is excessive.

Description

Semiconductor carrier
Technical field
The utility model belongs to technical field of manufacturing semiconductors, more particularly to a kind of semiconductor carrier.
Background technology
Semiconductor Flip Chip (flip-chip) technology is typically in Flip chip attach (FCA, flip-chip attachment) During be loaded and protect using carrier as fixed substrate.The carrier that traditional FCA techniques are made using metal material, And all metal materials are respectively provided with the characteristics of thermal conductivity is high, heat can be absorbed rapidly, improve the temperature of carrier substrate in itself.
Show referring to Fig. 1, Fig. 1 is a kind of state when carrier bearing semiconductor chip carries out reflux technique in the prior art It is intended to.
As shown in figure 1, in reflux course, the laggard stove end of metal carrier 100 can receive the heat of advanced stove end conduction (left end of metal carrier 100 is advanced stove end in diagram, and right-hand member is laggard stove end, and arrow represents heat conduction orientation), causes Laggard stove end temperature is actually higher than front end, and then causes basal plate heated uneven (low early and high after), and temperature course is different, is unfavorable for steady Determine the control of technique, and carrier is longer, and temperature difference is bigger, such as shown in Fig. 1, the semiconductor core 101 of advanced stove stove For 230 DEG C, the semiconductor core 102 of laggard stove stove is 235 DEG C.
Utility model content
The utility model provides a kind of semiconductor carrier, to solve temperature difference before and after bulk metal carrier in the prior art The excessive technical problem for being unfavorable for process for stabilizing control.
In order to solve the above technical problems, the technical scheme that the utility model is used is:A kind of semiconductor carrier is provided, Including resin substrate and multiple metallic plates, the multiple metallic plate interval is embedded in the upper surface of the resin substrate, described many Heat between individual metallic plate is completely cut off by the resin substrate, and the upper surface of the multiple metallic plate is used for bearing semiconductor core Piece carries out reflux technique.
According to the preferred embodiment of the utility model one, the metallic plate is provided with multiple vacuum absorption holes, the vacuum suction Hole is used to be attached with vavuum pump, to incite somebody to action described by vacuum suction mode when the semiconductor chip carries out reflux technique Semiconductor chip is fixed on the surface of the metallic plate.
According to the preferred embodiment of the utility model one, the side of the resin substrate is provided with substrate grabbing groove, the substrate Grabbing groove can be easy to fixture or manipulator to be captured.
According to the preferred embodiment of the utility model one, the outer side edges of the substrate grabbing groove are magazine guide plate, the material Box guide plate is used to be placed in drive rail the semiconductor carrier is driven.
According to the preferred embodiment of the utility model one, the semiconductor carrier also includes multiple magnet, the multiple magnet It is arranged on the back side of the resin substrate.
According to the preferred embodiment of the utility model one, the semiconductor carrier also includes multiple pilot pins, the multiple fixed Plant the surface for being fixed on the resin substrate in one end of position pin.
According to the preferred embodiment of the utility model one, the resin substrate is provided with multiple through holes, the multiple through hole and institute State multiple vacuum absorption holes and correspond connection.
The beneficial effects of the utility model are:The situation of prior art is different from, the semiconductor that the utility model is provided is carried Tool is combined by resin substrate with metallic plate, reaches the effect of carrier segmentation, reduces continuous metal length, remains metal suction While hot advantage, the transmission of front and rear heat can be separated so that whole carrier front and rear temperature course in reflux course is consistent, keeps away The problem of temperature difference is excessive is exempted from.
Brief description of the drawings
, below will be to needed for embodiment description in order to illustrate more clearly of the technical scheme in the utility model embodiment The accompanying drawing to be used is briefly described, it should be apparent that, drawings in the following description are only some realities of the present utility model Example is applied, for those of ordinary skill in the art, on the premise of not paying creative work, can also be according to these accompanying drawings Other accompanying drawings are obtained, wherein:
Fig. 1 is view when a kind of carrier bearing semiconductor chip carries out reflux technique in the prior art;
Fig. 2 is the view when carrier bearing semiconductor chip that the utility model is carried carries out reflux technique;
Fig. 3 is the overlooking the structure diagram for the carrier that the utility model is provided;
Fig. 4 is the cross section structure schematic diagram at A-A in Fig. 3.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment obtained, belongs to the scope of the utility model protection.
Referring to Fig. 2, the state when carrier bearing semiconductor chip that Fig. 2, which is the utility model, to be carried carries out reflux technique is shown It is intended to.
As shown in Fig. 2 the utility model provides a kind of semiconductor carrier 200, the semiconductor carrier 200 includes resin substrate 210 and multiple metallic plates 220, multiple intervals of metallic plates 220 are embedded in the upper surface of resin substrate 210, multiple metallic plates 220 it Between heat completely cut off by resin substrate 210, the upper surfaces of multiple metallic plates 220 is used for bearing semiconductor core (201,202) piece Carry out reflux technique.
In fig. 2, the left end of semiconductor carrier 200 is advanced stove end, and right-hand member is laggard stove end, and arrow represents heat transfer side To by experimental verification, the front and rear semiconductor chip temperature difference on each metallic plate 220 is obviously reduced, as shown in Fig. 2 preceding Semiconductor chip 201 is 230 DEG C, and then semiconductor chip is 231 DEG C.Due to the heat-blocking action of resin substrate 210, other metals Front and rear semiconductor chip temperature difference on plate 220 is obviously reduced.
Also referring to Fig. 3 and Fig. 4, wherein, Fig. 3 is the overlooking the structure diagram for the carrier that the utility model is provided;Fig. 4 It is the cross section structure schematic diagram in Fig. 3 at A-A.
As shown in Figure 3 and Figure 4, metallic plate 220 is provided with multiple vacuum absorption holes 221, and vacuum absorption holes are used for and vavuum pump (diagram is not) is attached, to be fixed semiconductor chip by vacuum suction mode when semiconductor chip carries out reflux technique On the surface of metallic plate 220.
Further, the side of resin substrate 210 be provided with substrate grabbing groove 211, substrate grabbing groove 211 can be easy to fixture or Manipulator is captured.
Further, the outer side edges of substrate grabbing groove 211 are magazine guide plate 212, and magazine guide plate 212 is used to be placed on To cause semiconductor carrier 200 to be driven in drive rail.
In addition, semiconductor carrier 200 also includes multiple magnet 213, multiple magnet 213 are arranged on the back of the body of resin substrate 210 Face.Semiconductor carrier 200 also includes multiple pilot pins 214, and one end of multiple pilot pins 214, which is planted, is fixed on resin substrate 210 Surface.
Correspondingly, resin substrate 210 is provided with multiple through holes, and multiple through holes are corresponded with multiple vacuum absorption holes 221 to be connected Pass to transmission vacuum.
In summary, it should be readily apparent to one skilled in the art that the semiconductor carrier 200 that the utility model is provided passes through resin Substrate is combined with metallic plate 220, reaches the effect of carrier segmentation, reduces continuous metal length, remains metal heat absorption advantage While, the transmission of front and rear heat can be separated so that whole carrier in reflux course before and after temperature course it is consistent, it is to avoid temperature Spend the problem of difference is excessive.
Embodiment of the present utility model is these are only, the scope of the claims of the present utility model, every utilization is not thereby limited Equivalent structure or equivalent flow conversion that the utility model specification and accompanying drawing content are made, or directly or indirectly it is used in other Related technical field, is similarly included in scope of patent protection of the present utility model.

Claims (7)

1. a kind of semiconductor carrier, it is characterised in that including resin substrate and multiple metallic plates, the multiple metallic plate interval is embedding The heat being located between the upper surface of the resin substrate, the multiple metallic plate is completely cut off by the resin substrate, described many The upper surface of individual metallic plate is used for bearing semiconductor chip and carries out reflux technique.
2. semiconductor carrier according to claim 1, it is characterised in that the metallic plate is provided with multiple vacuum absorption holes, The vacuum absorption holes are used to be attached with vavuum pump, to be inhaled when the semiconductor chip carries out reflux technique by vacuum The semiconductor chip is fixed on the surface of the metallic plate by subsidiary formula formula.
3. semiconductor carrier according to claim 2, it is characterised in that the side of the resin substrate is captured provided with substrate Groove, the substrate grabbing groove can be easy to fixture or manipulator to be captured.
4. semiconductor carrier according to claim 3, it is characterised in that the outer side edges of the substrate grabbing groove are led for magazine To plate, the magazine guide plate is used to be placed in drive rail the semiconductor carrier is driven.
5. semiconductor carrier according to claim 4, it is characterised in that the semiconductor carrier also includes multiple magnet, The multiple magnet is arranged on the back side of the resin substrate.
6. semiconductor carrier according to claim 5, it is characterised in that the semiconductor carrier also includes multiple positioning Plant the surface for being fixed on the resin substrate in pin, one end of the multiple pilot pin.
7. semiconductor carrier according to claim 6, it is characterised in that the resin substrate is provided with multiple through holes, described Multiple through holes are corresponded with the multiple vacuum absorption holes and connected.
CN201621391969.7U 2016-12-16 2016-12-16 Semiconductor carrier Active CN206349343U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621391969.7U CN206349343U (en) 2016-12-16 2016-12-16 Semiconductor carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621391969.7U CN206349343U (en) 2016-12-16 2016-12-16 Semiconductor carrier

Publications (1)

Publication Number Publication Date
CN206349343U true CN206349343U (en) 2017-07-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621391969.7U Active CN206349343U (en) 2016-12-16 2016-12-16 Semiconductor carrier

Country Status (1)

Country Link
CN (1) CN206349343U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111731654A (en) * 2020-06-29 2020-10-02 平怀英 Semiconductor chip storage device, array assembly structure and assembly method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111731654A (en) * 2020-06-29 2020-10-02 平怀英 Semiconductor chip storage device, array assembly structure and assembly method thereof

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