CN206270757U - A kind of anti-infringement control adapter - Google Patents

A kind of anti-infringement control adapter Download PDF

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Publication number
CN206270757U
CN206270757U CN201621276216.1U CN201621276216U CN206270757U CN 206270757 U CN206270757 U CN 206270757U CN 201621276216 U CN201621276216 U CN 201621276216U CN 206270757 U CN206270757 U CN 206270757U
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CN
China
Prior art keywords
control signal
signal output
signal input
circuit
control
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Expired - Fee Related
Application number
CN201621276216.1U
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Chinese (zh)
Inventor
夏丹
倪文飞
毛飞
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Anhui Sun Create Electronic Co Ltd
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Anhui Sun Create Electronic Co Ltd
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Priority to CN201621276216.1U priority Critical patent/CN206270757U/en
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Publication of CN206270757U publication Critical patent/CN206270757U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model belongs to Digital Electronic Technique field, more particularly to a kind of anti-infringement control adapter.The utility model includes control signal input circuit, control signal process circuit and control signal output circuit, the signal input part of control signal input circuit as this control adapter signal input part, the signal input part of the signal output part connection control signal process circuit of control signal input circuit, the signal input part of the signal output part connection control signal output circuit of control signal process circuit, the signal output part of control signal output circuit as this control adapter signal output part, control signal input block, control signal output unit is the IDT74FCT164245TPV chips of Integrated Device Technology companies of U.S. production.The utility model can imitate and avoid damaging other devices because fpga chip permanent high level occurs in programming program, and for related device provides effectively protection, over all Integration number of chips of the present utility model is less, therefore greatly reduces whole plate volume and power consumption.

Description

A kind of anti-infringement control adapter
Technical field
The utility model belongs to Digital Electronic Technique field, more particularly to a kind of anti-infringement control adapter.
Background technology
With the development of digital integrated electronic circuit and In-system programmable technology, fpga chip is in radar programmable applications system Effect it is important all the more.Fpga chip it is powerful, its executable very many programmable operations, its main effect has about Beam and specification radar operation sequential, next to that Radar IF Echo being processed by analog-to-digital conversion and Digital Down Convert and being turned I/Q signal is turned to, the DSP functions after I/Q signal can be equally realized by fpga chip, what application was more at present is The fpga chip of altera corp's production, the signal output of fpga chip is existing by I/O causes for gossip.
When programmable program burn writing is carried out to fpga chip, the I/O delivery outlets level of fpga chip can be set to high level, Because some relay switches are typically using two TTL controls, and when two TTL are controlled to permanent high level, can be by relay Blow.Therefore for some devices, the permanent high level that fpga chip occurs in programming program is that one kind can bring chip The action of damage, disadvantage mentioned above is urgently improved.
Utility model content
The utility model is in order to overcome the above-mentioned deficiencies of the prior art, there is provided a kind of anti-infringement control adapter, this reality Avoid damaging other devices because fpga chip permanent high level occurs in programming program with new can effect, so as to be correlation Device provides effectively protection, and small volume of the present utility model, with low cost.
To achieve the above object, the utility model employs following technical measures:
A kind of anti-infringement control adapter includes control signal input circuit, control signal process circuit and control signal Output circuit, the signal input part of the control signal input circuit controls letter as the signal input part of this control adapter The signal input part of the signal output part connection control signal process circuit of number input circuit, the control signal process circuit The signal input part of signal output part connection control signal output circuit, the signal output part of the control signal output circuit is made It is the signal output part of this control adapter.
The utility model can also further be realized by following technical measures.
Preferably, the control signal input circuit includes two structure identical control signal input blocks, two institutes The signal input part of control signal input block is stated as the signal input part of this control adapter, two control signals The signal output part of input block is all connected with the signal input part of control signal process circuit.
Preferably, the control signal output circuit includes two structure identical control signal output units, two institutes The signal input part for stating control signal output unit is all connected with the signal output part of control signal process circuit, two controls The signal output part of signal output unit is as the signal output part of this control adapter.
Preferably, the control signal process circuit includes fpga chip, the model U.S. of the fpga chip The EP1C12Q240I7N chips of the Cyclone series of altera corp's production.
Further, two the control signal input blocks, control signal output units are U.S. Integrated The IDT74FCT164245TPV chips of Device Technology companies production.
The beneficial effects of the utility model are:
1), the utility model includes control signal input circuit, control signal process circuit and control signal output electricity Road, sets control signal input circuit, in the letter of control signal process circuit in the signal input part of control signal process circuit Number output end sets control signal output circuit, and control signal input block, control signal output unit are the U.S. The IDT74FCT164245TPV chips of Integrated Device Technology companies production.Therefore the utility model energy Enough effects avoid damaging other devices because fpga chip permanent high level occurs in programming program, so that for related device is provided Effectively protection, at the same time, over all Integration number of chips of the present utility model is less, thus greatly reduce whole plate volume with Power consumption.
Be worth it is emphasized that:The utility model only protect by above-mentioned physical unit and connect each physical unit it Between the circuit device or physical platform that are constituted, without regard to software section therein.
2), the control signal process circuit includes fpga chip, and the model U.S. Altera of the fpga chip is public The EP1C12Q240I7N chips of the Cyclone series of production are taken charge of, the chip price is cheap, and process signal speed is fast.
Brief description of the drawings
Fig. 1 is that integrated circuit of the present utility model constitutes structured flowchart;
Fig. 2 is that physical circuit of the present utility model constitutes structured flowchart.
Reference implication in figure is as follows:
10-control signal input circuit 20-control signal process circuit
30-control signal output circuit
Specific embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment for being obtained, belongs to the scope of the utility model protection.
As shown in figure 1, a kind of anti-infringement control adapter includes control signal input circuit 10, control signal process circuit 20 and control signal output circuit 30, the signal input part of the control signal input circuit 10 is used as this control adapter Signal input part, the signal input part of the signal output part connection control signal process circuit 20 of control signal input circuit 10, The signal input part of the signal output part connection control signal output circuit 30 of the control signal process circuit 20, the control The signal output part of signal output apparatus 30 as this control adapter signal output part.
As shown in Fig. 2 the control signal input circuit 10 includes two structure identical control signal input blocks, two The signal input part of the individual control signal input block is as the signal input part of this control adapter, two controls The signal output part of signal input unit is all connected with the signal input part of control signal process circuit 20.
As shown in Fig. 2 the control signal output circuit 30 includes two structure identical control signal output units, two The signal input part of the individual control signal output unit is all connected with the signal output part of control signal process circuit 20, two institutes The signal output part of control signal output unit is stated as the signal output part of this control adapter.
The control signal process circuit 20 includes fpga chip, the altera corp of the model U.S. of the fpga chip The EP1C12Q240I7N chips of the Cyclone series of production, the chip price is cheap, is adapted to be applied to some simple sequential In operation.
Two control signal input blocks, control signal output unit are U.S. Integrated Device The IDT74FCT164245TPV chips of Technology companies production;The input port number of IDT74FCT164245TPV chips is 16, therefore corresponding delivery outlet number is also 16, the chip is powered using 3.3V with 5V, wherein 3.3V supply ports and fpga chip It is connected, 5V supply ports are connected with external interface, and the signal of IDT74FCT164245TPV chips is moved towards by two control signals Respectively DIR1 and DIR2 is controlled.
The utility model when in use, can coordinate to be used with software of the prior art.With reference to existing Software in technology is described to operation principle of the present utility model, it must be noted that be:Match with the utility model The software of conjunction is not innovative part of the present utility model, nor part of the present utility model.
Signal input part of the TTL input signals respectively with two control signal input blocks is connected, due to TTL input signals It is 5V, TTL input signals is connected to the B ports of IDT74FCT164245TPV chips, therefore IDT74FCT164245TPV cores The A ports of piece export 3.3V signals to EP1C12Q240I7N chips, and the data flow direction of IDT74FCT164245TPV chips is From B ports to A ports, so needing for the OE enable signals of two control signal input blocks to be set to low level, believing DIR1 Number set same with DIR2 signals is low level.It is damaged in order to prevent fpga chip from permanent high level occur in programming program His device, because the permanent high level for now exporting is not to be directly output to device, but is first input into this anti-infringement control switching Device, therefore when TTL input signals reach EP1C12Q240I7N chips by control signal input block, EP1C12Q240I7N Chip needs, when permanent high level is detected, to be set to low level and exported again, therefore will not caused damage other devices.By In EP1C12Q240I7N chips output signal level be 3.3V, it is therefore desirable to by the two paths of signals of EP1C12Q240I7N chips Output is respectively connecting to two signal input parts of control signal output unit, as control signal output unit A ports, two The signal output port of control signal output unit is configured to 5V output ports, and as B ports power for 5V, so two controls The data flow direction of signal output unit is from A ports to B ports, so needs make the OE of two control signal output units Energy signal is set to low level, is high level by the set same with DIR2 signals of DIR1 signals.
In sum, the utility model can imitate and avoid being damaged because fpga chip permanent high level occurs in programming program Evil other devices, so that for related device provides effectively protection.

Claims (5)

1. a kind of anti-infringement controls adapter, it is characterised in that:Including control signal input circuit (10), control signal treatment electricity Road (20) and control signal output circuit (30), the signal input part of the control signal input circuit (10) is used as this control The signal input part of adapter, signal output part connection control signal process circuit (20) of control signal input circuit (10) Signal input part, the signal of signal output part connection control signal output circuit (30) of the control signal process circuit (20) Input, the signal output part of the control signal output circuit (30) as this control adapter signal output part.
2. a kind of anti-infringement as claimed in claim 1 controls adapter, it is characterised in that:The control signal input circuit (10) including two structure identical control signal input blocks, the signal input part of two control signal input blocks is equal Used as the signal input part of this control adapter, the signal output part of two control signal input blocks is all connected with control letter The signal input part of number process circuit (20).
3. a kind of anti-infringement as claimed in claim 2 controls adapter, it is characterised in that:The control signal output circuit (30) including two structure identical control signal output units, the signal input part of two control signal output units is equal The signal output part of connection control signal process circuit (20), the signal output part of two control signal output units is made It is the signal output part of this control adapter.
4. a kind of anti-infringement as claimed in claim 3 controls adapter, it is characterised in that:The control signal process circuit (20) including fpga chip, the Cyclone series of altera corp of the model U.S. production of the fpga chip EP1C12Q240I7N chips.
5. a kind of anti-infringement as claimed in claim 4 controls adapter, it is characterised in that:Two control signal inputs are single Unit, control signal output unit are the production of Integrated Device Technology companies of the U.S. IDT74FCT164245TPV chips.
CN201621276216.1U 2016-11-25 2016-11-25 A kind of anti-infringement control adapter Expired - Fee Related CN206270757U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621276216.1U CN206270757U (en) 2016-11-25 2016-11-25 A kind of anti-infringement control adapter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621276216.1U CN206270757U (en) 2016-11-25 2016-11-25 A kind of anti-infringement control adapter

Publications (1)

Publication Number Publication Date
CN206270757U true CN206270757U (en) 2017-06-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621276216.1U Expired - Fee Related CN206270757U (en) 2016-11-25 2016-11-25 A kind of anti-infringement control adapter

Country Status (1)

Country Link
CN (1) CN206270757U (en)

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CF01 Termination of patent right due to non-payment of annual fee
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Granted publication date: 20170620

Termination date: 20201125