CN206259950U - A kind of communication bus isolation circuit - Google Patents
A kind of communication bus isolation circuit Download PDFInfo
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- CN206259950U CN206259950U CN201621164724.0U CN201621164724U CN206259950U CN 206259950 U CN206259950 U CN 206259950U CN 201621164724 U CN201621164724 U CN 201621164724U CN 206259950 U CN206259950 U CN 206259950U
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Abstract
The utility model is related to a kind of communication bus isolation circuit, including：The first disconnecting switch for controlling communication break-make between power module and system board；The second disconnecting switch for providing drive signal for the first disconnecting switch；First disconnecting switch and the second disconnecting switch connection bus standby voltage；Second disconnecting switch connects internal supply voltage by electric voltage observation circuit；Internal supply voltage is not up to preset voltage value, then the second disconnecting switch controls the first disconnecting switch to disconnect, and realizes communication isolating between power module and system board.By implementing the utility model, when abnormal conditions occurs in electronic equipment, the clock cable SCL and bidirectional data line SDA of power supply are automatically isolated, it is ensured that other power module energy proper communications.
Description
Technical field
The utility model is related to electronic device field, more specifically to a kind of communication bus isolation circuit.
Background technology
As the importance of information is more and more obvious, traditional pure hardware switch power supply is also gradually introduced software control with reality
Now with the whole communication using system, it will usually use power management bus（Power Management Bus, PMBus）Or I^
2C agreements are realized.
Due to the importing of communication function, when power supply is in redundant state, the clock cable SCL and bidirectional data line of power supply
Two buses of SDA will and together.When power module occurs exception in clock cable SCL or bidirectional data line SDA line road,
If not making isolation processing, other power modules will be caused also to communicate, the whole system for even resulting in electronic equipment is in
State of paralysis.
Utility model content
The technical problems to be solved in the utility model is, for the clock of power supply in the above-mentioned electronic equipment of prior art
A kind of defect that holding wire SCL can not isolate with bidirectional data line SDA, there is provided communication bus isolation circuit.
The utility model solves the technical scheme that its technical problem used：A kind of communication bus isolation circuit is constructed,
Including：
Between power module and system board, for controlling described to communicate the of break-make between power module and system board
One disconnecting switch；
Be connected with first disconnecting switch, for keeping apart for first disconnecting switch provides the second of drive signal
Close；
First disconnecting switch and the second disconnecting switch connection bus standby voltage；
Second disconnecting switch connects internal supply voltage by electric voltage observation circuit；
The internal supply voltage is not up to preset voltage value, then the second disconnecting switch control described first is kept apart
Shut-off is opened, and realizes communication isolating between the power module and system board；
The internal supply voltage reaches preset voltage value, then second disconnecting switch controls first disconnecting switch
Closure, realizes the connection that communicated between the power module and system board.
Further, in communication bus isolation circuit described in the utility model, first disconnecting switch is imitated including field
Should pipe Q1 and FET Q2, wherein,
The grid of the FET Q1 connects the bus standby voltage, and the source electrode connection of the FET Q1 is described
The bidirectional data line SDA2 of the drain electrode connection system board of the bidirectional data line SDA1, the FET Q1 of power module；
The grid of the FET Q2 connects the bus standby voltage, and the source electrode connection of the FET Q2 is described
The clock cable SCL2 of the drain electrode connection system board of the clock cable SCL1, the FET Q2 of power module.
Further, in communication bus isolation circuit described in the utility model, the grid of the FET Q1 and institute
The grid for stating FET Q2 connects the bus standby voltage by resistance R3；
The grid of the FET Q2 is grounded by electric capacity C1；
The drain electrode of the FET Q1 connects the bidirectional data line SDA2 of the system board by resistance R1；The field effect
Should the drain electrode of pipe Q2 the clock cable SCL2 of the system board is connected by resistance R2.
Preferably, in communication bus isolation circuit described in the utility model, the FET Q1 and the field are imitated
Should pipe Q2 be NPN type FET.
Further, in communication bus isolation circuit described in the utility model, second disconnecting switch includes three poles
Pipe Q3 and triode Q4, wherein,
The base stage of the triode Q3 connects the internal supply voltage, the triode by the electric voltage observation circuit
The colelctor electrode of Q3 connects the bus standby voltage, the grounded emitter of the triode Q3；
The base stage of the triode Q4 connects the bus standby voltage, and the colelctor electrode of the triode Q4 connects institute respectively
State the grid of bus standby voltage and the FET Q2, the grounded emitter of the triode Q4；
The internal supply voltage is not up to preset voltage value, then the triode Q3 open circuits, the triode Q4 conductings,
The grid voltage of the FET Q1 and FET Q2 is dragged down, the FET Q1 and FET Q2 disconnects；
The internal supply voltage reaches preset voltage value, then the triode Q3 conductings, and the triode Q4 open circuits will
The grid voltage of the FET Q1 and FET Q2 is drawn high, and the FET Q1 and FET Q2 is turned on.
Further, in communication bus isolation circuit described in the utility model, the colelctor electrode of the triode Q3 passes through
Resistance R4 connects the bus standby voltage, and the base stage of the triode Q4 connects the bus and treats electromechanics by the resistance R4
Pressure, the colelctor electrode of the triode Q4 connects the bus standby voltage by resistance R3, and the colelctor electrode of the triode Q4 leads to
Cross electric capacity C1 ground connection.
Further, in communication bus isolation circuit described in the utility model, the electric voltage observation circuit is voltage stabilizing two
The base stage of pole pipe ZD, the triode Q3 connects the positive pole of the voltage-regulator diode ZD, and the negative pole of the voltage-regulator diode ZD connects
Connect the internal supply voltage；
Or
The electric voltage observation circuit is comparator, and the comparator is used to monitor the internal supply voltage, when described interior
Portion's supply voltage is not up to preset voltage value, then the comparator disconnects；When the internal supply voltage reaches preset voltage value,
Then the comparator is connected.
Further, in communication bus isolation circuit described in the utility model, the base stage of the triode Q3 is by electricity
Resistance R7 connects the positive pole of the voltage-regulator diode ZD, and the base stage of the triode Q3 connects the triode Q3's by resistance R8
Emitter stage；
The base stage of the triode Q4 connects the resistance R4 by resistance R5, and the base stage of the triode Q4 passes through resistance
R6 connects the emitter stage of the triode Q4, and the node of the resistance R4 and resistance R5 is grounded by electric capacity C2.
Preferably, in communication bus isolation circuit described in the utility model, the triode Q3 and the triode
Q4 is NPN type triode.
Further, in communication bus isolation circuit described in the utility model, also including microprocessor, the internal confession
Piezoelectric voltage is used to be the microprocessor power supply that the energization pins of the microprocessor to connect the negative of the voltage-regulator diode ZD
Pole, the signal pins of the microprocessor connect the bidirectional data line SDA1 and clock cable of the power module respectively
SCL1。
Implement communication bus isolation circuit of the present utility model, have the advantages that：The communication bus isolation circuit
Including：The first isolation between power module and system board, for controlling communication break-make between power module and system board
Switch；Be connected with the first disconnecting switch, the second disconnecting switch for providing drive signal for the first disconnecting switch；First isolation
Switch and the second disconnecting switch connect bus standby voltage；Second disconnecting switch connects in-line power electricity by electric voltage observation circuit
Pressure；Internal supply voltage is not up to preset voltage value, then the second disconnecting switch controls the first disconnecting switch to disconnect, and realizes power supply mould
Communication isolating between block and system board；Internal supply voltage reaches preset voltage value, then the second disconnecting switch control first is isolated
Switch closure, realizes the connection that communicated between power module and system board.By implementing the utility model, occur in electronic equipment different
During reason condition, clock cable SCL and the bidirectional data line SDA automatism isolations of power supply, it is ensured that other power modules can positive normal open
Letter.
Brief description of the drawings
Below in conjunction with drawings and Examples, the utility model is described in further detail, in accompanying drawing：
Fig. 1 is a kind of structural representation of communication bus isolation circuit first embodiment of the utility model；
Fig. 2 is a kind of circuit diagram of communication bus isolation circuit second embodiment of the utility model.
Specific embodiment
In order to be more clearly understood to technical characteristic of the present utility model, purpose and effect, accompanying drawing is now compareed detailed
Illustrate this specific embodiment of the present utility model.
Fig. 1 is first embodiment of the present utility model.
Fig. 1 is a kind of structural representation of communication bus isolation circuit first embodiment of the utility model.Specifically, this is logical
Letter bus isolation circuit includes：First disconnecting switch, the second disconnecting switch, electric voltage observation circuit and microprocessor, wherein,
First disconnecting switch is between power module and system board, for controlling to be communicated between power module and system board
Break-make.Communication wall scroll or a plurality of communication line between power module and system board, it is preferred that communication line includes bi-directional data
Line and clock cable.
Second disconnecting switch is connected with the first disconnecting switch, for for the first disconnecting switch provides drive signal；
First disconnecting switch and the second disconnecting switch connection bus standby voltage；
Second disconnecting switch connects internal supply voltage by electric voltage observation circuit；
Microprocessor is powered by internal supply voltage, and the energization pins of microprocessor connect second by electric voltage observation circuit
Disconnecting switch, the signal pins of microprocessor connect the signal output pin of power module, it is preferable that the signal of microprocessor draws
Pin connects the bidirectional data line SDA1 and clock cable SCL1 of power module respectively.
The specific control process of communication bus isolation circuit is：
When internal supply voltage is not up to preset voltage value, then the second disconnecting switch produce the first control signal, second every
Leave pass controls the first disconnecting switch to disconnect according to the first control signal, realizes communication isolating between power module and system board.
For example, the output signal of power module is bidirectional data line SDA1 and clock cable SCL1, the signal receiving end of system board side
It is bidirectional data line SDA2 and clock cable SCL2.First disconnecting switch is disconnected when being off, bidirectional data line
SDA1 is unable to transmission signal to bidirectional data line SDA2；Clock cable SCL1 is unable to transmission signal to clock cable SCL2,
Realize communication isolating between power module and system board.
Internal supply voltage reaches preset voltage value, then the second disconnecting switch produces the second control signal, and second keeps apart
Close and the first disconnecting switch closure is controlled according to the second control signal, realize the connection that communicated between power module and system board.For example,
The output signal of power module is bidirectional data line SDA1 and clock cable SCL1, and the signal receiving end of system board side is two-way
Data wire SDA2 and clock cable SCL2, the first disconnecting switch is disconnected during in closure state, and bidirectional data line SDA1 can
Transmission signal is to bidirectional data line SDA2；Clock cable SCL1 can transmission signal to clock cable SCL2, realize power supply
Communicate connection between module and system board.
Fig. 2 is second embodiment of the present utility model.
Fig. 2 is a kind of circuit diagram of communication bus isolation circuit second embodiment of the utility model.Specifically, with reference to first
Embodiment, the communication bus isolation circuit includes：First disconnecting switch, the second disconnecting switch, electric voltage observation circuit and microprocessor
Device, specific annexation is not being repeated herein.
Preferably, the first disconnecting switch includes FET Q1 and FET Q2, and the second disconnecting switch includes triode
Q3 and triode Q4, the annexation of detailed description below circuit.
Specifically, FET Q1 and FET Q2 annexations are：
The grid connection bus standby voltage of FET Q1, the source electrode of FET Q1 connects the two-way number of power module
According to line SDA1, the bidirectional data line SDA2 of the drain electrode connection system plate of FET Q1；
The grid connection bus standby voltage of FET Q2, the clock letter of the source electrode connection power module of FET Q2
Number line SCL1, the clock cable SCL2 of the drain electrode connection system plate of FET Q2.
The grid of FET Q1 and the grid of FET Q2 connect bus standby voltage by resistance R3；
The grid of FET Q2 is grounded by electric capacity C1；
The bidirectional data line SDA2 that the drain electrode of FET Q1 passes through resistance R1 connection system plates；The drain electrode of FET Q2
By the clock cable SCL2 of resistance R2 connection system plates.
Preferably, FET Q1 and FET Q2 is NPN type FET；Triode Q3 and triode Q4 is NPN
Type triode.
Specifically, triode Q3 and triode Q4 annexations are：
The base stage of triode Q3 connects internal supply voltage by electric voltage observation circuit, and the colelctor electrode connection of triode Q3 is total
Line standby voltage, the grounded emitter of triode Q3；
Further, in the communication bus isolation circuit of embodiment, the colelctor electrode of triode Q3 connects total by resistance R4
Line standby voltage, the base stage of triode Q4 connects bus standby voltage by resistance R4, and the colelctor electrode of triode Q4 passes through resistance
R3 connects bus standby voltage, and the colelctor electrode of triode Q4 is grounded by electric capacity C1.
Preferably, in the communication bus isolation circuit of the present embodiment, electric voltage observation circuit is voltage-regulator diode ZD, three poles
The positive pole of the base stage connection voltage-regulator diode ZD of pipe Q3, the negative pole connection internal supply voltage of voltage-regulator diode ZD；
Or
Electric voltage observation circuit is comparator, and comparator is used to monitor internal supply voltage, when internal supply voltage is not up to
Preset voltage value, then comparator disconnection；When internal supply voltage reaches preset voltage value, then comparator is connected.
Further, in the communication bus isolation circuit of embodiment, the base stage of triode Q3 connects voltage stabilizing by resistance R7
The positive pole of diode ZD, the base stage of triode Q3 passes through the emitter stage of resistance R8 connecting triodes Q3；
The base stage of triode Q4 connects resistance R4 by resistance R5, and the base stage of triode Q4 passes through resistance R6 connecting triodes
The node of the emitter stage of Q4, resistance R4 and resistance R5（Tie point）It is grounded by electric capacity C2.
The base stage connection bus standby voltage of triode Q4, the colelctor electrode of triode Q4 connect respectively bus standby voltage and
The grid of FET Q2, the grounded emitter of triode Q4；
Further, in the communication bus isolation circuit of the present embodiment, also including microprocessor, internal supply voltage is used for
It is microprocessor power supply, the negative pole of the energization pins connection voltage-regulator diode ZD of microprocessor, the signal pins point of microprocessor
Not Lian Jie power module bidirectional data line SDA1 and clock cable SCL1.For example, microprocessor include pin 1, pin 2,
Pin 3, pin 4, pin 5, pin 6, pin 7, pin 8.Wherein, pin 1 and the sky of pin 2 connect；Pin 3 and pin 4 are grounded；Draw
Pin 5 is the bidirectional data line SDA of microprocessor, and pin 5 connects the bidirectional data line SDA1 of power module；Pin 6 is microprocessor
The clock cable SCL of device, pin 6 connects the clock cable SCL1 of power module；Pin 7 is write-protect pin, and pin 7 connects
Ground；Pin 8 is the energization pins of microprocessor, the connection internal supply voltage of pin 8.
The specific control process of communication bus isolation circuit is：
Internal supply voltage is not up to preset voltage value, and such as predeterminated voltage is 3.3V, the electric conduction of voltage-regulator diode ZD
It is 2.4V to press, and when internal supply voltage is not up to 3.3V, voltage-regulator diode ZD is not turned on, then triode Q3 open circuits, thus three
The base drive signal of pole pipe Q4 keeps high potential, bus standby voltage to drive triode Q4, triode Q4 to lead via resistance R4
It is logical, and then the grid voltage of FET Q1 and FET Q2 is dragged down, FET Q1 and FET Q2 disconnects.Example
Such as, the output signal of power module is bidirectional data line SDA1 and clock cable SCL1, and the signal receiving end of system board side is
Bidirectional data line SDA2 and clock cable SCL2.FET Q1 is in bidirectional data line SDA1's and bidirectional data line SDA2
On path；FET Q2 is on the path of clock cable SCL1 and clock cable SCL2.FET Q1 and field are imitated
Should pipe Q2 disconnect, i.e. the first disconnecting switch is disconnected when being off, and bidirectional data line SDA1 is unable to transmission signal to two-way
Data wire SDA2；Clock cable SCL1 is unable to transmission signal to clock cable SCL2, realize power module and system board it
Between communication isolating.
Internal supply voltage reaches preset voltage value, and predeterminated voltage is 3.3V, and the conducting voltage of voltage-regulator diode ZD is
2.4V, when internal supply voltage reaches 3.3V, voltage-regulator diode ZD conductings, then triode Q3 connect, thus triode Q4
Base drive signal is pulled low, and bus standby voltage drives triode Q4 via resistance R3, and triode Q4 is disconnected, and then field is imitated
Should the grid voltage of pipe Q1 and FET Q2 height is put by bus standby voltage, FET Q1 and FET Q2 is turned on.Example
Such as, the output signal of power module is bidirectional data line SDA1 and clock cable SCL1, and the signal receiving end of system board side is
Bidirectional data line SDA2 and clock cable SCL2.FET Q1 is in bidirectional data line SDA1's and bidirectional data line SDA2
On path；FET Q2 is on the path of clock cable SCL1 and clock cable SCL2.FET Q1 and field are imitated
Should pipe Q2 conductings, i.e. when the first disconnecting switch disconnects in the conduction state, bidirectional data line SDA1 can transmission signal to two-way
Data wire SDA2；Clock cable SCL1 can transmission signal to clock cable SCL2, realize power module and system board it
Between communicate connection.
Preferably, in the present embodiment, resistance R1 is 100 Ω, and resistance R2 is 100 Ω, and resistance R3 is 20K Ω, resistance R4
It is 47K Ω, resistance R5 is 10K Ω, and resistance R6 is 4K Ω, and resistance R7 is 10K Ω, and resistance R8 is 4K Ω, and electric capacity C1 is 2.2nF/
50V, electric capacity C2 are 2.2nF/50V.
To sum up, by implementing the utility model, when there are abnormal conditions in electronic equipment, the clock cable SCL of power supply
It is automatically isolated with bidirectional data line SDA, it is ensured that other power module energy proper communications.
Above example only to illustrate technology design of the present utility model and feature, technique is familiar with its object is to allow
Personage will appreciate that content of the present utility model and implement accordingly, protection domain of the present utility model can not be limited.It is all with
The impartial change that the utility model right is done and modification, all should belong to the utility model claim covers model
Enclose.
Claims (10)
1. a kind of communication bus isolation circuit, it is characterised in that including：
Between power module and system board, for control it is described between power module and system board communicate break-make first every
Leave pass；
Be connected with first disconnecting switch, the second disconnecting switch for providing drive signal for first disconnecting switch；
First disconnecting switch and the second disconnecting switch connection bus standby voltage；
Second disconnecting switch connects internal supply voltage by electric voltage observation circuit；
The internal supply voltage is not up to preset voltage value, then shut-off is kept apart in the second disconnecting switch control described first
Open, realize communication isolating between the power module and system board；
The internal supply voltage reaches preset voltage value, then closing is kept apart in the second disconnecting switch control described first
Close, realize the connection that communicated between the power module and system board.
2. communication bus isolation circuit according to claim 1, it is characterised in that first disconnecting switch includes field effect
Should pipe Q1 and FET Q2, wherein,
The grid of the FET Q1 connects the bus standby voltage, and the source electrode of the FET Q1 connects the power supply
The bidirectional data line SDA2 of the drain electrode connection system board of the bidirectional data line SDA1, the FET Q1 of module；
The grid of the FET Q2 connects the bus standby voltage, and the source electrode of the FET Q2 connects the power supply
The clock cable SCL2 of the drain electrode connection system board of the clock cable SCL1, the FET Q2 of module.
3. communication bus isolation circuit according to claim 2, it is characterised in that the grid of the FET Q1 and institute
The grid for stating FET Q2 connects the bus standby voltage by resistance R3；
The grid of the FET Q2 is grounded by electric capacity C1；
The drain electrode of the FET Q1 connects the bidirectional data line SDA2 of the system board by resistance R1；The FET
The drain electrode of Q2 connects the clock cable SCL2 of the system board by resistance R2.
4. communication bus isolation circuit according to claim 3, it is characterised in that the FET Q1 and the field are imitated
Should pipe Q2 be NPN type FET.
5. according to any described communication bus isolation circuits of claim 2-4, it is characterised in that the second disconnecting switch bag
Triode Q3 and triode Q4 is included, wherein,
The base stage of the triode Q3 connects the internal supply voltage by the electric voltage observation circuit, the triode Q3's
Colelctor electrode connects the bus standby voltage, the grounded emitter of the triode Q3；
The base stage of the triode Q4 connects the bus standby voltage, and the colelctor electrode of the triode Q4 connects described total respectively
The grid of line standby voltage and the FET Q2, the grounded emitter of the triode Q4；
The internal supply voltage is not up to preset voltage value, then the triode Q3 open circuits, the triode Q4 conductings, by institute
The grid voltage for stating FET Q1 and FET Q2 is dragged down, and the FET Q1 and FET Q2 disconnects；
The internal supply voltage reaches preset voltage value, then the triode Q3 conductings, and the triode Q4 open circuits will be described
The grid voltage of FET Q1 and FET Q2 is drawn high, and the FET Q1 and FET Q2 is turned on.
6. communication bus isolation circuit according to claim 5, it is characterised in that the colelctor electrode of the triode Q3 passes through
Resistance R4 connects the bus standby voltage, and the base stage of the triode Q4 connects the bus and treats electromechanics by the resistance R4
Pressure, the colelctor electrode of the triode Q4 connects the bus standby voltage by resistance R3, and the colelctor electrode of the triode Q4 leads to
Cross electric capacity C1 ground connection.
7. communication bus isolation circuit according to claim 6, it is characterised in that the electric voltage observation circuit is voltage stabilizing two
The base stage of pole pipe ZD, the triode Q3 connects the positive pole of the voltage-regulator diode ZD, and the negative pole of the voltage-regulator diode ZD connects
Connect the internal supply voltage；
Or
The electric voltage observation circuit is comparator, and the comparator is used to monitor the internal supply voltage, when the internal confession
Piezoelectric voltage is not up to preset voltage value, then the comparator disconnects；When the internal supply voltage reaches preset voltage value, then institute
State comparator connection.
8. communication bus isolation circuit according to claim 7, it is characterised in that the base stage of the triode Q3 is by electricity
Resistance R7 connects the positive pole of the voltage-regulator diode ZD, and the base stage of the triode Q3 connects the triode Q3's by resistance R8
Emitter stage；
The base stage of the triode Q4 connects the resistance R4 by resistance R5, and the base stage of the triode Q4 is connected by resistance R6
The emitter stage of the triode Q4 is connect, the node of the resistance R4 and resistance R5 is grounded by electric capacity C2.
9. communication bus isolation circuit according to claim 8, it is characterised in that the triode Q3 and the triode
Q4 is NPN type triode.
10. communication bus isolation circuit according to claim 9, it is characterised in that also including microprocessor, the inside
Supply voltage is used to be the microprocessor power supply that the energization pins of the microprocessor to connect the negative of the voltage-regulator diode ZD
Pole, the signal pins of the microprocessor connect the bidirectional data line SDA1 and clock cable of the power module respectively
SCL1。
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|---|---|---|---|
| CN201621164724.0U CN206259950U (en) | 2016-10-25 | 2016-10-25 | A kind of communication bus isolation circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621164724.0U CN206259950U (en) | 2016-10-25 | 2016-10-25 | A kind of communication bus isolation circuit |
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| CN206259950U true CN206259950U (en) | 2017-06-16 |
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ID=59024296
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108933627A (en) * | 2018-07-30 | 2018-12-04 | 青岛海信宽带多媒体技术有限公司 | A kind of optical module and optical network system |
| CN109361467A (en) * | 2018-12-04 | 2019-02-19 | 青岛海信宽带多媒体技术有限公司 | A kind of optical module |
| CN109410824A (en) * | 2018-12-28 | 2019-03-01 | 深圳市华星光电技术有限公司 | Display device drive system and display-apparatus driving method |
| WO2020077857A1 (en) * | 2018-10-15 | 2020-04-23 | 深圳市华星光电技术有限公司 | Liquid crystal display circuit and display |
| CN113507283A (en) * | 2021-07-02 | 2021-10-15 | 青鸟消防股份有限公司 | Non-polar bus isolating switch |
-
2016
- 2016-10-25 CN CN201621164724.0U patent/CN206259950U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108933627A (en) * | 2018-07-30 | 2018-12-04 | 青岛海信宽带多媒体技术有限公司 | A kind of optical module and optical network system |
| CN108933627B (en) * | 2018-07-30 | 2021-04-30 | 青岛海信宽带多媒体技术有限公司 | Optical module and optical network system |
| WO2020077857A1 (en) * | 2018-10-15 | 2020-04-23 | 深圳市华星光电技术有限公司 | Liquid crystal display circuit and display |
| CN109361467A (en) * | 2018-12-04 | 2019-02-19 | 青岛海信宽带多媒体技术有限公司 | A kind of optical module |
| CN109361467B (en) * | 2018-12-04 | 2021-07-06 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN109410824A (en) * | 2018-12-28 | 2019-03-01 | 深圳市华星光电技术有限公司 | Display device drive system and display-apparatus driving method |
| CN113507283A (en) * | 2021-07-02 | 2021-10-15 | 青鸟消防股份有限公司 | Non-polar bus isolating switch |
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Address after: 518000 Guangdong city of Shenzhen province Baoan District two road Xixiang Street Gushu Xing Hui industrial plant workshop one or two, three (A, B, Xing Hui Science Park building C) Patentee after: Shenzhen Europe Lu Tong Electronic Limited by Share Ltd Address before: 518000 Guangdong, Shenzhen, Xixiang City, the town of the world on the road No. 111 Fuyuan Industrial City C7 building /C8 building Patentee before: Oulutong Electronic Co., Ltd., Shenzhen |